<div dir="ltr">Hi David,<div><br></div><div>Do you know whether the configuration "Lewisburg PCH + W25Q256xxx SPI" has been tested with the flashrom? thank you!</div><div><br></div><div><br></div><div><br></div><div><br></div><div><br></div></div><div class="gmail_extra"><br><div class="gmail_quote">2017-08-08 3:55 GMT+08:00 David Hendricks <span dir="ltr"><<a href="mailto:david.hendricks@gmail.com" target="_blank">david.hendricks@gmail.com</a>></span>:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Hi Sandy,<div>Correct - The PCH will not allow us to write anything to regions which are not defined in the flash descriptor. You could add those regions to the "BIOS" region if you wish to update them from your host OS. The SPI Programming Guide for your PCH (Lewisburg?) should also have info about additional regions which you may set up in the flash descriptor.</div><div><br></div><div>"EW" means erase and write, "S" means skip (content does not need to change), "E" means erase only, "W" means write only</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Mon, Aug 7, 2017 at 12:50 AM, Sandy Zhang <span dir="ltr"><<a href="mailto:sanzhang@celestica.com" target="_blank">sanzhang@celestica.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Hi David,<div><br></div><div>It seems that the below 2 regions are "<span style="font-size:14px">write denied</span>": </div><div><div><br></div><div><div>00A26000 00A35FFF 00010000 <font color="#0000ff">DER #1 Region</font></div><div>00A36000 00FEFFFF 005BA000 <font color="#0000ff">10 Gbe A Region</font></div></div></div><div><font color="#0000ff"><br></font></div><div><font color="#000000">By the way, can you tell me what is the other parament "EW", "S" and "E" meana? thank you!</font></div><div><font color="#000000"><br></font></div><div><font color="#000000"><br></font></div><div><font color="#000000"><br></font></div></div><div class="m_-1064753351582897685HOEnZb"><div class="m_-1064753351582897685h5"><div class="gmail_extra"><br><div class="gmail_quote">2017-08-07 13:02 GMT+08:00 David Hendricks <span dir="ltr"><<a href="mailto:david.hendricks@gmail.com" target="_blank">david.hendricks@gmail.com</a>></span>:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Hi Sandy,<div>It might not have done what you expect. The error is because offsets 0xa26000-0xffffff are not defined in the flash descriptor, so the PCH gives us an error when flashrom attempts to update it. ":WD" next to the offsets in the log means "write denied".</div><div><br></div><div>If you wish to update that region of the ROM then you must change your flash descriptor to include it and set the permissions to enable read and write.</div><span style="font-family:monospace"><br></span></div><div class="gmail_extra"><br><div class="gmail_quote">On Sun, Aug 6, 2017 at 8:20 PM, Sandy Zhang <span dir="ltr"><<a href="mailto:sanzhang@celestica.com" target="_blank">sanzhang@celestica.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Hi David,<div><br></div><div>Attachment is the log file when flash bios into Winbond 32MB SPI rom, could you help to check if it's updated sucessfully? thank you!</div></div><div class="m_-1064753351582897685m_4474823205372778038m_7771406143872152328HOEnZb"><div class="m_-1064753351582897685m_4474823205372778038m_7771406143872152328h5"><div class="gmail_extra"><br><div class="gmail_quote">2017-08-05 10:45 GMT+08:00 Sandy Zhang <span dir="ltr"><<a href="mailto:sanzhang@celestica.com" target="_blank">sanzhang@celestica.com</a>></span>:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Hi David,<div><br></div><div>Thank you very much, I will try to add the patch to <span style="font-size:14px">flashrom-0.9.9, As a BIOS engineer, it is a bit difficult for me to complete this.</span></div><div><span style="font-size:14px">Do you know when will </span><span style="font-size:14px">make it into a release tarball?</span></div><div><span style="font-size:14px"><br></span></div><div><span style="font-size:14px"><br></span></div><div><span style="font-size:14px"><br></span></div><div><span style="font-size:14px">BR</span></div><div><span style="font-size:14px">Sandy</span></div></div><div class="gmail_extra"><br><div class="gmail_quote">2017-08-05 0:05 GMT+08:00 David Hendricks <span dir="ltr"><<a href="mailto:david.hendricks@gmail.com" target="_blank">david.hendricks@gmail.com</a>></span>:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div dir="auto">On Aug 3, 2017 11:51 PM, "Sandy Zhang" <<a href="mailto:sanzhang@celestica.com" target="_blank">sanzhang@celestica.com</a>> wrote:<br></div><div class="gmail_extra"><div class="gmail_quote"><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div dir="ltr">Hi David,<div><br></div><div>Thanks for your reply, can you tell me where to download the flash package like "flashrom-0.9.9.tar" which is downloaded from the address ''<a href="https://www.flashrom.org/Downloads" target="_blank">https://www.flashrom.org/Dow<wbr>nloads</a>"? thank you!</div></div></blockquote><div><br></div><div>The Skylake patches have not made it into a release tarball yet. Can you try using the git sources from <a href="https://review.coreboot.org/cgit/flashrom.git" target="_blank">https://review.coreboot.o<wbr>rg/cgit/flashrom.git</a>? E.g:</div><div><br></div><div>git clone <a href="https://review.coreboot.org/flashrom.git" target="_blank">https://review.coreboot.org/fl<wbr>ashrom.git</a></div><div>git checkout origin/staging</div><div>make</div><div><br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div dir="ltr"><div><br></div><div><br></div><div><br></div><div><br></div><div>BR</div><div>Sandy</div></div><div class="gmail_extra"><br><div class="gmail_quote">2017-08-04 14:35 GMT+08:00 David Hendricks <span dir="ltr"><<a href="mailto:david.hendricks@gmail.com" target="_blank">david.hendricks@gmail.com</a>></span>:<br><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div dir="ltr">Hi Sandy,<div>Skylake support was recently merged: <a href="https://review.coreboot.org/18973" target="_blank">https://review.coreboot.org/18<wbr>973</a></div><div><br></div><div>However you may need to add your PCH PCI ID. What does `lspci -nn | grep LPC` show on your test system?</div><div><br></div><div>And yes, a 32MB ROM should work fine.</div><div class="gmail_extra"><br><div class="gmail_quote">On Mon, Jul 31, 2017 at 4:11 AM, Sandy Zhang <span dir="ltr"><<a href="mailto:sanzhang@celestica.com" target="_blank">sanzhang@celestica.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div dir="ltr">Hi,<div><br></div><div>Can you tell me when flashrom support Intel Purley platform Lewisburg PCH?</div><div>and if it can support flash 32 MB SPI rom? </div><div> I am eager to your reply as soon as possible, thank you very much!<span class="m_-1064753351582897685m_4474823205372778038m_7771406143872152328m_-4016650644340379208m_719740100006149346m_-9118054997792081932gmail-m_-991129383182430126m_5244290049121288377m_-4802584461318051397m_-970301844461965605m_3786647612090198741HOEnZb"><font color="#888888"><br clear="all"><div><br></div><div><br></div>-- <br><div class="m_-1064753351582897685m_4474823205372778038m_7771406143872152328m_-4016650644340379208m_719740100006149346m_-9118054997792081932gmail-m_-991129383182430126m_5244290049121288377m_-4802584461318051397m_-970301844461965605m_3786647612090198741m_-1068702934336148321gmail_signature"><div dir="ltr"><div><div dir="ltr"><div><div dir="ltr"><br><div><div><b><font color="#0c343d" face="arial, helvetica, sans-serif">Best Regard!</font></b></div><div><b><font color="#0c343d" face="arial, helvetica, sans-serif"><br></font></b></div><div><font color="#0c343d" face="arial, helvetica, sans-serif"><b>Sandy Zhang (</b> 张立康<b>)</b></font></div><b><font color="#0c343d" face="arial, helvetica, sans-serif">BIOS Engineer</font></b><div><div><b><font color="#0c343d" face="arial, helvetica, sans-serif">Global Design Service</font></b></div><div><b><font color="#0c343d" face="arial, helvetica, sans-serif">Celestica(Shanghai) R&D Center, China</font></b></div></div><div><b><font color="#0c343d" face="arial, helvetica, sans-serif">Mail: sanzhang<a href="mailto:viterzho@celestica.com" style="color:rgb(17,85,204)" target="_blank">@celestica.com</a></font></b></div><div><b><font color="#0c343d" face="arial, helvetica, sans-serif">Mobile: <a href="tel:+86%20159%206535%203952" value="+8615965353952" target="_blank">(+86)15965353952</a></font></b></div></div><div><b><font color="#0c343d" face="arial, helvetica, sans-serif">Phone: (+86)021-61006028-7623</font></b><b><font color="#0c343d" face="arial, helvetica, sans-serif"><br></font></b></div></div></div></div></div></div></div>
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