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<p class="MsoNormal">Hi,<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">We are developing coreboot (with Intel FSP) for apollo lake platform custom board. We are facing a hang issue during the SYS_RESET button press.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><u>Observations:<o:p></o:p></u></p>
<ul style="margin-top:0in" type="disc">
<li class="MsoNormal" style="margin-left:0in;mso-list:l0 level1 lfo1">With soft reset the board gets hang(occurs within 2 or 3 reboot) with POST code 0x38 and the coreboot log stops during the romstage relocation. (Logs attached for Ref.)<o:p></o:p></li><li class="MsoNormal" style="margin-left:0in;mso-list:l0 level1 lfo1">When the SYS_RESET is pressed again the board boots and hangs at same POST code 0x38.<o:p></o:p></li></ul>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Please provide feedback and help us to resolve this issue.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Currently our coreboot build does not include any microcode (CPU_MICROCODE_CBFS_NONE). We tried to change it as “Generate from tree” in memuconfig.
<o:p></o:p></p>
<p class="MsoNormal">But the build fails with fatal error saying no microcode/microcode.h file.
<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Whether the CPU by default have microcode ? or we need to build the microcode in coreboot ?
<o:p></o:p></p>
<p class="MsoNormal">Please advise on this.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Thanks & Regards,<o:p></o:p></p>
<p class="MsoNormal">Antony<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p><strong>L&T Technology Services Ltd</strong></p>
<p><a href="http://www.lnttechservices.com/" target="_blank">www.LntTechservices.com</a></p>
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