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Sorry for being unclear.</div>
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By BIOS stage, I mean I need to see the text "Press ESC for boot menu." on screen. It also means it needs to boot DOS with display on.</div>
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But I can not. I have to wait for the linux to boot. Only Linux (driver?) can turn the display on. I tried with both vbt from github and extracted</div>
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from original AMI BIOS.<br>
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My board uses IT6515FN to transfer the display to VGA.</div>
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Zheng</div>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" face="Calibri, sans-serif" color="#000000"><b>From:</b> Nico Huber <nico.h@gmx.de><br>
<b>Sent:</b> Friday, October 5, 2018 8:27 PM<br>
<b>To:</b> Zheng Bao<br>
<b>Cc:</b> coreboot@coreboot.org; youness.alaoui@puri.sm; Matt DeVillier<br>
<b>Subject:</b> Re: [coreboot] [skylake] Can not turn monitor on</font>
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<div class="PlainText">On 10/5/18 4:43 PM, Zheng Bao wrote:<br>
> I transfer all the GPIO setting to my code.<br>
<br>
What do you mean? did you have wrong GPIO settings before?<br>
<br>
> After this, the linux can turn the monitor on, but in BIOS stage,<br>
> monitor can not be turn on.<br>
> Is that the way it is? Can BIOS turn the display on?<br>
<br>
What exactly do you mean with BIOS? a VGA BIOS? it should work with the<br>
correct VBT. Same with a GOP driver. I'll add Matt in CC who has more<br>
experience with the proprietary graphics solutions.<br>
<br>
Personally, I would just implement the backlight control in coreboot<br>
and use libgfxinit as open-source solution. Register documentation can<br>
be found here [1][2] and soc/intel/broadwell/igd.c:311..344 as example<br>
how it worked on older platforms. Everything else you need are the<br>
correct settings for your board/panel which you can find by decoding<br>
the VBT or just dump the registers when Linux initialized it.<br>
<br>
Nico<br>
<br>
[1] BLC_PWM_(CTL|DATA) in<br>
<br>
<a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02c-commandreference-registers-part1.pdf">https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02c-commandreference-registers-part1.pdf</a><br>
<br>
[2] PP_* and SBLC_PWM_CTL[12] in<br>
<br>
<a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02c-commandreference-registers-part2.pdf">https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02c-commandreference-registers-part2.pdf</a><br>
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