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<p class="MsoNormal">Hi,<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">We are developing coreboot for Apollo lake custom board. <o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">We would like to reduce the boot time. For this, <o:p></o:p></p>
<ul style="margin-top:0in" type="disc">
<li class="MsoListParagraph" style="margin-left:0in;mso-list:l0 level1 lfo2">Enabled “MRC training data save” in FSP2_0 using Binary configuration tool.<o:p></o:p></li></ul>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">But we are receiving the following logs:<o:p></o:p></p>
<p class="MsoNormal"><i>NVM Write Failed. Update is lost. If repeatedly encountered, clear GPP4 and try again<o:p></o:p></i></p>
<p class="MsoNormal"><i>Saved MRC training data with status (0x80000007)<o:p></o:p></i></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">We would like to get clarification for the following:<o:p></o:p></p>
<ol style="margin-top:0in" start="1" type="1">
<li class="MsoListParagraph" style="margin-left:0in;mso-list:l2 level1 lfo3">Can we cache and save MRC training data for Apollo lake platform ?<o:p></o:p></li><li class="MsoListParagraph" style="margin-left:0in;mso-list:l2 level1 lfo3">Will it be done through CSE using HECI interface or through the SPI read/write operation in the NVRAM ?<o:p></o:p></li><li class="MsoListParagraph" style="margin-left:0in;mso-list:l2 level1 lfo3">Do we need to add Mrc.bin file with coreboot? If yes, where can we get the same ?<o:p></o:p></li></ol>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Thanks & Regards,<o:p></o:p></p>
<p class="MsoNormal">Antony<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
</div>
<p><strong>L&T Technology Services Ltd</strong></p>
<p><a href="http://www.lnttechservices.com/" target="_blank">www.LntTechservices.com</a></p>
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