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<p class="MsoNormal">Hi, <o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Thanks for your feedback. <o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">We enabled ENABLE_FSP_FAST_BOOT and MRC cache Training data in FSP using binary configuration tool. Also we reduced the console log level to 0.
<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Now the boot time is reduced to 23 secs for initial boot and 11 secs for upcoming power cycles.
<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Is this a normal behavior ?<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Also from the console logs we found the following:<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Coreboot FSP Performance Data<o:p></o:p></p>
<p class="MsoNormal">ID: 950 - 951: 8118676370 - 2354813461 --> 4433ms <i>(TS_FSP_MEMORY_INIT_START - TS_FSP_MEMORY_INIT_END)</i><o:p></o:p></p>
<p class="MsoNormal">ID: 952 - 953: 10675414728 - 8905813067 --> 1361ms <i>(TS_FSP_TEMP_RAM_EXIT_START - TS_FSP_TEMP_RAM_EXIT_END)<o:p></o:p></i></p>
<p class="MsoNormal">ID: 954 - 955: 11761158519 - 10934089420 --> 636ms <i>(TS_FSP_SILICON_INIT_START - TS_FSP_SILICON_INIT_END)<o:p></o:p></i></p>
<p class="MsoNormal">ID: 956 - 957: 19265617974 - 19265559282 --> 0ms <i>(TS_FSP_BEFORE_ENUMERATE - TS_FSP_AFTER_ENUMERATE)<o:p></o:p></i></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Can we reduce the above mentioned time taken by modifying the FSP source ? Please advice.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Thanks<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><b>From:</b> Matt DeVillier [mailto:matt.devillier@gmail.com]
<br>
<b>Sent:</b> Saturday, August 11, 2018 1:15 PM<br>
<b>To:</b> Antony AbeePrakash X V <AntonyAbee.PrakashXV@LntTechservices.com><br>
<b>Cc:</b> coreboot <coreboot@coreboot.org><br>
<b>Subject:</b> Re: [coreboot] Reducing the boot time<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<div>
<p class="MsoNormal">assuming you've built with CONFIG_COLLECT_TIMESTAMPS=y, you can build/run the cbmem utility and see how long each stage/section of coreboot is taking (up to the point of handing off control to the payload). 30s to boot sounds like either
you're not caching the RAM training data (MRC cache) and therefore redoing RAM training each time, or outputting the boot console to a non-existent serial port (which can slow everything down). Whatever it is, looking at the timestamps will go a long way
towards identifying the issue<o:p></o:p></p>
</div>
<p class="MsoNormal"><o:p> </o:p></p>
<div>
<div>
<p class="MsoNormal">On Sat, Aug 11, 2018 at 2:13 AM Antony AbeePrakash X V <<a href="mailto:AntonyAbee.PrakashXV@lnttechservices.com">AntonyAbee.PrakashXV@lnttechservices.com</a>> wrote:<o:p></o:p></p>
</div>
<blockquote style="border:none;border-left:solid #CCCCCC 1.0pt;padding:0in 0in 0in 6.0pt;margin-left:4.8pt;margin-top:5.0pt;margin-right:0in;margin-bottom:5.0pt">
<div>
<div>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto">Hi,
<o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"> <o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto">We have developed a coreboot image for Apollo lake custom board. The time taken for boot up is around 30 seconds.<o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto">We would like to reduce the boot time as much as possible.<o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"> <o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span lang="EN-IN">Following codes are removed:</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span lang="EN-IN"> </span><o:p></o:p></p>
<ol start="1" type="1">
<li class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:0in;mso-list:l3 level1 lfo3">
<span lang="EN-IN">Non-intel Apollolake specific codes in below folders </span><o:p></o:p></li></ol>
<ol start="1" type="1">
<ol start="1" type="a">
<li class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:0in;mso-list:l3 level2 lfo3">
<span lang="EN-IN">Arch</span><o:p></o:p></li><li class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:0in;mso-list:l3 level2 lfo3">
<span lang="EN-IN">Soc</span><o:p></o:p></li><li class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:0in;mso-list:l3 level2 lfo3">
<span lang="EN-IN">Mainboard</span><o:p></o:p></li><li class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:0in;mso-list:l3 level2 lfo3">
<span lang="EN-IN">Vendorcode</span><o:p></o:p></li></ol>
</ol>
<p class="m-1650461259476478700msolistparagraph" style="margin-left:1.0in"><span lang="EN-IN"> </span><o:p></o:p></p>
<ol start="2" type="1">
<li class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:0in;mso-list:l4 level1 lfo7">
<span lang="EN-IN">Splash screen loading</span><o:p></o:p></li><li class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:0in;mso-list:l4 level1 lfo7">
<span lang="EN-IN">SPI support – other than our custom board SPI.</span><o:p></o:p></li></ol>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span lang="EN-IN"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span lang="EN-IN">Also we have disabled the COMPRESS_RAMSTAGE. Still we are not able to reduce the boot time.</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span lang="EN-IN"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span lang="EN-IN">Please suggest the methods to reduce the boot time.</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto">Thanks & Regards,<o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto">Antony<o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"> <o:p></o:p></p>
</div>
<p><strong><span style="font-family:"Calibri",sans-serif">L&T Technology Services Ltd</span></strong><o:p></o:p></p>
<p><a href="http://www.lnttechservices.com/" target="_blank">www.LntTechservices.com</a><o:p></o:p></p>
<p>This Email may contain confidential or privileged information for the intended recipient (s). If you are not the intended recipient, please do not use or disseminate the information, notify the sender and delete it from your system.<o:p></o:p></p>
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<p class="MsoNormal">-- <br>
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<a href="https://mail.coreboot.org/mailman/listinfo/coreboot" target="_blank">https://mail.coreboot.org/mailman/listinfo/coreboot</a><o:p></o:p></p>
</blockquote>
</div>
</div>
<p><strong>L&T Technology Services Ltd</strong></p>
<p><a href="http://www.lnttechservices.com/" target="_blank">www.LntTechservices.com</a></p>
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