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<p style="margin-top:0; margin-bottom:0">Plus, my board uses SODIMM, from which I assume System Agent should get SPD data.</p>
<p style="margin-top:0; margin-bottom:0">Is the grabbing data from SPD in blob? I can not dump the SPD out, can I?</p>
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Zheng</div>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" face="Calibri, sans-serif" color="#000000"><b>From:</b> coreboot <coreboot-bounces@coreboot.org> on behalf of Zheng Bao <fishbaoz@hotmail.com><br>
<b>Sent:</b> Saturday, January 27, 2018 4:47 AM<br>
<b>To:</b> Nico Huber; Robert Reeves<br>
<b>Cc:</b> Matt DeVillier; coreboot@coreboot.org<br>
<b>Subject:</b> Re: [coreboot] [Haswell i7-4600U]: How can I decide which MRC.bin match my board</font>
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<p style="margin-top:0; margin-bottom:0">I traced the code more and found the accessing data in
<span>MCHBAR would hang the board. Just hang, not reboot.</span></p>
<p style="margin-top:0; margin-bottom:0"><span>Even if I move the accessing backward to
<span>haswell_setup_bars, it hangs as well. Why?</span></span></p>
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</span></span></p>
<p style="margin-top:0; margin-bottom:0"><span><span>My board also has a superio(or EC?) IT8772, which I assume doesnt make this problem.</span></span></p>
<p style="margin-top:0; margin-bottom:0"><span><span>Thanks.</span></span></p>
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<p style="margin-top:0; margin-bottom:0"><span><span>Zheng</span></span><br>
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<div id="x_divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" face="Calibri, sans-serif" color="#000000"><b>From:</b> Nico Huber <nico.h@gmx.de><br>
<b>Sent:</b> Friday, January 26, 2018 2:15 PM<br>
<b>To:</b> Zheng Bao; Robert Reeves<br>
<b>Cc:</b> coreboot@coreboot.org<br>
<b>Subject:</b> Re: [coreboot] [Haswell i7-4600U]: How can I decide which MRC.bin match my board</font>
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<div class="x_PlainText">Hi Zheng,<br>
<br>
On 24.01.2018 16:12, Zheng Bao wrote:<br>
> After extract the shellball of chromebook, how can I know what the<br>
> processor exactly is?<br>
<br>
I don't know the blob for Haswell very well. But here's what I know<br>
about other blobs:<br>
<br>
* Sandy/Ivy Bridge mrc.bin: This one seems to run on every CPU so far.<br>
<br>
* FSP is not built for specific SKUs. The code is supposed to work on<br>
any, I guess. But the releases are only validated for specific SKUs.<br>
<br>
So it's not unlikely that a blob you extracted from a Chromebook firm-<br>
ware "should" run with any Haswell CPU. But still it could make trouble<br>
with your CPU, if nobody tested it before in that combination.<br>
<br>
As you have very limited output from the blob about the failure. I<br>
wonder why you suspect the blob itself to be the problem? other things<br>
could go wrong as well (e.g. gathering data from SPDs).<br>
<br>
Also, I'd first check that your revision of coreboot works together with<br>
that specific blob on any board (e.g. the original Chromebook).<br>
<br>
Nico<br>
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