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<p class="MsoNormal"><span lang="EN-US" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#1F497D">Hi all,<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#1F497D">> • Are you able to boot Yocto with the current combination you have?<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#1F497D">We haven’t tested Yocto, but we can boot a Lubuntu.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#1F497D">> Where did you obtain a VBIOS file?<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#1F497D">Intel provides the VBIOS in its MRx packages for the CRBs. You need to contact Intel for this.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#1F497D">> • Is it specifically VBIOS, or is it a VBT.dat file? Or are you running SeaVGABIOS?<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#1F497D">I think you need a complete VBIOS bxt_1003.dat (64kB) for SeaBios.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#1F497D">The vbt.dat (5kB) is need by GOP driver. But we haven’t done anything with that yet.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#1F497D">Mario<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">Von:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> Tahnia Lichtenstein [mailto:unlich@gmail.com]
<br>
<b>Gesendet:</b> Freitag, 3. November 2017 13:46<br>
<b>An:</b> Scheithauer, Mario (DF MC MTS R&D SWRT 4); coreboot@coreboot.org<br>
<b>Betreff:</b> Re: [coreboot] Problems changing payload on Intel Leaf Hill<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Hi Mario,<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Thank you very much for sharing, that already helps a lot!! I can spot quite a lot of differences to my own build settings.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">I've been pursuing a Grub2 payload in the meantime (no success so far), will now return to SeaBIOS and try and incorporate the necessary changes you suggested.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Just a couple of questions so far:<o:p></o:p></p>
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<li class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;mso-list:l0 level1 lfo1">
Are you able to boot Yocto with the current combination you have?<o:p></o:p></li><li class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;mso-list:l0 level1 lfo1">
I have all the blobs around coreboot, except the VBIOS... I have tried all the options in <a href="https://www.coreboot.org/VGA_support" target="_blank">https://www.coreboot.org/VGA_support</a>, but I suspect the reference bootloader images provided by Intel
does not use a VBIOS file. I also cannot find a suitable VBIOS on Intel's website. (By the way, thanks for the FIT decomposition tip, I did not know this was possible... I took great pains to find the correct blobs on Intel's website, would have been much
easier to just use FIT!) Where did you obtain a VBIOS file? <o:p></o:p></li><li class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;mso-list:l0 level1 lfo1">
Is it specifically VBIOS, or is it a VBT.dat file? Or are you running SeaVGABIOS?<o:p></o:p></li></ul>
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<p class="MsoNormal">Many thanks again!<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Best regards,<o:p></o:p></p>
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<p class="MsoNormal">Tahnia<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">On Fri, Nov 3, 2017 at 2:01 PM, Scheithauer, Mario <<a href="mailto:Mario.Scheithauer@siemens.com" target="_blank">Mario.Scheithauer@siemens.com</a>> wrote:<o:p></o:p></p>
<p class="MsoNormal"><br>
Hi Cameron,<br>
<br>
> Did you modify the FSP blobs at all?<br>
Yes, we made some adjustments for our mainboard (mc_apl1).<br>
But they shouldn’t play a decisive role (power states, PCIe settings).<br>
<br>
> The reason I ask is that my coreboot build hangs in the FspSiliconInit().<br>
Then you will get pretty far.<br>
We are currently still using the MR2 FSP package for APL-I.<br>
As IFWI template we use the BIOS version v178.10 for the CRBs.<br>
These components are provided by Intel.<br>
That’s it. The CRB should boot with this combination.<br>
<br>
Mario<br>
<br>
> -----Ursprüngliche Nachricht-----<br>
> Von: Cameron Craig [mailto:<a href="mailto:Cameron.Craig@exterity.com">Cameron.Craig@exterity.com</a>]<br>
> Gesendet: Freitag, 3. November 2017 11:51<br>
> An: Scheithauer, Mario (DF MC MTS R&D SWRT 4); ahW@n<br>
> Cc: <a href="mailto:coreboot@coreboot.org">coreboot@coreboot.org</a><br>
> Betreff: RE: [coreboot] Problems changing payload on Intel Leaf Hill<o:p></o:p></p>
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<p class="MsoNormal">><br>
> Hi Mario,<br>
><br>
> I've been attempting to build coreboot(master) for the Leaf Hill CRB, with no<br>
> success so far.<br>
><br>
> Did you modify the FSP blobs at all?<br>
> I had a look at your config, the filenames "FSP_MR2_M_ECC_MOD" caught my<br>
> eye.<br>
><br>
> The reason I ask is that my coreboot build hangs in the FspSiliconInit().<br>
><br>
> Cheers,<br>
> Cameron<br>
><br>
><br>
><br>
> Cameron Craig | Graduate Software Engineer | Exterity Limited<br>
> tel: <a href="tel:%2B44%201383%20828%20250">+44 1383 828 250</a> | fax: | mobile:<br>
> e: <a href="mailto:Cameron.Craig@exterity.com">Cameron.Craig@exterity.com</a> | w:
<a href="http://www.exterity.com" target="_blank">www.exterity.com</a><br>
><br>
><br>
><br>
> ____________________________________________________________________<br>
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