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<p class="MsoNormal"><span style="font-family:"Arial","sans-serif";color:#1F497D">Hi Cameron,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-family:"Arial","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#1F497D">I don’t think that the „boot performance“ is our issues. I understand section 3.5.4 that it would be very slow, but does not hang.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#1F497D">My console log is very similar to yours, but I have additional a post code logger and see after the 0x93 some postcodes from the FSP:<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:black">34 92 00 02 7F 10 00 50 7F
<br>
30s pause (FSP_M)<br>
00 2F 98 13 79 39 80 70 71 93<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:black">FSP_S:<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:black">00 0F 31 36 61 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 7F 30 31 36 0E 12 37</span><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#1F497D"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#1F497D">I opened an intel support case and hope they could help.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#1F497D">Regards,<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#1F497D">Paul<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span lang="EN-US" style="font-size:10.0pt;font-family:"Tahoma","sans-serif";mso-fareast-language:DE">Von:</span></b><span lang="EN-US" style="font-size:10.0pt;font-family:"Tahoma","sans-serif";mso-fareast-language:DE"> Cameron Craig
[mailto:Cameron.Craig@exterity.com] <br>
<b>Gesendet:</b> Dienstag, 3. Oktober 2017 17:</span><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif";mso-fareast-language:DE">52<br>
<b>An:</b> Paul Penz; 'coreboot@coreboot.org'<br>
<b>Betreff:</b> RE: Re: [coreboot] Intel Leaf Hill Coreboot Trouble<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><span lang="EN-GB">Hi all,<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB">I have enabled post codes and all the debug config options in coreboot that looked useful.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB">As Paul has already done, I have narrowed down the latest issue to the FspSiliconInit() stage (FSP-S).<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB">The 0x93 post code is the last message I get on the serial console, and signifies that FspSiliconInit() has started but not completed.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB">See (<a href="https://github.com/coreboot/coreboot/blob/master/src/include/console/post_codes.h">https://github.com/coreboot/coreboot/blob/master/src/include/console/post_codes.h</a>).<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB">I have attached the full serial log.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB">I can’t see how the actual FSP blob could be at fault here.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB">I don’t know if this is of help, but I came across this document:<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB"><a href="https://github.com/IntelFsp/FSP/raw/ApolloLake/ApolloLakeFspBinPkg/Docs/Apollo_Lake_FSP_Integration_Guide.pdf">https://github.com/IntelFsp/FSP/raw/ApolloLake/ApolloLakeFspBinPkg/Docs/Apollo_Lake_FSP_Integration_Guide.pdf</a><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB">Specifically section 3.5.4:<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB">“It is expected that boot loader will program MTRRs for SBSP as needed after TempRamExit but before entering FspSiliconInit. If MTRRs are not programmed properly, the boot performance might be impacted.”<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB">This “boot performance” may be part of the issue?<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB">Any thoughts would be appreciated, this mailing list has been helpful so far!<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB">Cheers,<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB">Cameron<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D"><o:p> </o:p></span></p>
<p class="imprintuniqueid"><span lang="EN-GB"> <o:p></o:p></span></p>
<p class="imprintuniqueid" style="margin-bottom:12.0pt"><b><span lang="EN-GB" style="font-family:"Arial","sans-serif";color:#005CAB">Cameron Craig</span></b><span lang="EN-GB" style="font-family:"Arial","sans-serif";color:#005CAB"> | Graduate Software Engineer |
<b>Exterity Limited</b></span><span lang="EN-GB"><br>
</span><span lang="EN-GB" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#005CAB">tel: +44 1383 828 250 | fax: </span><span lang="EN-GB"> <br>
</span><span lang="EN-GB" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#005CAB">e:
<a href="mailto:Cameron.Craig@exterity.com">Cameron.Craig@exterity.com</a> | w: <a href="http://www.exterity.com">
www.exterity.com</a></span><span lang="EN-GB"> <br>
<br>
<br>
<br>
</span><span lang="EN-GB" style="font-size:7.5pt;font-family:"Arial","sans-serif";color:#005CAB"><o:p></o:p></span></p>
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<p class="MsoNormal"><b><span lang="EN-US" style="font-size:10.0pt;font-family:"Tahoma","sans-serif";color:#005CAB;mso-fareast-language:EN-GB">From:</span></b><span lang="EN-US" style="font-size:10.0pt;font-family:"Tahoma","sans-serif";color:#005CAB;mso-fareast-language:EN-GB">
Cameron Craig <br>
<b>Sent:</b> 02 October 2017 11:19<br>
<b>To:</b> Cameron Craig; 'Paul Penz'; <a href="mailto:coreboot@coreboot.org">coreboot@coreboot.org</a><br>
<b>Subject:</b> RE: Re: [coreboot] Intel Leaf Hill Coreboot Trouble<o:p></o:p></span></p>
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<p class="MsoNormal"><span lang="EN-GB" style="color:#005CAB"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D">Hi Paul,<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D">Those changes to the IFWI blob worked great, thanks!<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D">I have attached the serial console log. It looks like we are in similar situations now.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D">I got a hang of around 45s at “MRC: region file invalid in 'RW_VAR_MRC_CACHE”,<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D">and then it hangs indefinitely at the end of the log.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D">I tracked the MRC cache message down to this line:
<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D"><a href="https://github.com/coreboot/coreboot/blob/master/src/soc/intel/common/mrc_cache.c#L272">https://github.com/coreboot/coreboot/blob/master/src/soc/intel/common/mrc_cache.c#L272</a><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D">I’m stuck again for the moment. Thanks again Paul for getting me one step closer.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D">Cheers,<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D">Cameron<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span lang="EN-US" style="font-size:10.0pt;font-family:"Tahoma","sans-serif";color:#005CAB;mso-fareast-language:EN-GB">From:</span></b><span lang="EN-US" style="font-size:10.0pt;font-family:"Tahoma","sans-serif";color:#005CAB;mso-fareast-language:EN-GB">
coreboot [<a href="mailto:coreboot-bounces@coreboot.org">mailto:coreboot-bounces@coreboot.org</a>]
<b>On Behalf Of </b>Cameron Craig<br>
<b>Sent:</b> 28 September 2017 16:51<br>
<b>To:</b> 'Paul Penz'; <a href="mailto:coreboot@coreboot.org">coreboot@coreboot.org</a><br>
<b>Subject:</b> Re: [coreboot] Intel Leaf Hill Coreboot Trouble<o:p></o:p></span></p>
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<p class="MsoNormal"><span lang="EN-GB" style="color:#005CAB"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D">Hi Paul,</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D">Great to hear I’m not the only one in this situation
</span><span lang="EN-GB" style="font-family:Wingdings;color:#1F497D">J</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D">I’ve just been using the IWFI file from Intel with no modifications, so I’ll look out the FIT tool and give that a go.</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D">Thanks,</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D">Cameron</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="color:#1F497D"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="imprintuniqueid"><span lang="EN-GB" style="color:#005CAB"> <o:p></o:p></span></p>
<p class="imprintuniqueid" style="margin-bottom:12.0pt"><b><span lang="EN-GB" style="font-family:"Arial","sans-serif";color:#005CAB">Cameron Craig</span></b><span lang="EN-GB" style="font-family:"Arial","sans-serif";color:#005CAB"> | Graduate Software Engineer |
<b>Exterity Limited</b></span><span lang="EN-GB" style="color:#005CAB"><br>
</span><span lang="EN-GB" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#005CAB">tel: +44 1383 828 250 | fax: </span><span lang="EN-GB" style="color:#005CAB"> <br>
</span><span lang="EN-GB" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#005CAB">e:
<a href="mailto:Cameron.Craig@exterity.com">Cameron.Craig@exterity.com</a> | w: <a href="http://www.exterity.com">
www.exterity.com</a></span><span lang="EN-GB" style="color:#005CAB"> <br>
<br>
</span><span lang="EN-GB" style="font-size:7.5pt;font-family:"Arial","sans-serif";color:#005CAB"><o:p></o:p></span></p>
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<p class="MsoNormal"><b><span lang="EN-US" style="font-size:10.0pt;font-family:"Tahoma","sans-serif";color:#005CAB;mso-fareast-language:EN-GB">From:</span></b><span lang="EN-US" style="font-size:10.0pt;font-family:"Tahoma","sans-serif";color:#005CAB;mso-fareast-language:EN-GB">
coreboot [<a href="mailto:coreboot-bounces@coreboot.org">mailto:coreboot-bounces@coreboot.org</a>]
<b>On Behalf Of </b>Paul Penz<br>
<b>Sent:</b> 28 September 2017 15:35<br>
<b>To:</b> <a href="mailto:coreboot@coreboot.org">coreboot@coreboot.org</a><br>
<b>Subject:</b> Re: [coreboot] Intel Leaf Hill Coreboot Trouble</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
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<p class="MsoNormal"><span lang="EN-GB" style="color:#005CAB"> <o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-family:"Arial","sans-serif";color:#005CAB">Hi Cameron,</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-family:"Arial","sans-serif";color:#005CAB"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB">I had the same problem.</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB">Had you modified the intel IFWI file ?</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB">If not, I had done this additional:</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB">Download 522538_apl txe hf 3.0.11.1131 (th2 & rs1).zip from intel</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB">Start fit.exe</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB">Load the IFWI file</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB">Change at Platform Protection/Platform Integrity OOEM Public Key Hash => 00..00</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB">Change at Platform Protection/Boot Guard Configuration/ Boot profile 2 => 0</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB">Save</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB">Now I get output on the console and postcodes, but during FSP_M a long pause of ca. 45s exists and it hangs later during FSP_P initialization.</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB">Good luck</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-family:"Arial","sans-serif";color:#005CAB">Paul</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#005CAB;mso-fareast-language:DE"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#005CAB;mso-fareast-language:DE"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#005CAB;mso-fareast-language:DE"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#005CAB;mso-fareast-language:DE">Paul Penz</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:9.0pt;font-family:"Arial","sans-serif";color:#005CAB;mso-fareast-language:DE">Dipl.-Ing. (FH)</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:9.0pt;font-family:"Arial","sans-serif";color:#005CAB;mso-fareast-language:DE">Senior Hardware Engineer</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#005CAB;mso-fareast-language:DE"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#005CAB;mso-fareast-language:DE">ELTEC Elektronik AG, Mainz</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="FR" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#005CAB;mso-fareast-language:DE">_________________________</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="FR" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#005CAB;mso-fareast-language:DE"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="FR" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#005CAB;mso-fareast-language:DE">Fon +49 6131 918 335</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="FR" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#005CAB;mso-fareast-language:DE">Fax +49 6131 918 195</span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="FR" style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#005CAB;mso-fareast-language:DE">Email
<a href="mailto:ppenz@eltec.de">ppenz@eltec.de</a></span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:10.0pt;font-family:"Arial","sans-serif";color:#005CAB;mso-fareast-language:DE">Web
<a href="http://www.eltec.de/">www.eltec.de</a></span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:#005CAB"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;font-family:"Times New Roman","serif";color:#005CAB;mso-fareast-language:EN-GB"> </span><span lang="EN-GB" style="color:#005CAB"><o:p></o:p></span></p>
<div class="MsoNormal" align="center" style="text-align:center"><span style="font-size:12.0pt;font-family:"Times New Roman","serif";color:#005CAB;mso-fareast-language:EN-GB">
<hr size="2" width="100%" align="center">
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<p class="MsoNormal"><span style="font-size:7.5pt;font-family:"Arial","sans-serif";color:gray;mso-fareast-language:EN-GB"><br>
*********************************************************<br>
ELTEC Elektronik AG<br>
Galileo-Galilei-Straße 11<br>
D-55129 Mainz<br>
<br>
Vorstand: Peter Albert<br>
Aufsichtsratsvorsitzender: Andreas Kochhäuser<br>
<br>
Registergericht: Amtsgericht Mainz<br>
Registernummer: HRB 7038<br>
Ust-ID: DE 149 049 790<br>
*********************************************************<br>
Wichtiger Hinweis:<br>
Diese E-Mail kann Betriebs- oder Geschäftsgeheimnisse oder sonstige vertrauliche Informationen enthalten. Sollten Sie diese E-Mail irrtümlich erhalten haben, ist Ihnen eine Kenntnisnahme des Inhalts, eine Vervielfältigung oder Weitergabe der E-Mail ausdrücklich
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Es gelten unsere Allgemeinen Geschäftsbedingungen, zu finden unter <a href="http://www.eltec.de">
www.eltec.de</a>.<br>
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______________________________________________________________________<br>
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<p class="MsoNormal"><span lang="EN-GB" style="font-size:12.0pt;font-family:"Times New Roman","serif";mso-fareast-language:DE"><br>
______________________________________________________________________<br>
This email has been scanned by the Symantec Email Security.cloud service.<br>
For more information please visit <a href="http://www.symanteccloud.com">http://www.symanteccloud.com</a><br>
______________________________________________________________________<o:p></o:p></span></p>
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<br>
<hr>
<font face="Arial" color="Gray" size="1"><br>
*********************************************************<br>
ELTEC Elektronik AG<br>
Galileo-Galilei-Straße 11<br>
D-55129 Mainz<br>
<br>
Vorstand: Peter Albert<br>
Aufsichtsratsvorsitzender: Andreas Kochhäuser<br>
<br>
Registergericht: Amtsgericht Mainz<br>
Registernummer: HRB 7038<br>
Ust-ID: DE 149 049 790<br>
*********************************************************<br>
Wichtiger Hinweis:<br>
Diese E-Mail kann Betriebs- oder Geschäftsgeheimnisse oder sonstige vertrauliche Informationen enthalten. Sollten Sie diese E-Mail irrtümlich erhalten haben, ist Ihnen eine Kenntnisnahme des Inhalts, eine Vervielfältigung oder Weitergabe der E-Mail ausdrücklich
untersagt.<br>
Bitte benachrichtigen Sie uns und vernichten Sie die empfangene E-Mail. Evtl. Anhänge dieser Nachricht wurden auf Viren überprüft!<br>
Jede Form von Vervielfältigung, Abänderung, Verbreitung oder Veröffentlichung dieser E-Mail Nachricht ist untersagt! Das Verwenden von Informationen aus dieser Nachricht für irgendwelche Zwecke ist strengstens untersagt.<br>
Es gelten unsere Allgemeinen Geschäftsbedingungen, zu finden unter www.eltec.de.<br>
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