<div dir="ltr">Since your board is a Broadwell-U, easiest way will be to extract it (along with the required refcode blob) from the generic/shellball image firmware for a Broadwell-U Chromebook (using cbfstool), which itself can be extracted from a ChromeOS recovery image. John Lewis wrote up some helpful instructions here: <a href="https://johnlewis.ie/extracting-the-shell-ball-rom-using-a-chromeos-image/">https://johnlewis.ie/extracting-the-shell-ball-rom-using-a-chromeos-image/</a><div>I'd recommend using the image for 'SAMUS', the Google Chromebook Pixel2.</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Sat, Jul 29, 2017 at 3:31 AM, Zheng Bao <span dir="ltr"><<a href="mailto:fishbaoz@hotmail.com" target="_blank">fishbaoz@hotmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
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<div>Hi, All,<br>
I am debugging a i7-5650 board. I use IBV's BIOS to wrap the coreboot, i.e, replace the BIOS Region with coreboot.rom.<br>
So I assume the ME blob can work.<br>
I wonder if it is the right way.<br>
<br>
Is it fully supported by Coreboot?<br>
How can we get MRC.bin and other blobs?<br>
<br>
Thanks.<br>
<br>
Zheng<br>
<br>
coreboot-4.6-891-gca74434-<wbr>dirty Fri Jul 28 06:45:02 UTC 2017 romstage starting...<br>
PM1_STS: 0000<br>
PM1_EN: 0000<br>
PM1_CNT: 00000000<br>
TCO_STS: 0000 0000<br>
GPE0_STS: 08fe08fc 12400f35 6005e200 00000000<br>
GPE0_EN: 00000000 00000000 00000000 00000000<br>
GEN_PMCON: 0200 2024 4206<br>
Previous Sleep State: S5<br>
CPU: Intel(R) Core(TM) i7-5650U CPU @ 2.20GHz<br>
CPU: ID 306d4, Broadwell E0 or F0, ucode: 0000001f<br>
CPU: AES supported, TXT supported, VT supported<br>
MCH: device id 1604 (rev 09) is Broadwell F0<br>
PCH: device id 9cc3 (rev 03) is Broadwell U Premium<br>
IGD: device id 1626 (rev 09) is Broadwell U GT3 (15W)<br>
CPU: frequency set to 2200 MHz<br>
SPD: index 0 (GPIO47=0 GPIO9=0 GPIO13=0)<br>
CBFS: 'Master Header Locator' located CBFS at [300100:3fffc0)<br>
CBFS: Locating 'spd.bin'<br>
CBFS: Found @ offset 43f00 size 1000<br>
SPD: module type is DDR3<br>
SPD: module part is 99U5469-011.A01LF<br>
SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb<br>
SPD: device width 16 bits, bus width 64 bits<br>
SPD: module size is 4096 MB (per channel)<br>
ME: FW Partition Table : OK<br>
ME: Bringup Loader Failure : NO<br>
ME: Firmware Init Complete : NO<br>
ME: Manufacturing Mode : YES<br>
ME: Boot Options Present : NO<br>
ME: Update In Progress : NO<br>
ME: Current Working State : Initializing<br>
ME: Current Operation State : Bring up<br>
ME: Current Operation Mode : Security Override via Jumper<br>
ME: Error Code : Debug Failure<br>
ME: Progress Phase : BUP Phase<br>
ME: Power Management Event : Pseudo-global reset<br>
ME: Progress Phase State : 0x7b<br>
ERROR: ME failed to respond<br>
FMAP: Found "FLASH" version 1.1 at 300000.<br>
FMAP: base = ffc00000 size = 400000 #areas = 3<br>
MRC: no data in 'RW_MRC_CACHE'<br>
No MRC cache found.<br>
CBFS: 'Master Header Locator' located CBFS at [300100:3fffc0)<br>
CBFS: Locating 'mrc.bin'<br>
CBFS: 'mrc.bin' not found.<br>
Couldn't find mrc.bin<br>
</div>
<br>
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