[coreboot] Flashing Coreboot on Lenovo G505s

Mike Banon mikebdp2 at gmail.com
Sun Sep 23 20:09:03 CEST 2018


Problem here is that the latest AMD microcodes officially released by
AMD at linux-firmware.git are far from being the latest... AMD's f15h
recent May 2018 commit contains a version 0x6001119 [2012-07-13]
microcode for TN (CPU ID 0x610F01). Although thats slightly more
recent than what coreboot has at the moment inside
F15TnMicrocodePatch0600110F_Enc.c file, I don't understand why AMD
didn't include 0x600111F [2018-03-05] despite it has been already
available as a part of UEFI updates as early as March 2018.

Please take a look at these two changes:
https://review.coreboot.org/c/coreboot/+/28273/ -
src/vendorcode/amd/agesa/f15tn: Update microcode to version 0x600111F
2018-03-05
https://review.coreboot.org/c/coreboot/+/28370/ -
src/vendorcode/amd/agesa/f16kb: Update microcode to version 0x7000110
2018-02-09
Sadly it seems they couldn't be merged to coreboot until AMD releases
these microcodes "officially" to linux-firmware.git . To avoid the
manual patching work I wrote some scripts to apply these unofficial
patches (with SHA256 checksum verification) :
https://review.coreboot.org/c/coreboot/+/28425/ - AMD microcodes:
scripts for applying the unofficial (not-merged-yet) updates

Although its' possible to manually upgrade that binary inside
linux-firmware.git to the truly latest version (with the help of
hexedit / Okteta) - its' not very convenient, and your microcode
version will always depend on your OS configuration. In addition,
there are some OS like KolibriOS which don't have any microcode
updating mechanism at all, so have to rely on coreboot in these cases
On Sun, Sep 23, 2018 at 8:57 PM Nico Huber <nico.h at gmx.de> wrote:
>
> On 9/23/18 7:26 PM, Matt B wrote:
> > Speaking of microcode, I've seen on other threads that the microcode has to
> > be manually updated for some boards, and for the g505s this is especially
> > complicate with many manual steps. Can anyone provide a more explicit
> > series of steps than the below? Is this something being worked on?
>
> I might be wrong on this (not experienced with AMD) but usually you can
> apply microcode updates much easier from the OS (e.g. firmware updates
> to a state sufficient to boot; OS updates to the final microcode with
> all current fixes).
>
> Nico
>
> --
> coreboot mailing list: coreboot at coreboot.org
> https://mail.coreboot.org/mailman/listinfo/coreboot



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