[coreboot] [G505S] Discrete GPU - trying to configure PCI correctly, need your help

Mike Banon mikebdp2 at gmail.com
Thu Nov 1 17:33:18 CET 2018


Finally we have succeeded in forcing coreboot to enable AMD discrete
GPU of Lenovo G505S and load its' AtomBIOS ROM there :-) (see P.S.)
But that's not enough - seems that a correct PCI config is needed!
Otherwise, without a nomodeset option there is a strange kernel panic
at the very beginning of booting, and with nomodeset this dGPU is
simply disabled at Linux - later modprobe'ing a driver doesn't work.

We will appreciate if you could take a quick glance and tell what PCI
config space bits are wrong there, and we will try a hack of multiple
config space writes according to your ideas

coreinfo_pci_with_0_02_00_enabled - extracted with coreinfo before
trying to boot Linux

1) Bridge (enabled)

.C. 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00: 22 10 12 14 07 00 10 00 00 00 04 06 10 00 01 00
10: 00 00 00 00 00 00 00 00 00 01 01 00 11 11 00 00
20: 00 F0 00 F0 01 E0 F1 EF 00 00 00 00 00 00 00 00
30: 00 00 00 00 50 00 00 00 00 00 00 00 00 01 03 00
40: all 00's
50: 01 58 03 C8 00 00 00 00 10 A0 42 01 21 80 00 00
60: 30 28 00 00 02 0D 70 00 00 00 82 B0 00 00 04 00
70: 00 00 48 01 00 00 01 00 00 00 00 00 1F 00 70 00
80: 06 80 00 00 06 00 00 00 02 00 00 00 00 00 00 00
90: all 00's
A0: 05 B0 80 00 00 00 00 00 00 00 00 00 00 00 00 00
B0: 0D B8 00 00 22 10 34 12 08 00 03 A8 00 00 00 00
C0-D0: all 00's
E0: 50 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00
F0: all 00's

2) Discrete GPU (R5 M230) behind the bridge

.F. 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00: 02 10 65 66 03 00 10 00 00 00 80 03 10 00 00 00
10: 0C 00 00 E0 00 00 00 00 04 00 00 F0 00 00 00 00
20: 01 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 04 F0 48 00 00 00 00 00 00 00 00 01 00 00
40: 00 00 00 00 00 00 00 00 09 50 08 00 00 00 00 00
50: 01 58 03 76 00 00 00 00 10 A0 12 00 A1 8F 00 00
60: 30 28 00 00 82 0C 40 00 00 00 82 10 00 00 00 00
70: all 00's
80: 00 00 00 00 0E 00 00 00 02 00 00 00 00 00 00 00
90: all 00's
A0: 05 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00
B0-F0: all 00's

If more info is needed, all the PCI config spaces and their
differences are highlighted at this "hybrid PDF" (editable with
LibreOffice Writer), view it in your web browser here -
https://github.com/mikebdp2/coreboot-related/blob/master/PCI.pdf -
also attached to an e-mail. There are the pages like
"dont_enable_bridge_and_let_it_configure_in_linux : normalmode vs
nomodeset", "coreinfo_PCI_with_0_02_00_enabled" and also the PCI
config spaces of proprietary UEFI normalmode - discrete GPU is working
there! - as well as UEFI nomodeset (to get an understanding what
normalmode vs nomodeset differences are acceptable and maybe try to
apply this logic to coreboot's situation to understand how a
coreboot's normalmode could have looked if no kernel panic) . UEFI
config space can't be copied blindly because e.g. a different ROM
address is OK and should be preserved , but some bits could be
borrowed to ensure a correct configuration.

P.S. 1) discrete GPU = PCI device 01:00.0 / 04:00.0 with
VID,PID=1002,6665 (for R5 M230) - or ,6663 (for HD 8570M) - is behind
a PCI bridge 00:02.0 with VID,PID=1022,1412 . At
coreboot/src/mainboard/lenovo/g505s/devicetree.cb there is a line 32 :
device pci 2.0 off end
===> Change it to
device pci 2.0 on end
2) at ./coreboot/src/device/pci_device.c --> pci_dev_init, lines 784-787:

   /* Only execute VGA ROMs. */
   if (((dev->class >> 8) != PCI_CLASS_DISPLAY_VGA))
return;

PCI device classes are declared at
./coreboot/src/include/device/pci_ids.h , e.g. lines 31-35 :

#define PCI_BASE_CLASS_DISPLAY      0x03
#define PCI_CLASS_DISPLAY_VGA      0x0300
#define PCI_CLASS_DISPLAY_XGA      0x0301
#define PCI_CLASS_DISPLAY_3D      0x0302
#define PCI_CLASS_DISPLAY_OTHER      0x0380

Inserted printk's told us that dev->class for dGPU is 28672 = 0x38000
, right shift by 8 bits : ( 0x38000 >> 8 ) = 0x0380 - this is
PCI_CLASS_DISPLAY_OTHER . Expanded the code above to

   /* Only execute VGA ROMs. */
   if ((((dev->class >> 8) != PCI_CLASS_DISPLAY_VGA))&&(((dev->class
>> 8) != PCI_CLASS_DISPLAY_OTHER))) {
      printk(BIOS_DEBUG, "((dev->class >> 8) !=
PCI_CLASS_DISPLAY_VGA), PCI_CLASS_DISPLAY_OTHER also\n");
      return;
   }

and now it loads the AtomBIOS ROM on a discrete GPU also (but a
correct PCI config is still needed to get it working, please see
above)

Best regards,
Mike Banon
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