[coreboot] Exception on Skylake after enabling ACPI timer emulation

[Piotr Król]

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On 05/17/2018 05:21 PM, Banik, Subrata wrote:

Hi Subrata,

> Can you please check few more things and please help to clarify
> some details.
> 
> 1. Is this kind of regression ? because we are not seeing this
> issue.

Can't tell that it is first time I try to enable Skylake in coreboot.

> 2. I believe its FSP1.1 selection in Kconfig, please confirm ?

FSP2.0, I'm following Librem Purism options since they seem to boot
the same SoC. They use KabyLake FSP obtained by get_blobss.sh [1], if
you think this is incorrect then I would like to know why, because it
may mean that Pursim code is also incorrect from Intel point of view.

> 3. Please check if BIOS_RESET_CPL is already set prior to setting
> 0x121 MSR Refer to code enable_bios_reset_cpl

Will do that and get back with result.

> As per my debug MSR 0x121 will only through exception if BIOS
> reset cpl done bits are already set before this call, which
> shouldn't be the case, otherwise all SKL design might see this
> issue.
Would be great to know in which document I can read about this MSR.

[1]
https://github.com/osresearch/heads/blob/master/blobs/librem_skl/get_blo
bs.sh

Best Regards,
- -- 
Piotr Król
Embedded Systems Consultant
https://3mdeb.com | @3mdeb_com
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