[coreboot] board status: REACTS uploads incomplete console messages for Asus KGPE-D16
Paul Menzel
paulepanter at users.sourceforge.net
Tue Feb 28 21:42:17 CET 2017
Dear Timothy, dear coreboot folks,
Looking through the board status logs, I noticed that at least for the
Asus KGPE-D16 the coreboot console message (ramstage) are incomplete
[1].
Searching for the string `Show resources in subtree`, shows that it
happened between the following two reports uploaded several months ago.
```
3768284a9 asus/kgpe-d16/4.4-292-g9891b4a/2016-05-20T02_11_58Z # good [2]
ac209a115 asus/kgpe-d16/4.4-343-g1716375/2016-05-30T13_15_24Z # bad [3]
```
The lines dropped down from over 3.000 to under 1.000.
As some uploads are “missing” in between, I guess some maintenance work
was done on the test stand causing the regression.
It’s also not a code issue, as Daniel and I get the full logs with no
issues [4].
It’d be great if the test stand could be checked, and repaired.
Thanks,
Paul
[1] https://review.coreboot.org/cgit/board-status.git/diff/asus/kgpe-d16/4.5-1089-g068edc1/2017-02-28T15_30_06Z/coreboot_console.txt?id=9297e0f2431dbf6d8cfdea0dd446a9098fa89d34
[2] https://review.coreboot.org/cgit/board-status.git/commit/?id=3768284a9
[3] https://review.coreboot.org/cgit/board-status.git/commit/?id=ac209a115
[4] https://review.coreboot.org/cgit/board-status.git/commit/?id=8e7fe74b18ecd903623447ac150efe08e1ec03b2
[5] https://www.raptorengineering.com/coreboot/autotest/logs/1488182375-3-18503,2.log.bz2
-------------- next part --------------
coreboot-4.3-1142-g9891b4a-dirty-RAPTOR-NORMAL Fri May 20 02:11:58 UTC 2016 romstage starting...
Initial stack pointer: 000dff38
POST: 0x30
CPU APICID 00 start flag set
POST: 0x32
POST: 0x66
BSP Family_Model: 00600f20
*sysinfo range: [000c2d40,000cd28c]
bsp_apicid = 00
cpu_init_detectedx = 00000000
sb700 reset flags: 0004
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'microcode_amd.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Unmatched 'cmos_layout.bin' at 29e40
CBFS: Checking offset 2ad00
CBFS: File @ offset 2ad00 size 256b
CBFS: Unmatched 'fallback/dsdt.aml' at 2ad00
CBFS: Checking offset 2d2c0
CBFS: File @ offset 2d2c0 size 660
CBFS: Unmatched 'payload_config' at 2d2c0
CBFS: Checking offset 2d980
CBFS: File @ offset 2d980 size ee
CBFS: Unmatched 'payload_revision' at 2d980
CBFS: Checking offset 2dac0
CBFS: File @ offset 2dac0 size 1ec4
CBFS: Unmatched 'microcode_amd_fam15h.bin' at 2dac0
CBFS: Checking offset 2fa00
CBFS: File @ offset 2fa00 size 1
CBFS: Unmatched 'etc/pci-optionrom-exec' at 2fa00
CBFS: Checking offset 2fa80
CBFS: File @ offset 2fa80 size 418
CBFS: Unmatched '' at 2fa80
CBFS: Checking offset 2fec0
CBFS: File @ offset 2fec0 size 10000
CBFS: Unmatched 's3nv' at 2fec0
CBFS: Checking offset 3ff00
CBFS: File @ offset 3ff00 size 14fff
CBFS: Unmatched 'fallback/ramstage' at 3ff00
CBFS: Checking offset 54f40
CBFS: File @ offset 54f40 size 7000
CBFS: Unmatched 'vgaroms/seavgabios.bin' at 54f40
CBFS: Checking offset 5bfc0
CBFS: File @ offset 5bfc0 size f47d
CBFS: Unmatched 'fallback/payload' at 5bfc0
CBFS: Checking offset 6b480
CBFS: File @ offset 6b480 size 318c
CBFS: Found @ offset 6b480 size 318c
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'microcode_amd_fam15h.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Unmatched 'cmos_layout.bin' at 29e40
CBFS: Checking offset 2ad00
CBFS: File @ offset 2ad00 size 256b
*** Log truncated, F19653 characters dropped. ***
POST: 0x41
amdmct_cbmem_store_info: Storing AMDMCT configuration in CBMEM
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
disable_spd()
prepare_romstage_ramstack: Prepare CAR migration and stack regions...memset_: Fill [003f5400-003fffff] ...prepare_romstage_ramstack: Done
post_cache_as_ram: Copying data from cache to RAM...memcpy_: Copy [000c2c00-000cd2bf] to [003f5940 - 003fffff] ...post_cache_as_ram: Done
post_cache_as_ram: Verifying data integrity in RAM...memcmp_: Compare [000c2c00-000cd2bf] with [003f5940 - 003fffff] ...post_cache_as_ram: Done
post_cache_as_ram: Switching to use RAM as stack...cache_as_ram_new_stack: Top about 003f592c ... Done
cache_as_ram_new_stack: Disabling cache as ram now
prepare_ramstage_region: Prepare ramstage memory region...memset_: Fill [00000000-003f53ff] ...
coreboot-4.3-1142-g9891b4a-dirty-RAPTOR-NORMAL Fri May 20 02:11:58 UTC 2016 ramstage starting...
POST: 0x39
Moving GDT to b7ffe9e0...ok
POST: 0x80
Normal boot.
POST: 0x70
BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0
POST: 0x71
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0
POST: 0x72
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.1: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 1
PCI: 00:0a.0: enabled 1
PCI: 00:0b.0: enabled 1
PCI: 00:0c.0: enabled 1
PCI: 00:0d.0: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.1: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
I2C: 00:52: enabled 1
I2C: 00:53: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:2f: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.106: enabled 0
PNP: 002e.107: enabled 0
PNP: 002e.207: enabled 0
PNP: 002e.307: enabled 0
PNP: 002e.407: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.108: enabled 0
PNP: 002e.9: enabled 0
PNP: 002e.109: enabled 0
PNP: 002e.209: enabled 0
PNP: 002e.309: enabled 0
PNP: 002e.a: enabled 1
PNP: 002e.b: enabled 1
PNP: 002e.c: enabled 0
PNP: 002e.d: enabled 0
PNP: 002e.f: enabled 0
PCI: 00:14.4: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 1
PCI: 00:19.2: enabled 1
PCI: 00:19.3: enabled 1
PCI: 00:19.4: enabled 1
PCI: 00:19.5: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1a.1: enabled 1
PCI: 00:1a.2: enabled 1
PCI: 00:1a.3: enabled 1
PCI: 00:1a.4: enabled 1
PCI: 00:1a.5: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1b.1: enabled 1
PCI: 00:1b.2: enabled 1
PCI: 00:1b.3: enabled 1
PCI: 00:1b.4: enabled 1
PCI: 00:1b.5: enabled 1
Compare with tree...
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.1: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 1
PCI: 00:0a.0: enabled 1
PCI: 00:0b.0: enabled 1
PCI: 00:0c.0: enabled 1
PCI: 00:0d.0: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.1: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
I2C: 00:52: enabled 1
I2C: 00:53: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:2f: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.106: enabled 0
PNP: 002e.107: enabled 0
PNP: 002e.207: enabled 0
PNP: 002e.307: enabled 0
PNP: 002e.407: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.108: enabled 0
PNP: 002e.9: enabled 0
PNP: 002e.109: enabled 0
PNP: 002e.209: enabled 0
PNP: 002e.309: enabled 0
PNP: 002e.a: enabled 1
PNP: 002e.b: enabled 1
PNP: 002e.c: enabled 0
PNP: 002e.d: enabled 0
PNP: 002e.f: enabled 0
PCI: 00:14.4: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 1
PCI: 00:19.2: enabled 1
PCI: 00:19.3: enabled 1
PCI: 00:19.4: enabled 1
PCI: 00:19.5: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1a.1: enabled 1
PCI: 00:1a.2: enabled 1
PCI: 00:1a.3: enabled 1
PCI: 00:1a.4: enabled 1
PCI: 00:1a.5: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1b.1: enabled 1
PCI: 00:1b.2: enabled 1
PCI: 00:1b.3: enabled 1
PCI: 00:1b.4: enabled 1
PCI: 00:1b.5: enabled 1
Mainboard KGPE-D16 Enable. dev=0x0012c600
mainboard_enable, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000
mainboard_enable, TOP MEM2: msr2.lo = 0x40000000, msr2.hi = 0x00000008
Root Device scanning...
root_dev_scan_bus for Root Device
setup_bsp_ramtop, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000
setup_bsp_ramtop, TOP MEM2: msr.lo = 0x40000000, msr.hi = 0x00000008
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
CPU_CLUSTER: 0 scanning...
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
PCI: 00:18.5 siblings=7
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
CPU: APIC: 02 enabled
CPU: APIC: 03 enabled
CPU: APIC: 04 enabled
CPU: APIC: 05 enabled
CPU: APIC: 06 enabled
CPU: APIC: 07 enabled
PCI: 00:19.5 siblings=7
CPU: APIC: 08 enabled
CPU: APIC: 09 enabled
CPU: APIC: 0a enabled
CPU: APIC: 0b enabled
CPU: APIC: 0c enabled
CPU: APIC: 0d enabled
CPU: APIC: 0e enabled
CPU: APIC: 0f enabled
scan_bus: scanning of bus CPU_CLUSTER: 0 took 1175 usecs
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:18.0 [1022/1600] bus ops
PCI: 00:18.0 [1022/1600] enabled
PCI: 00:18.1 [1022/1601] enabled
PCI: 00:18.2 [1022/1602] enabled
PCI: 00:18.3 [1022/1603] ops
PCI: 00:18.3 [1022/1603] enabled
PCI: 00:18.4 [1022/1604] ops
PCI: 00:18.4 [1022/1604] enabled
PCI: 00:18.5 [1022/1605] ops
PCI: 00:18.5 [1022/1605] enabled
PCI: 00:19.0 [1022/1600] bus ops
PCI: 00:19.0 [1022/1600] enabled
PCI: 00:19.1 [1022/1601] enabled
PCI: 00:19.2 [1022/1602] enabled
PCI: 00:19.3 [1022/1603] ops
PCI: 00:19.3 [1022/1603] enabled
PCI: 00:19.4 [1022/1604] ops
PCI: 00:19.4 [1022/1604] enabled
PCI: 00:19.5 [1022/1605] ops
PCI: 00:19.5 [1022/1605] enabled
PCI: Static device PCI: 00:1a.0 not found, disabling it.
PCI: Static device PCI: 00:1a.1 not found, disabling it.
PCI: Static device PCI: 00:1a.2 not found, disabling it.
PCI: Static device PCI: 00:1a.3 not found, disabling it.
PCI: Static device PCI: 00:1a.4 not found, disabling it.
PCI: Static device PCI: 00:1a.5 not found, disabling it.
PCI: Static device PCI: 00:1b.0 not found, disabling it.
PCI: Static device PCI: 00:1b.1 not found, disabling it.
PCI: Static device PCI: 00:1b.2 not found, disabling it.
PCI: Static device PCI: 00:1b.3 not found, disabling it.
PCI: Static device PCI: 00:1b.4 not found, disabling it.
PCI: Static device PCI: 00:1b.5 not found, disabling it.
POST: 0x25
PCI: 00:18.0 scanning...
do_hypertransport_scan_chain for bus 00
sr5650_enable: dev=0012ee80, VID_DID=0x5a101002
Bus-0, Dev-0, Fun-0.
enable_pcie_bar3
sr5650_gpp_sb_init: nb_dev=0x0012ee80, dev=0x0012e8e0, port=0x8
PciePowerOffGppPorts() port 8
NB_PCI_REG04 = 2.
NB_PCI_REG84 = 3000010.
NB_PCI_REG4C = 52042.
Sysmem TOM = 0_c0000000
Sysmem TOM2 = 8_40000000
PCI: 00:00.0 [1002/5a10] ops
PCI: 00:00.0 [1002/5a10] enabled
Capability: type 0x08 @ 0xf0
flags: 0xa803
Capability: type 0x08 @ 0xf0
Capability: type 0x08 @ 0xc4
flags: 0x0280
PCI: 00:00.0 count: 0014 static_count: 0015
PCI: 00:00.0 [1002/5a10] enabled next_unitid: 0015
PCI: pci_scan_bus for bus 00
POST: 0x24
sr5650_enable: dev=0012ee80, VID_DID=0x5a101002
Bus-0, Dev-0, Fun-0.
enable_pcie_bar3
sr5650_gpp_sb_init: nb_dev=0x0012ee80, dev=0x0012e8e0, port=0x8
PciePowerOffGppPorts() port 8
NB_PCI_REG04 = 2.
NB_PCI_REG84 = 3000010.
NB_PCI_REG4C = 52042.
Sysmem TOM = 0_c0000000
Sysmem TOM2 = 8_40000000
PCI: 00:00.0 [1002/5a10] enabled
sr5650_enable: dev=0012ede0, VID_DID=0xffffffff
Bus-0, Dev-0, Fun-1.
PCI: Static device PCI: 00:00.1 not found, disabling it.
sr5650_enable: dev=0012ed40, VID_DID=0x5a231002
Bus-0, Dev-0, Fun-2.
PCI: 00:00.2 [1002/5a23] ops
PCI: 00:00.2 [1002/5a23] enabled
sr5650_enable: dev=0012eca0, VID_DID=0xffffffff
Bus-0, Dev-2,3, Fun-0. enable=1
sr5650_gpp_sb_init: nb_dev=0x0012ee80, dev=0x0012eca0, port=0x2
PcieLinkTraining port=2:lc current state=1020304
sr5650_gpp_sb_init: port=0x2 hw_port=0x2 result=0
PciePowerOffGppPorts() port 2
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:02.0 subordinate bus PCI Express
PCI: 00:02.0 [1002/5a16] enabled
sr5650_enable: dev=0012ec00, VID_DID=0xffffffff
Bus-0, Dev-2,3, Fun-0. enable=0
sr5650_enable: dev=0012eb60, VID_DID=0xffffffff
enable_pcie_bar3
Bus-0, Dev-4,5,6,7, Fun-0. enable=1
sr5650_gpp_sb_init: nb_dev=0x0012ee80, dev=0x0012eb60, port=0x4
PcieLinkTraining port=4:lc current state=2030400
sr5650_gpp_sb_init: port=0x4 hw_port=0x4 result=0
PciePowerOffGppPorts() port 4
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:04.0 subordinate bus PCI Express
PCI: 00:04.0 [1002/5a18] enabled
sr5650_enable: dev=0012eac0, VID_DID=0xffffffff
enable_pcie_bar3
Bus-0, Dev-4,5,6,7, Fun-0. enable=0
sr5650_enable: dev=0012ea20, VID_DID=0xffffffff
enable_pcie_bar3
Bus-0, Dev-4,5,6,7, Fun-0. enable=0
sr5650_enable: dev=0012e980, VID_DID=0xffffffff
enable_pcie_bar3
Bus-0, Dev-4,5,6,7, Fun-0. enable=0
sr5650_enable: dev=0012e8e0, VID_DID=0xffffffff
Bus-0, Dev-8, Fun-0. enable=0
disable_pcie_bar3
sr5650_enable: dev=0012e840, VID_DID=0xffffffff
Bus-0, Dev-9, 10, Fun-0. enable=1
enable_pcie_bar3
sr5650_gpp_sb_init: nb_dev=0x0012ee80, dev=0x0012e840, port=0x9
PcieLinkTraining port=5:lc current state=a0b0f10
addr=c0000000,bus=0,devfn=48
PcieTrainPort reg=0x10000
sr5650_gpp_sb_init: port=0x9 hw_port=0x5 result=1
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:09.0 subordinate bus PCI Express
PCI: 00:09.0 [1002/5a1c] enabled
sr5650_enable: dev=0012e7a0, VID_DID=0xffffffff
Bus-0, Dev-9, 10, Fun-0. enable=1
enable_pcie_bar3
sr5650_gpp_sb_init: nb_dev=0x0012ee80, dev=0x0012e7a0, port=0xa
PcieLinkTraining port=6:lc current state=a0b0f10
addr=c0000000,bus=0,devfn=50
PcieTrainPort reg=0x10000
sr5650_gpp_sb_init: port=0xa hw_port=0x6 result=1
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:0a.0 subordinate bus PCI Express
PCI: 00:0a.0 [1002/5a1d] enabled
sr5650_enable: dev=0012e700, VID_DID=0xffffffff
Bus-0, Dev-11,12, Fun-0. enable=1
sr5650_gpp_sb_init: nb_dev=0x0012ee80, dev=0x0012e700, port=0xb
PcieLinkTraining port=b:lc current state=2030400
sr5650_gpp_sb_init: port=0xb hw_port=0xb result=0
PciePowerOffGppPorts() port 11
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:0b.0 subordinate bus PCI Express
PCI: 00:0b.0 [1002/5a1f] enabled
sr5650_enable: dev=0012e660, VID_DID=0xffffffff
Bus-0, Dev-11,12, Fun-0. enable=1
sr5650_gpp_sb_init: nb_dev=0x0012ee80, dev=0x0012e660, port=0xc
PcieLinkTraining port=c:lc current state=2030400
sr5650_gpp_sb_init: port=0xc hw_port=0xc result=0
PciePowerOffGppPorts() port 12
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:0c.0 subordinate bus PCI Express
PCI: 00:0c.0 [1002/5a20] enabled
sr5650_enable: dev=0012e5c0, VID_DID=0xffffffff
sr5650_gpp_sb_init: nb_dev=0x0012ee80, dev=0x0012e5c0, port=0xd
PcieLinkTraining port=d:lc current state=2030400
sr5650_gpp_sb_init: port=0xd hw_port=0xd result=0
PciePowerOffGppPorts() port 13
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:0d.0 subordinate bus PCI Express
PCI: 00:0d.0 [1002/5a1e] enabled
sb7xx_51xx_enable()
PCI: 00:11.0 [1002/4394] ops
PCI: 00:11.0 [1002/4394] enabled
sb7xx_51xx_enable()
PCI: 00:12.0 [1002/4397] ops
PCI: 00:12.0 [1002/4397] enabled
sb7xx_51xx_enable()
PCI: 00:12.1 [1002/4398] ops
PCI: 00:12.1 [1002/4398] enabled
sb7xx_51xx_enable()
PCI: 00:12.2 [1002/4396] ops
PCI: 00:12.2 [1002/4396] enabled
sb7xx_51xx_enable()
PCI: 00:13.0 [1002/4397] ops
PCI: 00:13.0 [1002/4397] enabled
sb7xx_51xx_enable()
PCI: 00:13.1 [1002/4398] ops
PCI: 00:13.1 [1002/4398] enabled
sb7xx_51xx_enable()
PCI: 00:13.2 [1002/4396] ops
PCI: 00:13.2 [1002/4396] enabled
sb7xx_51xx_enable()
PCI: 00:14.0 [1002/4385] bus ops
PCI: 00:14.0 [1002/4385] enabled
sb7xx_51xx_enable()
PCI: 00:14.1 [1002/439c] ops
PCI: 00:14.1 [1002/439c] enabled
sb7xx_51xx_enable()
PCI: 00:14.2 [1002/4383] ops
PCI: 00:14.2 [1002/4383] enabled
sb7xx_51xx_enable()
PCI: 00:14.3 [1002/439d] bus ops
PCI: 00:14.3 [1002/439d] enabled
sb7xx_51xx_enable()
PCI: 00:14.4 [1002/4384] bus ops
PCI: 00:14.4 [1002/4384] enabled
sb7xx_51xx_enable()
PCI: 00:14.5 [1002/4399] ops
PCI: 00:14.5 [1002/4399] enabled
POST: 0x25
PCI: 00:02.0 scanning...
do_pci_scan_bridge for PCI: 00:02.0
PCI: pci_scan_bus for bus 01
POST: 0x24
POST: 0x25
POST: 0x55
scan_bus: scanning of bus PCI: 00:02.0 took 24 usecs
PCI: 00:04.0 scanning...
do_pci_scan_bridge for PCI: 00:04.0
PCI: pci_scan_bus for bus 02
POST: 0x24
POST: 0x25
POST: 0x55
scan_bus: scanning of bus PCI: 00:04.0 took 24 usecs
PCI: 00:09.0 scanning...
do_pci_scan_bridge for PCI: 00:09.0
PCI: pci_scan_bus for bus 03
POST: 0x24
PCI: 03:00.0 [8086/10d3] enabled
POST: 0x25
POST: 0x55
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpointASPM: Enabled None
scan_bus: scanning of bus PCI: 00:09.0 took 124 usecs
PCI: 00:0a.0 scanning...
do_pci_scan_bridge for PCI: 00:0a.0
PCI: pci_scan_bus for bus 04
POST: 0x24
PCI: 04:00.0 [8086/10d3] enabled
POST: 0x25
POST: 0x55
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpointASPM: Enabled None
scan_bus: scanning of bus PCI: 00:0a.0 took 124 usecs
PCI: 00:0b.0 scanning...
do_pci_scan_bridge for PCI: 00:0b.0
PCI: pci_scan_bus for bus 05
POST: 0x24
POST: 0x25
POST: 0x55
scan_bus: scanning of bus PCI: 00:0b.0 took 24 usecs
PCI: 00:0c.0 scanning...
do_pci_scan_bridge for PCI: 00:0c.0
PCI: pci_scan_bus for bus 06
POST: 0x24
POST: 0x25
POST: 0x55
scan_bus: scanning of bus PCI: 00:0c.0 took 24 usecs
PCI: 00:0d.0 scanning...
do_pci_scan_bridge for PCI: 00:0d.0
PCI: pci_scan_bus for bus 07
POST: 0x24
POST: 0x25
POST: 0x55
scan_bus: scanning of bus PCI: 00:0d.0 took 24 usecs
PCI: 00:14.0 scanning...
scan_smbus for PCI: 00:14.0
smbus: PCI: 00:14.0[0]->I2C: 01:50 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:51 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:52 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:53 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:54 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:55 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:56 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:57 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:2f enabled
scan_smbus for PCI: 00:14.0 done
scan_bus: scanning of bus PCI: 00:14.0 took 11 usecs
PCI: 00:14.3 scanning...
scan_lpc_bus for PCI: 00:14.3
PNP: 002e.0 disabled
PNP: 002e.1 disabled
PNP: 002e.2 enabled
PNP: 002e.3 enabled
PNP: 002e.5 enabled
PNP: 002e.106 disabled
PNP: 002e.107 disabled
PNP: 002e.207 disabled
PNP: 002e.307 disabled
PNP: 002e.407 disabled
PNP: 002e.8 disabled
PNP: 002e.108 disabled
PNP: 002e.9 disabled
PNP: 002e.109 disabled
PNP: 002e.209 disabled
PNP: 002e.309 disabled
PNP: 002e.a enabled
PNP: 002e.b enabled
PNP: 002e.c disabled
PNP: 002e.d disabled
PNP: 002e.f disabled
scan_lpc_bus for PCI: 00:14.3 done
scan_bus: scanning of bus PCI: 00:14.3 took 277 usecs
PCI: 00:14.4 scanning...
do_pci_scan_bridge for PCI: 00:14.4
PCI: pci_scan_bus for bus 08
POST: 0x24
sb7xx_51xx_enable()
PCI: 08:01.0 [1a03/2000] ops
PCI: 08:01.0 [1a03/2000] enabled
sb7xx_51xx_enable()
PCI: 08:02.0 [11c1/5811] enabled
sb7xx_51xx_enable()
PCI: Static device PCI: 08:03.0 not found, disabling it.
POST: 0x25
POST: 0x55
scan_bus: scanning of bus PCI: 00:14.4 took 54 usecs
POST: 0x55
scan_bus: scanning of bus PCI: 00:18.0 took 941825 usecs
PCI: 00:19.0 scanning...
scan_bus: scanning of bus PCI: 00:19.0 took 1 usecs
POST: 0x55
DOMAIN: 0000 passpw: enabled
DOMAIN: 0000 passpw: enabled
scan_bus: scanning of bus DOMAIN: 0000 took 941916 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 943097 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 943413 exit 1
POST: 0x73
found VGA at PCI: 08:01.0
Setting up VGA for PCI: 08:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:14.4
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
Reserving CC6 save segment base: 838000000 size: 08000000
DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 2
PCI: 00:18.0 read_resources bus 0 link: 2 done
PCI: 00:18.0 read_resources bus 0 link: 3
PCI: 00:18.0 read_resources bus 0 link: 3 done
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1
sr5690_read_resource: PCI: 00:00.0
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
PCI: 00:02.0 read_resources bus 1 link: 0
PCI: 00:02.0 read_resources bus 1 link: 0 done
PCI: 00:04.0 read_resources bus 2 link: 0
PCI: 00:04.0 read_resources bus 2 link: 0 done
PCI: 00:09.0 read_resources bus 3 link: 0
PCI: 00:09.0 read_resources bus 3 link: 0 done
PCI: 00:0a.0 read_resources bus 4 link: 0
PCI: 00:0a.0 read_resources bus 4 link: 0 done
PCI: 00:0b.0 read_resources bus 5 link: 0
PCI: 00:0b.0 read_resources bus 5 link: 0 done
PCI: 00:0c.0 read_resources bus 6 link: 0
PCI: 00:0c.0 read_resources bus 6 link: 0 done
PCI: 00:0d.0 read_resources bus 7 link: 0
PCI: 00:0d.0 read_resources bus 7 link: 0 done
PCI: 00:14.0 read_resources bus 1 link: 0
I2C: 01:50 missing read_resources
I2C: 01:51 missing read_resources
I2C: 01:52 missing read_resources
I2C: 01:53 missing read_resources
I2C: 01:54 missing read_resources
I2C: 01:55 missing read_resources
I2C: 01:56 missing read_resources
I2C: 01:57 missing read_resources
PCI: 00:14.0 read_resources bus 1 link: 0 done
PCI: 00:14.3 read_resources bus 0 link: 0
PCI: 00:14.3 read_resources bus 0 link: 0 done
PCI: 00:14.4 read_resources bus 8 link: 0
PCI: 00:14.4 read_resources bus 8 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1 done
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
PCI: 00:18.4 read_resources bus 0 link: 0
PCI: 00:18.4 read_resources bus 0 link: 0 done
PCI: 00:18.4 read_resources bus 0 link: 1
PCI: 00:18.4 read_resources bus 0 link: 1 done
PCI: 00:18.4 read_resources bus 0 link: 2
PCI: 00:18.4 read_resources bus 0 link: 2 done
PCI: 00:18.4 read_resources bus 0 link: 3
PCI: 00:18.4 read_resources bus 0 link: 3 done
PCI: 00:19.0 read_resources bus 0 link: 3
PCI: 00:19.0 read_resources bus 0 link: 3 done
PCI: 00:19.0 read_resources bus 0 link: 2
PCI: 00:19.0 read_resources bus 0 link: 2 done
PCI: 00:19.0 read_resources bus 0 link: 0
PCI: 00:19.0 read_resources bus 0 link: 0 done
PCI: 00:19.0 read_resources bus 0 link: 1
PCI: 00:19.0 read_resources bus 0 link: 1 done
PCI: 00:19.4 read_resources bus 0 link: 0
PCI: 00:19.4 read_resources bus 0 link: 0 done
PCI: 00:19.4 read_resources bus 0 link: 1
PCI: 00:19.4 read_resources bus 0 link: 1 done
PCI: 00:19.4 read_resources bus 0 link: 2
PCI: 00:19.4 read_resources bus 0 link: 2 done
PCI: 00:19.4 read_resources bus 0 link: 3
PCI: 00:19.4 read_resources bus 0 link: 3 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: 01
APIC: 02
APIC: 03
APIC: 04
APIC: 05
APIC: 06
APIC: 07
APIC: 08
APIC: 09
APIC: 0a
APIC: 0b
APIC: 0c
APIC: 0d
APIC: 0e
APIC: 0f
DOMAIN: 0000 child on link 0 PCI: 00:18.0
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
DOMAIN: 0000 resource base c0000000 size 10000000 align 28 gran 28 limit ffffffffffffffff flags f0000200 index c0010058
DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7
DOMAIN: 0000 resource base 838000000 size 8000000 align 0 gran 0 limit 0 flags f0004200 index 8
PCI: 00:18.0
PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 110b0
PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 110b8
PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 110d8
PCI: 00:00.0
PCI: 00:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 1200 index fc
PCI: 00:00.1
PCI: 00:00.2
PCI: 00:00.2 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 10000200 index 44
PCI: 00:02.0
PCI: 00:02.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:03.0
PCI: 00:04.0
PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:05.0
PCI: 00:06.0
PCI: 00:07.0
PCI: 00:08.0
PCI: 00:09.0 child on link 0 PCI: 03:00.0
PCI: 00:09.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 03:00.0
PCI: 03:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
PCI: 03:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c
PCI: 00:0a.0 child on link 0 PCI: 04:00.0
PCI: 00:0a.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 04:00.0
PCI: 04:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
PCI: 04:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
PCI: 04:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c
PCI: 00:0b.0
PCI: 00:0b.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:0c.0
PCI: 00:0c.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:0d.0
PCI: 00:0d.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:11.0
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:11.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24
PCI: 00:12.0
PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:12.1
PCI: 00:12.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:12.2
PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:13.0
PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:13.1
PCI: 00:13.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:13.2
PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:14.0 child on link 0 I2C: 01:50
PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74
PCI: 00:14.0 resource base feb00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 9c
PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4
PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90
PCI: 00:14.0 resource base b20 size 10 align 8 gran 8 limit ffff flags d0000100 index 58
I2C: 01:50
I2C: 01:51
I2C: 01:52
I2C: 01:53
I2C: 01:54
I2C: 01:55
I2C: 01:56
I2C: 01:57
I2C: 01:2f
PCI: 00:14.1
PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:14.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:14.2
PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
PCI: 00:14.3 child on link 0 PNP: 002e.0
PCI: 00:14.3 resource base 0 size 1 align 12 gran 0 limit ffffffff flags 200 index a0
PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 002e.0
PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.1
PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2
PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.3
PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.5
PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
PNP: 002e.106
PNP: 002e.106 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62
PNP: 002e.107
PNP: 002e.207
PNP: 002e.307
PNP: 002e.407
PNP: 002e.8
PNP: 002e.108
PNP: 002e.9
PNP: 002e.109
PNP: 002e.209
PNP: 002e.309
PNP: 002e.a
PNP: 002e.b
PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags c0000100 index 60
PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.c
PNP: 002e.d
PNP: 002e.f
PCI: 00:14.4 child on link 0 PCI: 08:01.0
PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 08:01.0
PCI: 08:01.0 resource base 0 size 800000 align 23 gran 23 limit ffffffff flags 200 index 10
PCI: 08:01.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 14
PCI: 08:01.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 18
PCI: 08:02.0
PCI: 08:02.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 08:03.0
PCI: 00:14.5
PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:18.1
PCI: 00:18.2
PCI: 00:18.3
PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94
PCI: 00:18.4
PCI: 00:18.5
PCI: 00:19.0
PCI: 00:19.1
PCI: 00:19.2
PCI: 00:19.3
PCI: 00:19.4
PCI: 00:19.5
PCI: 00:1a.0
PCI: 00:1a.1
PCI: 00:1a.2
PCI: 00:1a.3
PCI: 00:1a.4
PCI: 00:1a.5
PCI: 00:1b.0
PCI: 00:1b.1
PCI: 00:1b.2
PCI: 00:1b.3
PCI: 00:1b.4
PCI: 00:1b.5
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:18.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:02.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:02.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:09.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 03:00.0 18 * [0x0 - 0x1f] io
PCI: 00:09.0 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:0a.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 04:00.0 18 * [0x0 - 0x1f] io
PCI: 00:0a.0 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 08:01.0 18 * [0x0 - 0x7f] io
PCI: 00:14.4 io: base: 80 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:09.0 1c * [0x0 - 0xfff] io
PCI: 00:0a.0 1c * [0x1000 - 0x1fff] io
PCI: 00:14.4 1c * [0x2000 - 0x2fff] io
PCI: 00:11.0 20 * [0x3000 - 0x300f] io
PCI: 00:14.1 20 * [0x3010 - 0x301f] io
PCI: 00:11.0 10 * [0x3020 - 0x3027] io
PCI: 00:11.0 18 * [0x3028 - 0x302f] io
PCI: 00:14.1 10 * [0x3030 - 0x3037] io
PCI: 00:14.1 18 * [0x3038 - 0x303f] io
PCI: 00:11.0 14 * [0x3040 - 0x3043] io
PCI: 00:11.0 1c * [0x3044 - 0x3047] io
PCI: 00:14.1 14 * [0x3048 - 0x304b] io
PCI: 00:14.1 1c * [0x304c - 0x304f] io
PCI: 00:18.0 io: base: 3050 size: 4000 align: 12 gran: 12 limit: ffff done
PCI: 00:18.0 110d8 * [0x0 - 0x3fff] io
DOMAIN: 0000 io: base: 4000 size: 4000 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:18.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
PCI: 00:02.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:02.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:0a.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:0a.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:00.0 fc * [0x0 - 0xff] prefmem
PCI: 00:18.0 prefmem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:18.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
PCI: 00:02.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:02.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:09.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 03:00.0 10 * [0x0 - 0x1ffff] mem
PCI: 03:00.0 1c * [0x20000 - 0x23fff] mem
PCI: 00:09.0 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:0a.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 04:00.0 10 * [0x0 - 0x1ffff] mem
PCI: 04:00.0 1c * [0x20000 - 0x23fff] mem
PCI: 00:0a.0 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:0b.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:0b.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:0c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:0c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 08:01.0 10 * [0x0 - 0x7fffff] mem
PCI: 08:01.0 14 * [0x800000 - 0x81ffff] mem
PCI: 08:02.0 10 * [0x820000 - 0x820fff] mem
PCI: 00:14.4 mem: base: 821000 size: 900000 align: 23 gran: 20 limit: ffffffff done
PCI: 00:14.4 20 * [0x0 - 0x8fffff] mem
PCI: 00:09.0 20 * [0x900000 - 0x9fffff] mem
PCI: 00:0a.0 20 * [0xa00000 - 0xafffff] mem
PCI: 00:00.2 44 * [0xb00000 - 0xb03fff] mem
PCI: 00:14.2 10 * [0xb04000 - 0xb07fff] mem
PCI: 00:12.0 10 * [0xb08000 - 0xb08fff] mem
PCI: 00:12.1 10 * [0xb09000 - 0xb09fff] mem
PCI: 00:13.0 10 * [0xb0a000 - 0xb0afff] mem
PCI: 00:13.1 10 * [0xb0b000 - 0xb0bfff] mem
PCI: 00:14.5 10 * [0xb0c000 - 0xb0cfff] mem
PCI: 00:11.0 24 * [0xb0d000 - 0xb0d3ff] mem
PCI: 00:12.2 10 * [0xb0e000 - 0xb0e0ff] mem
PCI: 00:13.2 10 * [0xb0f000 - 0xb0f0ff] mem
PCI: 00:14.3 a0 * [0xb10000 - 0xb10000] mem
PCI: 00:18.0 mem: base: b10001 size: c00000 align: 23 gran: 20 limit: ffffffff done
PCI: 00:18.3 94 * [0x0 - 0x3ffffff] mem
PCI: 00:18.0 110b8 * [0x4000000 - 0x4bfffff] mem
PCI: 00:18.0 110b0 * [0x4c00000 - 0x4cfffff] prefmem
DOMAIN: 0000 mem: base: 4d00000 size: 4d00000 align: 26 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: DOMAIN: 0000 c0010058 base c0000000 limit cfffffff mem (fixed)
constrain_resources: DOMAIN: 0000 07 base 00000000 limit bfffffff mem (fixed)
constrain_resources: DOMAIN: 0000 08 base 838000000 limit 83fffffff mem (fixed)
constrain_resources: PCI: 00:14.0 74 base fec00000 limit fec00fff mem (fixed)
constrain_resources: PCI: 00:14.0 b4 base fed00000 limit fed003ff mem (fixed)
constrain_resources: PCI: 00:14.0 90 base 00000b00 limit 00000b0f io (fixed)
constrain_resources: PCI: 00:14.0 58 base 00000b20 limit 00000b2f io (fixed)
constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:14.3 10000100 base ff800000 limit ffffffff mem (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base f8000000 limit ffffffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:4000 align:12 gran:0 limit:ffff
PCI: 00:18.0 110d8 * [0x1000 - 0x4fff] io
DOMAIN: 0000 io: next_base: 5000 size: 4000 align: 12 gran: 0 done
PCI: 00:18.0 io: base:1000 size:4000 align:12 gran:12 limit:4fff
PCI: 00:09.0 1c * [0x1000 - 0x1fff] io
PCI: 00:0a.0 1c * [0x2000 - 0x2fff] io
PCI: 00:14.4 1c * [0x3000 - 0x3fff] io
PCI: 00:11.0 20 * [0x4000 - 0x400f] io
PCI: 00:14.1 20 * [0x4010 - 0x401f] io
PCI: 00:11.0 10 * [0x4020 - 0x4027] io
PCI: 00:11.0 18 * [0x4028 - 0x402f] io
PCI: 00:14.1 10 * [0x4030 - 0x4037] io
PCI: 00:14.1 18 * [0x4038 - 0x403f] io
PCI: 00:11.0 14 * [0x4040 - 0x4043] io
PCI: 00:11.0 1c * [0x4044 - 0x4047] io
PCI: 00:14.1 14 * [0x4048 - 0x404b] io
PCI: 00:14.1 1c * [0x404c - 0x404f] io
PCI: 00:18.0 io: next_base: 4050 size: 4000 align: 12 gran: 12 done
PCI: 00:02.0 io: base:4fff size:0 align:12 gran:12 limit:4fff
PCI: 00:02.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done
PCI: 00:04.0 io: base:4fff size:0 align:12 gran:12 limit:4fff
PCI: 00:04.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done
PCI: 00:09.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff
PCI: 03:00.0 18 * [0x1000 - 0x101f] io
PCI: 00:09.0 io: next_base: 1020 size: 1000 align: 12 gran: 12 done
PCI: 00:0a.0 io: base:2000 size:1000 align:12 gran:12 limit:2fff
PCI: 04:00.0 18 * [0x2000 - 0x201f] io
PCI: 00:0a.0 io: next_base: 2020 size: 1000 align: 12 gran: 12 done
PCI: 00:0b.0 io: base:4fff size:0 align:12 gran:12 limit:4fff
PCI: 00:0b.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done
PCI: 00:0c.0 io: base:4fff size:0 align:12 gran:12 limit:4fff
PCI: 00:0c.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done
PCI: 00:0d.0 io: base:4fff size:0 align:12 gran:12 limit:4fff
PCI: 00:0d.0 io: next_base: 4fff size: 0 align: 12 gran: 12 done
PCI: 00:14.4 io: base:3000 size:1000 align:12 gran:12 limit:3fff
PCI: 08:01.0 18 * [0x3000 - 0x307f] io
PCI: 00:14.4 io: next_base: 3080 size: 1000 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:f8000000 size:4d00000 align:26 gran:0 limit:ffffffff
PCI: 00:18.3 94 * [0xf8000000 - 0xfbffffff] mem
PCI: 00:18.0 110b8 * [0xfc000000 - 0xfcbfffff] mem
PCI: 00:18.0 110b0 * [0xfcc00000 - 0xfccfffff] prefmem
DOMAIN: 0000 mem: next_base: fcd00000 size: 4d00000 align: 26 gran: 0 done
PCI: 00:18.0 prefmem: base:fcc00000 size:100000 align:20 gran:20 limit:fccfffff
PCI: 00:00.0 fc * [0xfcc00000 - 0xfcc000ff] prefmem
PCI: 00:18.0 prefmem: next_base: fcc00100 size: 100000 align: 20 gran: 20 done
PCI: 00:02.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:02.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:04.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:04.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:09.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:09.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:0a.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:0a.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:0b.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:0b.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:0c.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:0c.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:0d.0 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:0d.0 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 prefmem: base:fccfffff size:0 align:20 gran:20 limit:fccfffff
PCI: 00:14.4 prefmem: next_base: fccfffff size: 0 align: 20 gran: 20 done
PCI: 00:18.0 mem: base:fc000000 size:c00000 align:23 gran:20 limit:fcbfffff
PCI: 00:14.4 20 * [0xfc000000 - 0xfc8fffff] mem
PCI: 00:09.0 20 * [0xfc900000 - 0xfc9fffff] mem
PCI: 00:0a.0 20 * [0xfca00000 - 0xfcafffff] mem
PCI: 00:00.2 44 * [0xfcb00000 - 0xfcb03fff] mem
PCI: 00:14.2 10 * [0xfcb04000 - 0xfcb07fff] mem
PCI: 00:12.0 10 * [0xfcb08000 - 0xfcb08fff] mem
PCI: 00:12.1 10 * [0xfcb09000 - 0xfcb09fff] mem
PCI: 00:13.0 10 * [0xfcb0a000 - 0xfcb0afff] mem
PCI: 00:13.1 10 * [0xfcb0b000 - 0xfcb0bfff] mem
PCI: 00:14.5 10 * [0xfcb0c000 - 0xfcb0cfff] mem
PCI: 00:11.0 24 * [0xfcb0d000 - 0xfcb0d3ff] mem
PCI: 00:12.2 10 * [0xfcb0e000 - 0xfcb0e0ff] mem
PCI: 00:13.2 10 * [0xfcb0f000 - 0xfcb0f0ff] mem
PCI: 00:14.3 a0 * [0xfcb10000 - 0xfcb10000] mem
PCI: 00:18.0 mem: next_base: fcb10001 size: c00000 align: 23 gran: 20 done
PCI: 00:02.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff
PCI: 00:02.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done
PCI: 00:04.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff
PCI: 00:04.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done
PCI: 00:09.0 mem: base:fc900000 size:100000 align:20 gran:20 limit:fc9fffff
PCI: 03:00.0 10 * [0xfc900000 - 0xfc91ffff] mem
PCI: 03:00.0 1c * [0xfc920000 - 0xfc923fff] mem
PCI: 00:09.0 mem: next_base: fc924000 size: 100000 align: 20 gran: 20 done
PCI: 00:0a.0 mem: base:fca00000 size:100000 align:20 gran:20 limit:fcafffff
PCI: 04:00.0 10 * [0xfca00000 - 0xfca1ffff] mem
PCI: 04:00.0 1c * [0xfca20000 - 0xfca23fff] mem
PCI: 00:0a.0 mem: next_base: fca24000 size: 100000 align: 20 gran: 20 done
PCI: 00:0b.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff
PCI: 00:0b.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done
PCI: 00:0c.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff
PCI: 00:0c.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done
PCI: 00:0d.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff
PCI: 00:0d.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 mem: base:fc000000 size:900000 align:23 gran:20 limit:fc8fffff
PCI: 08:01.0 10 * [0xfc000000 - 0xfc7fffff] mem
PCI: 08:01.0 14 * [0xfc800000 - 0xfc81ffff] mem
PCI: 08:02.0 10 * [0xfc820000 - 0xfc820fff] mem
PCI: 00:14.4 mem: next_base: fc821000 size: 900000 align: 23 gran: 20 done
Root Device assign_resources, bus 0 link: 0
0: mmio_basek=00300000, basek=00400000, limitk=01100000
1: mmio_basek=00300000, basek=01100000, limitk=02100000
DOMAIN: 0000 assign_resources, bus 0 link: 0
VGA: PCI: 00:18.0 (aka node 0) link 1 has VGA device
PCI: 00:18.0 111b8 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem <node 0 link 1>
PCI: 00:18.0 110b0 <- [0x00fcc00000 - 0x00fccfffff] size 0x00100000 gran 0x14 prefmem <node 0 link 1>
PCI: 00:18.0 110b8 <- [0x00fc000000 - 0x00fcbfffff] size 0x00c00000 gran 0x14 mem <node 0 link 1>
PCI: 00:18.0 110d8 <- [0x0000001000 - 0x0000004fff] size 0x00004000 gran 0x0c io <node 0 link 1>
PCI: 00:18.0 assign_resources, bus 0 link: 1
PCI: 00:00.0 sr5690_set_resources
sr5690_set_resources: PCI: 00:00.0[0x1c] base = c0000000 limit = cfffffff
PCI: 00:00.0 c0010058 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c mem <mmconfig>
sr5690_set_resources: PCI: 00:18.1 <- index a8 base c00003 limit cfff90
PCI: 00:00.0 fc <- [0x00fcc00000 - 0x00fcc000ff] size 0x00000100 gran 0x08 prefmem
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
PCI: 00:00.2 44 <- [0x00fcb00000 - 0x00fcb03fff] size 0x00004000 gran 0x0e mem
PCI: 00:02.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:02.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:02.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:04.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:04.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:04.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:09.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 03 io
PCI: 00:09.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:09.0 20 <- [0x00fc900000 - 0x00fc9fffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 00:09.0 assign_resources, bus 3 link: 0
PCI: 03:00.0 10 <- [0x00fc900000 - 0x00fc91ffff] size 0x00020000 gran 0x11 mem
PCI: 03:00.0 18 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io
PCI: 03:00.0 1c <- [0x00fc920000 - 0x00fc923fff] size 0x00004000 gran 0x0e mem
PCI: 00:09.0 assign_resources, bus 3 link: 0
PCI: 00:0a.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 04 io
PCI: 00:0a.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:0a.0 20 <- [0x00fca00000 - 0x00fcafffff] size 0x00100000 gran 0x14 bus 04 mem
PCI: 00:0a.0 assign_resources, bus 4 link: 0
PCI: 04:00.0 10 <- [0x00fca00000 - 0x00fca1ffff] size 0x00020000 gran 0x11 mem
PCI: 04:00.0 18 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io
PCI: 04:00.0 1c <- [0x00fca20000 - 0x00fca23fff] size 0x00004000 gran 0x0e mem
PCI: 00:0a.0 assign_resources, bus 4 link: 0
PCI: 00:0b.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 05 io
PCI: 00:0b.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 05 prefmem
PCI: 00:0b.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 05 mem
PCI: 00:0c.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 06 io
PCI: 00:0c.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 06 prefmem
PCI: 00:0c.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 06 mem
PCI: 00:0d.0 1c <- [0x0000004fff - 0x0000004ffe] size 0x00000000 gran 0x0c bus 07 io
PCI: 00:0d.0 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 07 prefmem
PCI: 00:0d.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 07 mem
PCI: 00:11.0 10 <- [0x0000004020 - 0x0000004027] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x0000004040 - 0x0000004043] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x0000004028 - 0x000000402f] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x0000004044 - 0x0000004047] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000004000 - 0x000000400f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00fcb0d000 - 0x00fcb0d3ff] size 0x00000400 gran 0x0a mem
PCI: 00:12.0 10 <- [0x00fcb08000 - 0x00fcb08fff] size 0x00001000 gran 0x0c mem
PCI: 00:12.1 10 <- [0x00fcb09000 - 0x00fcb09fff] size 0x00001000 gran 0x0c mem
PCI: 00:12.2 10 <- [0x00fcb0e000 - 0x00fcb0e0ff] size 0x00000100 gran 0x08 mem
PCI: 00:13.0 10 <- [0x00fcb0a000 - 0x00fcb0afff] size 0x00001000 gran 0x0c mem
PCI: 00:13.1 10 <- [0x00fcb0b000 - 0x00fcb0bfff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00fcb0f000 - 0x00fcb0f0ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.0 assign_resources, bus 1 link: 0
PCI: 00:14.0 assign_resources, bus 1 link: 0
PCI: 00:14.1 10 <- [0x0000004030 - 0x0000004037] size 0x00000008 gran 0x03 io
PCI: 00:14.1 14 <- [0x0000004048 - 0x000000404b] size 0x00000004 gran 0x02 io
PCI: 00:14.1 18 <- [0x0000004038 - 0x000000403f] size 0x00000008 gran 0x03 io
PCI: 00:14.1 1c <- [0x000000404c - 0x000000404f] size 0x00000004 gran 0x02 io
PCI: 00:14.1 20 <- [0x0000004010 - 0x000000401f] size 0x00000010 gran 0x04 io
PCI: 00:14.2 10 <- [0x00fcb04000 - 0x00fcb07fff] size 0x00004000 gran 0x0e mem64
PCI: 00:14.3 a0 <- [0x00fcb10000 - 0x00fcb10000] size 0x00000001 gran 0x00 mem
PCI: 00:14.3 assign_resources, bus 0 link: 0
PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PNP: 002e.b 60 <- [0x0000000290 - 0x0000000291] size 0x00000002 gran 0x01 io
ERROR: PNP: 002e.b 70 irq size: 0x0000000001 not assigned
PCI: 00:14.3 assign_resources, bus 0 link: 0
PCI: 00:14.4 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 08 io
PCI: 00:14.4 24 <- [0x00fccfffff - 0x00fccffffe] size 0x00000000 gran 0x14 bus 08 prefmem
PCI: 00:14.4 20 <- [0x00fc000000 - 0x00fc8fffff] size 0x00900000 gran 0x14 bus 08 mem
PCI: 00:14.4 assign_resources, bus 8 link: 0
PCI: 08:01.0 10 <- [0x00fc000000 - 0x00fc7fffff] size 0x00800000 gran 0x17 mem
PCI: 08:01.0 14 <- [0x00fc800000 - 0x00fc81ffff] size 0x00020000 gran 0x11 mem
PCI: 08:01.0 18 <- [0x0000003000 - 0x000000307f] size 0x00000080 gran 0x07 io
PCI: 08:02.0 10 <- [0x00fc820000 - 0x00fc820fff] size 0x00001000 gran 0x0c mem
PCI: 00:14.4 assign_resources, bus 8 link: 0
PCI: 00:14.5 10 <- [0x00fcb0c000 - 0x00fcb0cfff] size 0x00001000 gran 0x0c mem
PCI: 00:18.0 assign_resources, bus 0 link: 1
PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem <gart>
PCI: 00:19.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem <gart>
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: 01
APIC: 02
APIC: 03
APIC: 04
APIC: 05
APIC: 06
APIC: 07
APIC: 08
APIC: 09
APIC: 0a
APIC: 0b
APIC: 0c
APIC: 0d
APIC: 0e
APIC: 0f
DOMAIN: 0000 child on link 0 PCI: 00:18.0
DOMAIN: 0000 resource base 1000 size 4000 align 12 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base f8000000 size 4d00000 align 26 gran 0 limit ffffffff flags 40040200 index 10000100
DOMAIN: 0000 resource base c0000000 size 10000000 align 28 gran 28 limit ffffffffffffffff flags f0000200 index c0010058
DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7
DOMAIN: 0000 resource base 838000000 size 8000000 align 0 gran 0 limit 0 flags f0004200 index 8
DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
DOMAIN: 0000 resource base c0000 size bff40000 align 0 gran 0 limit 0 flags e0004200 index 20
DOMAIN: 0000 resource base 100000000 size 340000000 align 0 gran 0 limit 0 flags e0004200 index 30
DOMAIN: 0000 resource base 440000000 size 400000000 align 0 gran 0 limit 0 flags e0004200 index 41
PCI: 00:18.0
PCI: 00:18.0 resource base fcc00000 size 100000 align 20 gran 20 limit fccfffff flags 60081200 index 110b0
PCI: 00:18.0 resource base fc000000 size c00000 align 23 gran 20 limit fcbfffff flags 60080200 index 110b8
PCI: 00:18.0 resource base 1000 size 4000 align 12 gran 12 limit 4fff flags 60080100 index 110d8
PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags e0000200 index 111b8
PCI: 00:00.0
PCI: 00:00.0 resource base fcc00000 size 100 align 12 gran 8 limit fcc000ff flags 60001200 index fc
PCI: 00:00.1
PCI: 00:00.2
PCI: 00:00.2 resource base fcb00000 size 4000 align 14 gran 14 limit fcb03fff flags 70000200 index 44
PCI: 00:02.0
PCI: 00:02.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c
PCI: 00:02.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:02.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20
PCI: 00:03.0
PCI: 00:04.0
PCI: 00:04.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c
PCI: 00:04.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:04.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20
PCI: 00:05.0
PCI: 00:06.0
PCI: 00:07.0
PCI: 00:08.0
PCI: 00:09.0 child on link 0 PCI: 03:00.0
PCI: 00:09.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
PCI: 00:09.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:09.0 resource base fc900000 size 100000 align 20 gran 20 limit fc9fffff flags 60080202 index 20
PCI: 03:00.0
PCI: 03:00.0 resource base fc900000 size 20000 align 17 gran 17 limit fc91ffff flags 60000200 index 10
PCI: 03:00.0 resource base 1000 size 20 align 5 gran 5 limit 101f flags 60000100 index 18
PCI: 03:00.0 resource base fc920000 size 4000 align 14 gran 14 limit fc923fff flags 60000200 index 1c
PCI: 00:0a.0 child on link 0 PCI: 04:00.0
PCI: 00:0a.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
PCI: 00:0a.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:0a.0 resource base fca00000 size 100000 align 20 gran 20 limit fcafffff flags 60080202 index 20
PCI: 04:00.0
PCI: 04:00.0 resource base fca00000 size 20000 align 17 gran 17 limit fca1ffff flags 60000200 index 10
PCI: 04:00.0 resource base 2000 size 20 align 5 gran 5 limit 201f flags 60000100 index 18
PCI: 04:00.0 resource base fca20000 size 4000 align 14 gran 14 limit fca23fff flags 60000200 index 1c
PCI: 00:0b.0
PCI: 00:0b.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c
PCI: 00:0b.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:0b.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20
PCI: 00:0c.0
PCI: 00:0c.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c
PCI: 00:0c.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:0c.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20
PCI: 00:0d.0
PCI: 00:0d.0 resource base 4fff size 0 align 12 gran 12 limit 4fff flags 60080102 index 1c
PCI: 00:0d.0 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:0d.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20
PCI: 00:11.0
PCI: 00:11.0 resource base 4020 size 8 align 3 gran 3 limit 4027 flags 60000100 index 10
PCI: 00:11.0 resource base 4040 size 4 align 2 gran 2 limit 4043 flags 60000100 index 14
PCI: 00:11.0 resource base 4028 size 8 align 3 gran 3 limit 402f flags 60000100 index 18
PCI: 00:11.0 resource base 4044 size 4 align 2 gran 2 limit 4047 flags 60000100 index 1c
PCI: 00:11.0 resource base 4000 size 10 align 4 gran 4 limit 400f flags 60000100 index 20
PCI: 00:11.0 resource base fcb0d000 size 400 align 12 gran 10 limit fcb0d3ff flags 60000200 index 24
PCI: 00:12.0
PCI: 00:12.0 resource base fcb08000 size 1000 align 12 gran 12 limit fcb08fff flags 60000200 index 10
PCI: 00:12.1
PCI: 00:12.1 resource base fcb09000 size 1000 align 12 gran 12 limit fcb09fff flags 60000200 index 10
PCI: 00:12.2
PCI: 00:12.2 resource base fcb0e000 size 100 align 12 gran 8 limit fcb0e0ff flags 60000200 index 10
PCI: 00:13.0
PCI: 00:13.0 resource base fcb0a000 size 1000 align 12 gran 12 limit fcb0afff flags 60000200 index 10
PCI: 00:13.1
PCI: 00:13.1 resource base fcb0b000 size 1000 align 12 gran 12 limit fcb0bfff flags 60000200 index 10
PCI: 00:13.2
PCI: 00:13.2 resource base fcb0f000 size 100 align 12 gran 8 limit fcb0f0ff flags 60000200 index 10
PCI: 00:14.0 child on link 0 I2C: 01:50
PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74
PCI: 00:14.0 resource base feb00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 9c
PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4
PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90
PCI: 00:14.0 resource base b20 size 10 align 8 gran 8 limit ffff flags d0000100 index 58
I2C: 01:50
I2C: 01:51
I2C: 01:52
I2C: 01:53
I2C: 01:54
I2C: 01:55
I2C: 01:56
I2C: 01:57
I2C: 01:2f
PCI: 00:14.1
PCI: 00:14.1 resource base 4030 size 8 align 3 gran 3 limit 4037 flags 60000100 index 10
PCI: 00:14.1 resource base 4048 size 4 align 2 gran 2 limit 404b flags 60000100 index 14
PCI: 00:14.1 resource base 4038 size 8 align 3 gran 3 limit 403f flags 60000100 index 18
PCI: 00:14.1 resource base 404c size 4 align 2 gran 2 limit 404f flags 60000100 index 1c
PCI: 00:14.1 resource base 4010 size 10 align 4 gran 4 limit 401f flags 60000100 index 20
PCI: 00:14.2
PCI: 00:14.2 resource base fcb04000 size 4000 align 14 gran 14 limit fcb07fff flags 60000201 index 10
PCI: 00:14.3 child on link 0 PNP: 002e.0
PCI: 00:14.3 resource base fcb10000 size 1 align 12 gran 0 limit fcb10000 flags 60000200 index a0
PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 002e.0
PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.1
PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2
PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60
PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.3
PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60
PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.5
PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62
PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72
PNP: 002e.106
PNP: 002e.106 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62
PNP: 002e.107
PNP: 002e.207
PNP: 002e.307
PNP: 002e.407
PNP: 002e.8
PNP: 002e.108
PNP: 002e.9
PNP: 002e.109
PNP: 002e.209
PNP: 002e.309
PNP: 002e.a
PNP: 002e.b
PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags e0000100 index 60
PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.c
PNP: 002e.d
PNP: 002e.f
PCI: 00:14.4 child on link 0 PCI: 08:01.0
PCI: 00:14.4 resource base 3000 size 1000 align 12 gran 12 limit 3fff flags 60080102 index 1c
PCI: 00:14.4 resource base fccfffff size 0 align 20 gran 20 limit fccfffff flags 60081202 index 24
PCI: 00:14.4 resource base fc000000 size 900000 align 23 gran 20 limit fc8fffff flags 60080202 index 20
PCI: 08:01.0
PCI: 08:01.0 resource base fc000000 size 800000 align 23 gran 23 limit fc7fffff flags 60000200 index 10
PCI: 08:01.0 resource base fc800000 size 20000 align 17 gran 17 limit fc81ffff flags 60000200 index 14
PCI: 08:01.0 resource base 3000 size 80 align 7 gran 7 limit 307f flags 60000100 index 18
PCI: 08:01.0 resource base a0000 size 1fc00 align 0 gran 0 limit 0 flags f0000200 index 3
PCI: 08:02.0
PCI: 08:02.0 resource base fc820000 size 1000 align 12 gran 12 limit fc820fff flags 60000200 index 10
PCI: 08:03.0
PCI: 00:14.5
PCI: 00:14.5 resource base fcb0c000 size 1000 align 12 gran 12 limit fcb0cfff flags 60000200 index 10
PCI: 00:18.1
PCI: 00:18.2
PCI: 00:18.3
PCI: 00:18.3 resource base f8000000 size 4000000 align 26 gran 26 limit fbffffff flags 60000200 index 94
PCI: 00:18.4
PCI: 00:18.5
PCI: 00:19.0
PCI: 00:19.1
PCI: 00:19.2
PCI: 00:19.3
PCI: 00:19.4
PCI: 00:19.5
PCI: 00:1a.0
PCI: 00:1a.1
PCI: 00:1a.2
PCI: 00:1a.3
PCI: 00:1a.4
PCI: 00:1a.5
PCI: 00:1b.0
PCI: 00:1b.1
PCI: 00:1b.2
PCI: 00:1b.3
PCI: 00:1b.4
PCI: 00:1b.5
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 1 run 5303 exit 0
POST: 0x74
Enabling resources...
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1043/8163
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1043/8163
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 cmd <- 00
PCI: 00:19.0 cmd <- 00
PCI: 00:19.1 subsystem <- 1043/8163
PCI: 00:19.1 cmd <- 00
PCI: 00:19.2 subsystem <- 1043/8163
PCI: 00:19.2 cmd <- 00
PCI: 00:19.3 cmd <- 00
PCI: 00:19.4 cmd <- 00
PCI: 00:19.5 cmd <- 00
PCI: 00:00.0 subsystem <- 1043/8163
PCI: 00:00.0 cmd <- 02
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
Initializing IOMMU
PCI: 00:02.0 bridge ctrl <- 0003
PCI: 00:02.0 cmd <- 00
PCI: 00:04.0 bridge ctrl <- 0003
PCI: 00:04.0 cmd <- 00
PCI: 00:09.0 bridge ctrl <- 0003
PCI: 00:09.0 cmd <- 07
PCI: 00:0a.0 bridge ctrl <- 0003
PCI: 00:0a.0 cmd <- 07
PCI: 00:0b.0 bridge ctrl <- 0003
PCI: 00:0b.0 cmd <- 00
PCI: 00:0c.0 bridge ctrl <- 0003
PCI: 00:0c.0 cmd <- 00
PCI: 00:0d.0 bridge ctrl <- 0003
PCI: 00:0d.0 cmd <- 00
PCI: 00:11.0 subsystem <- 1043/8163
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 subsystem <- 1043/8163
PCI: 00:12.0 cmd <- 02
PCI: 00:12.1 subsystem <- 1043/8163
PCI: 00:12.1 cmd <- 02
PCI: 00:12.2 subsystem <- 1043/8163
PCI: 00:12.2 cmd <- 02
PCI: 00:13.0 subsystem <- 1043/8163
PCI: 00:13.0 cmd <- 02
PCI: 00:13.1 subsystem <- 1043/8163
PCI: 00:13.1 cmd <- 02
PCI: 00:13.2 subsystem <- 1043/8163
PCI: 00:13.2 cmd <- 02
PCI: 00:14.0 subsystem <- 1043/8163
PCI: 00:14.0 cmd <- 403
PCI: 00:14.1 subsystem <- 1043/8163
PCI: 00:14.1 cmd <- 01
PCI: 00:14.2 subsystem <- 1043/8163
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1043/8163
PCI: 00:14.3 cmd <- 0f
sb700 lpc decode:PNP: 002e.2, base=0x000003f8, end=0x000003ff
sb700 lpc decode:PNP: 002e.3, base=0x000002f8, end=0x000002ff
sb700 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060
sb700 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064
sb700 lpc decode:PNP: 002e.b, base=0x00000290, end=0x00000291
PCI: 00:14.4 bridge ctrl <- 000b
PCI: 00:14.4 cmd <- 07
PCI: 00:14.5 subsystem <- 1043/8163
PCI: 00:14.5 cmd <- 02
PCI: 03:00.0 cmd <- 03
PCI: 04:00.0 cmd <- 03
PCI: 08:01.0 cmd <- 03
PCI: 08:02.0 subsystem <- 1043/8163
PCI: 08:02.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 1204 exit 0
POST: 0x75
Initializing devices...
Root Device init ...
Root Device init finished in 0 usecs
POST: 0x75
CPU_CLUSTER: 0 init ...
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
Enabling probe filter
Enabling ATM mode
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
start_eip=0x00001000, code_size=0x00000031
CPU1: stack_base 0014f000, stack_end 0014fff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 1.
After apic_write.
Initializing CPU #1
CPU: vendor AMD device 600f20
CPU: family 15, model 02, stepping 00
Startup point 1.
Waiting for send to finish...
+nodeid = 00, coreid = 01
POST: 0x60
Enabling cache
After Startup.
CPU2: stack_base 0014e000, stack_end 0014eff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 2.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU3: stack_base 0014d000, stack_end 0014dff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU4: stack_base 0014c000, stack_end 0014cff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 4.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU5: stack_base 0014b000, stack_end 0014bff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 5.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU6: stack_base 0014a000, stack_end 0014aff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 6.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU7: stack_base 00149000, stack_end 00149ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 7.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU8: stack_base 00148000, stack_end 00148ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 8.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU9: stack_base 00147000, stack_end 00147ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 9.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU10: stack_base 00146000, stack_end 00146ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 10.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU11: stack_base 00145000, stack_end 00145ff8
Asserting INIT.
MTRR check
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
POST: 0x93
#startup loops: 1.
Sending STARTUP #1 to 11.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
MTRR check
CPU12: stack_base 00144000, stack_end 00144ff8
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Asserting INIT.
POST: 0x93
Waiting for send to finish...
+Setting up local apic...Deasserting INIT.
Waiting for send to finish...
+ apic_id: 0x02 done.
POST: 0x9b
#startup loops: 1.
Sending STARTUP #1 to 12.
After apic_write.
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, Startup point 1.
Waiting for send to finish...
+Disabling SMM ASeg memory
CPU #2 initialized
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local apic...
apic_id: 0x04 done.
After Startup.
POST: 0x9b
POST: 0x93
CPU13: stack_base 00143000, stack_end 00143ff8
CPU model: AMD Opteron(tm) Processor 6378
Asserting INIT.
Waiting for send to finish...
siblings = 15, +Deasserting INIT.
Disabling SMM ASeg memory
Waiting for send to finish...
+CPU #4 initialized
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
#startup loops: 1.
Sending STARTUP #1 to 13.
After apic_write.
Startup point 1.
Setting up local apic...Waiting for send to finish...
Setting up local apic...+ apic_id: 0x03 done.
apic_id: 0x05 done.
POST: 0x9b
MTRR check
POST: 0x9b
POST: 0x60
CPU model: AMD Opteron(tm) Processor 6378
CPU model: AMD Opteron(tm) Processor 6378 AMD
siblings = 15, Enabling cache
Disabling SMM ASeg memory
siblings = 15, Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Disabling SMM ASeg memory
CPU #5 initialized
POST: 0x93
CPU #3 initialized
After Startup.
CPU14: stack_base 00142000, stack_end 00142ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 14.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU15: stack_base 00141000, stack_end 00141ff8
Setting up local apic...Asserting INIT.
apic_id: 0x06 done.
POST: 0x9b
Waiting for send to finish...
+
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
Deasserting INIT.
CPU model: AMD Opteron(tm) Processor 6378
Waiting for send to finish...
+siblings = 15, #startup loops: 1.
Sending STARTUP #1 to 15.
Disabling SMM ASeg memory
After apic_write.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
Setting up local apic... apic_id: 0x08 done.
POST: 0x9b
CPU #6 initialized
Startup point 1.
Waiting for send to finish...
CPU model: AMD Opteron(tm) Processor 6378
Setting up local apic...+siblings = 15, apic_id: 0x07 done.
POST: 0x9b
Disabling SMM ASeg memory
CPU #8 initialized
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, Disabling SMM ASeg memory
CPU #7 initialized
After Startup.
Initializing CPU #0
CPU: vendor AMD device 600f20
CPU: family 15, model 02, stepping 00
nodeid = 00, coreid = 00
POST: 0x60
Enabling cache
CPU: vendor AMD device 600f20
Setting up local apic...
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
apic_id: 0x09 done.
POST: 0x9b
POST: 0x93
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, Disabling SMM ASeg memory
CPU #9 initialized
CPU: family 15, model 02, stepping 00
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
Setting up local apic... apic_id: 0x0a done.
POST: 0x9b
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, Disabling SMM ASeg memory
CPU #10 initialized
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
Setting up local apic... apic_id: 0x0c done.
POST: 0x9b
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, Disabling SMM ASeg memory
CPU #12 initialized
Setting up local apic... apic_id: 0x00 done.
POST: 0x9b
nodeid = 01, coreid = 05
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, POST: 0x60
Disabling SMM ASeg memory
CPU #0 initialized
MTRR check
Enabling cache
Fixed MTRRs : Enabled
Variable MTRRs:
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
Enabled
Waiting for 5 CPUS to stop
POST: 0x93
odeid = 01, coreid = 07
Setting up local apic...Setting up local apic...
MTRR check
Fixed MTRRs : apic_id: 0x0d done.
POST: 0x9b
Setting up local apic... apic_id: 0x0b done.
POST: 0x9b
apic_id: 0x01 done.
Enabled
Variable MTRRs: Enabled
POST: 0x93
CPU model: AMD Opteron(tm) Processor 6378
POST: 0x9b
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, siblings = 15, Disabling SMM ASeg memory
Disabling SMM ASeg memory
CPU #13 initialized
CPU #11 initialized
CPU model: AMD Opteron(tm) Processor 6378
Waiting for 3 CPUS to stop
siblings = 15, Disabling SMM ASeg memory
CPU #1 initialized
Waiting for 2 CPUS to stop
POST: 0x60
Setting up local apic... apic_id: 0x0e done.
POST: 0x9b
Enabling cache
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, Disabling SMM ASeg memory
CPU #14 initialized
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
Waiting for 1 CPUS to stop
Setting up local apic... apic_id: 0x0f done.
POST: 0x9b
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, Disabling SMM ASeg memory
CPU #15 initialized
All AP CPUs stopped (666 loops)
CPU0: stack: 00150000 - 00151000, lowest used address 001509e0, stack used: 1568 bytes
CPU1: stack: 0014f000 - 00150000, lowest used address 0014fde4, stack used: 540 bytes
CPU2: stack: 0014e000 - 0014f000, lowest used address 0014ec9c, stack used: 868 bytes
CPU3: stack: 0014d000 - 0014e000, lowest used address 0014dde4, stack used: 540 bytes
CPU4: stack: 0014c000 - 0014d000, lowest used address 0014cd24, stack used: 732 bytes
CPU5: stack: 0014b000 - 0014c000, lowest used address 0014bde4, stack used: 540 bytes
CPU6: stack: 0014a000 - 0014b000, lowest used address 0014ad24, stack used: 732 bytes
CPU7: stack: 00149000 - 0014a000, lowest used address 00149de4, stack used: 540 bytes
CPU8: stack: 00148000 - 00149000, lowest used address 00148d24, stack used: 732 bytes
CPU9: stack: 00147000 - 00148000, lowest used address 00147de4, stack used: 540 bytes
CPU10: stack: 00146000 - 00147000, lowest used address 00146d24, stack used: 732 bytes
CPU11: stack: 00145000 - 00146000, lowest used address 00145de4, stack used: 540 bytes
CPU12: stack: 00144000 - 00145000, lowest used address 00144d24, stack used: 732 bytes
CPU13: stack: 00143000 - 00144000, lowest used address 00143de4, stack used: 540 bytes
CPU14: stack: 00142000 - 00143000, lowest used address 00142d24, stack used: 732 bytes
CPU15: stack: 00141000 - 00142000, lowest used address 00141de4, stack used: 540 bytes
CPU_CLUSTER: 0 init finished in 40345 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:18.0 init ...
PCI: 00:18.0 init finished in 0 usecs
POST: 0x75
PCI: 00:18.1 init ...
PCI: 00:18.1 init finished in 0 usecs
POST: 0x75
PCI: 00:18.2 init ...
PCI: 00:18.2 init finished in 0 usecs
POST: 0x75
PCI: 00:18.3 init ...
NB: Function 3 Misc Control.. CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
done.
PCI: 00:18.3 init finished in 808 usecs
POST: 0x75
PCI: 00:18.4 init ...
NB: Function 4 Link Control.. CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
done.
PCI: 00:18.4 init finished in 1421 usecs
POST: 0x75
PCI: 00:18.5 init ...
NB: Function 5 Northbridge Control.. done.
PCI: 00:18.5 init finished in 1 usecs
POST: 0x75
PCI: 00:19.0 init ...
PCI: 00:19.0 init finished in 0 usecs
POST: 0x75
PCI: 00:19.1 init ...
PCI: 00:19.1 init finished in 0 usecs
POST: 0x75
PCI: 00:19.2 init ...
PCI: 00:19.2 init finished in 0 usecs
POST: 0x75
PCI: 00:19.3 init ...
NB: Function 3 Misc Control.. CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
done.
PCI: 00:19.3 init finished in 806 usecs
POST: 0x75
PCI: 00:19.4 init ...
NB: Function 4 Link Control.. CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
done.
PCI: 00:19.4 init finished in 1421 usecs
POST: 0x75
PCI: 00:19.5 init ...
NB: Function 5 Northbridge Control.. done.
PCI: 00:19.5 init finished in 1 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:00.0 init ...
pcie_init in sr5650_ht.c
IOAPIC: Initializing IOAPIC at 0xfcc00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x01
IOAPIC: Dumping registers
reg 0x0000: 0x01000000
reg 0x0001: 0x001f8021
reg 0x0002: 0x00000000
IOAPIC: 32 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
IOAPIC: reg 0x00000018 value 0x00000000 0x00010000
IOAPIC: reg 0x00000019 value 0x00000000 0x00010000
IOAPIC: reg 0x0000001a value 0x00000000 0x00010000
IOAPIC: reg 0x0000001b value 0x00000000 0x00010000
IOAPIC: reg 0x0000001c value 0x00000000 0x00010000
IOAPIC: reg 0x0000001d value 0x00000000 0x00010000
IOAPIC: reg 0x0000001e value 0x00000000 0x00010000
IOAPIC: reg 0x0000001f value 0x00000000 0x00010000
PCI: 00:00.0 init finished in 33 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:11.0 init ...
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
rev_id=15
sata_bar0=4020
sata_bar1=4040
sata_bar2=4028
sata_bar3=4044
sata_bar4=4000
sata_bar5=fcb0d000
ide_bar0=4030
ide_bar1=4048
ide_bar2=4038
ide_bar3=404c
Maximum SATA port count supported by silicon: 6
SATA port 0 status = 0
No AHCI SATA drive on Slot0
SATA port 1 status = 0
No AHCI SATA drive on Slot1
SATA port 2 status = 0
No AHCI SATA drive on Slot2
SATA port 3 status = 0
No AHCI SATA drive on Slot3
SATA port 4 status = 0
No AHCI SATA drive on Slot4
SATA port 5 status = 0
No AHCI SATA drive on Slot5
PCI: 00:11.0 init finished in 10267 usecs
POST: 0x75
PCI: 00:12.0 init ...
PCI: 00:12.0 init finished in 22 usecs
POST: 0x75
PCI: 00:12.1 init ...
PCI: 00:12.1 init finished in 22 usecs
POST: 0x75
PCI: 00:12.2 init ...
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
usb2_bar0=0xfcb0e000
rpr 6.23, final dword=809e03c8
PCI: 00:12.2 init finished in 914 usecs
POST: 0x75
PCI: 00:13.0 init ...
PCI: 00:13.0 init finished in 22 usecs
POST: 0x75
PCI: 00:13.1 init ...
PCI: 00:13.1 init finished in 22 usecs
POST: 0x75
PCI: 00:13.2 init ...
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
usb2_bar0=0xfcb0f000
rpr 6.23, final dword=809e03c8
PCI: 00:13.2 init finished in 913 usecs
POST: 0x75
PCI: 00:14.0 init ...
sm_init().
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: Dumping registers
reg 0x0000: 0x00000000
reg 0x0001: 0x00178021
reg 0x0002: 0x00000000
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
WARNING: No CMOS option 'enable_legacy_usb'.
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
set power "on" after power fail
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
++++++++++no set NMI+++++
RTC Init
sm_init() end
PCI: 00:14.0 init finished in 2367 usecs
POST: 0x75
PCI: 00:14.1 init ...
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
PCI: 00:14.1 init finished in 727 usecs
POST: 0x75
PCI: 00:14.2 init ...
base = 0xfcb04000
No codec!
PCI: 00:14.2 init finished in 2923 usecs
POST: 0x75
PCI: 00:14.3 init ...
lpc_init
PCI: 00:14.3 init finished in 11 usecs
POST: 0x75
PCI: 00:14.4 init ...
PCI: 00:14.4 init finished in 17 usecs
POST: 0x75
PCI: 00:14.5 init ...
PCI: 00:14.5 init finished in 22 usecs
POST: 0x75
PCI: 03:00.0 init ...
PCI: 03:00.0 init finished in 0 usecs
POST: 0x75
PCI: 04:00.0 init ...
PCI: 04:00.0 init finished in 0 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
smbus: PCI: 00:14.0[0]->I2C: 01:2f init ...
Set SMBUS controller to channel 1
Found 64 pin W83795G Nuvoton H/W Monitor
W83795G/ADG work in Thermal Cruise Mode
Fan CTFS(celsius) TTTI(celsius)
1 80 80
2 80 80
3 80 80
4 80 80
5 80 80
6 80 80
DTS1 current value: 1c
DTS2 current value: 0
DTS3 current value: 0
DTS4 current value: 0
DTS5 current value: 0
DTS6 current value: 0
DTS7 current value: 0
DTS8 current value: 0
Set SMBUS controller to channel 0
I2C: 01:2f init finished in 253554 usecs
POST: 0x75
POST: 0x75
POST: 0x75
PNP: 002e.2 init ...
PNP: 002e.2 init finished in 0 usecs
POST: 0x75
PNP: 002e.3 init ...
PNP: 002e.3 init finished in 0 usecs
POST: 0x75
PNP: 002e.5 init ...
Keyboard init...
PS/2 auxiliary channel detected...
PS/2 device detected on auxiliary channel
No PS/2 keyboard detected.
PNP: 002e.5 init finished in 86795 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PNP: 002e.a init ...
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
set power on after power fail
PNP: 002e.a init finished in 600 usecs
POST: 0x75
PNP: 002e.b init ...
PNP: 002e.b init finished in 0 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 08:01.0 init ...
ASpeed AST2050: initializing video device
ast_detect_chip: AST 1100 detected
ast_detect_chip: VGA not enabled on entry, requesting chip POST
ast_detect_chip: Analog VGA only
ast_driver_load: dram 643200000 0 32 00800000
ASpeed VGA text mode initialized
PCI: 08:01.0 init finished in 15612 usecs
POST: 0x75
PCI: 08:02.0 init ...
PCI: 08:02.0 init finished in 0 usecs
POST: 0x75
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.1: enabled 0
PCI: 00:00.2: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 1
PCI: 00:0a.0: enabled 1
PCI: 00:0b.0: enabled 1
PCI: 00:0c.0: enabled 1
PCI: 00:0d.0: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.1: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 01:50: enabled 1
I2C: 01:51: enabled 1
I2C: 01:52: enabled 1
I2C: 01:53: enabled 1
I2C: 01:54: enabled 1
I2C: 01:55: enabled 1
I2C: 01:56: enabled 1
I2C: 01:57: enabled 1
I2C: 01:2f: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.106: enabled 0
PNP: 002e.107: enabled 0
PNP: 002e.207: enabled 0
PNP: 002e.307: enabled 0
PNP: 002e.407: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.108: enabled 0
PNP: 002e.9: enabled 0
PNP: 002e.109: enabled 0
PNP: 002e.209: enabled 0
PNP: 002e.309: enabled 0
PNP: 002e.a: enabled 1
PNP: 002e.b: enabled 1
PNP: 002e.c: enabled 0
PNP: 002e.d: enabled 0
PNP: 002e.f: enabled 0
PCI: 00:14.4: enabled 1
PCI: 08:01.0: enabled 1
PCI: 08:02.0: enabled 1
PCI: 08:03.0: enabled 0
PCI: 00:14.5: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 1
PCI: 00:19.2: enabled 1
PCI: 00:19.3: enabled 1
PCI: 00:19.4: enabled 1
PCI: 00:19.5: enabled 1
PCI: 00:1a.0: enabled 0
PCI: 00:1a.1: enabled 0
PCI: 00:1a.2: enabled 0
PCI: 00:1a.3: enabled 0
PCI: 00:1a.4: enabled 0
PCI: 00:1a.5: enabled 0
PCI: 00:1b.0: enabled 0
PCI: 00:1b.1: enabled 0
PCI: 00:1b.2: enabled 0
PCI: 00:1b.3: enabled 0
PCI: 00:1b.4: enabled 0
PCI: 00:1b.5: enabled 0
APIC: 01: enabled 1
APIC: 02: enabled 1
APIC: 03: enabled 1
APIC: 04: enabled 1
APIC: 05: enabled 1
APIC: 06: enabled 1
APIC: 07: enabled 1
APIC: 08: enabled 1
APIC: 09: enabled 1
APIC: 0a: enabled 1
APIC: 0b: enabled 1
APIC: 0c: enabled 1
APIC: 0d: enabled 1
APIC: 0e: enabled 1
APIC: 0f: enabled 1
PCI: 03:00.0: enabled 1
PCI: 04:00.0: enabled 1
BS: BS_DEV_INIT times (us): entry 0 run 419757 exit 0
POST: 0x76
Finalize devices...
Devices finalized
BS: BS_POST_DEVICE times (us): entry 0 run 2 exit 0
POST: 0x77
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0
POST: 0x79
POST: 0x9b
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
Wrote the mp table end at: 000f0010 - 000f036c
Wrote the mp table end at: b7cbf010 - b7cbf36c
MP table: 876 bytes.
POST: 0x9c
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Unmatched 'cmos_layout.bin' at 29e40
CBFS: Checking offset 2ad00
CBFS: File @ offset 2ad00 size 256b
CBFS: Found @ offset 2ad00 size 256b
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'fallback/slic'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Unmatched 'cmos_layout.bin' at 29e40
CBFS: Checking offset 2ad00
CBFS: File @ offset 2ad00 size 256b
CBFS: Unmatched 'fallback/dsdt.aml' at 2ad00
CBFS: Checking offset 2d2c0
CBFS: File @ offset 2d2c0 size 660
CBFS: Unmatched 'payload_config' at 2d2c0
CBFS: Checking offset 2d980
CBFS: File @ offset 2d980 size ee
CBFS: Unmatched 'payload_revision' at 2d980
CBFS: Checking offset 2dac0
CBFS: File @ offset 2dac0 size 1ec4
CBFS: Unmatched 'microcode_amd_fam15h.bin' at 2dac0
CBFS: Checking offset 2fa00
CBFS: File @ offset 2fa00 size 1
CBFS: Unmatched 'etc/pci-optionrom-exec' at 2fa00
CBFS: Checking offset 2fa80
CBFS: File @ offset 2fa80 size 418
CBFS: Unmatched '' at 2fa80
CBFS: Checking offset 2fec0
CBFS: File @ offset 2fec0 size 10000
CBFS: Unmatched 's3nv' at 2fec0
CBFS: Checking offset 3ff00
CBFS: File @ offset 3ff00 size 14fff
CBFS: Unmatched 'fallback/ramstage' at 3ff00
CBFS: Checking offset 54f40
CBFS: File @ offset 54f40 size 7000
CBFS: Unmatched 'vgaroms/seavgabios.bin' at 54f40
CBFS: Checking offset 5bfc0
CBFS: File @ offset 5bfc0 size f47d
CBFS: Unmatched 'fallback/payload' at 5bfc0
CBFS: Checking offset 6b480
CBFS: File @ offset 6b480 size 318c
CBFS: Unmatched 'microcode_amd.bin' at 6b480
CBFS: Checking offset 6e680
CBFS: File @ offset 6e680 size e200
CBFS: Unmatched 'pci8086,10d3.rom' at 6e680
CBFS: Checking offset 7c900
CBFS: File @ offset 7c900 size 7103
CBFS: Unmatched 'bootsplash.jpg' at 7c900
CBFS: Checking offset 83a40
CBFS: File @ offset 83a40 size 7b8d8
CBFS: Unmatched '' at 83a40
CBFS: Checking offset ff340
CBFS: File @ offset ff340 size b88
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at b7c9b000.
ACPI: * FACS
ACPI: * DSDT
ACPI: * FADT
pm_base: 0x0800
ACPI: added table 1/32, length now 40
ACPI: * SSDT
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
processor_brand=AMD Opteron(tm) Processor 6378
Pstates algorithm ...
Pstate_freq[0] = 2400MHz Pstate_power[0] = 5973mw
Pstate_latency[0] = 5us
Pstate_freq[1] = 2200MHz Pstate_power[1] = 5500mw
Pstate_latency[1] = 5us
Pstate_freq[2] = 1900MHz Pstate_power[2] = 4620mw
Pstate_latency[2] = 5us
Pstate_freq[3] = 1600MHz Pstate_power[3] = 3792mw
Pstate_latency[3] = 5us
Pstate_freq[4] = 1400MHz Pstate_power[4] = 3240mw
Pstate_latency[4] = 5us
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: added table 3/32, length now 48
ACPI: * TCPA
TCPA log created at b7c8b000
ACPI: added table 4/32, length now 52
ACPI: * MADT
ACPI: added table 5/32, length now 56
current = b7c9f9a0
ACPI: * SRAT at b7c9f9a0
SRAT: lapic cpu_index=00, node_id=00, apic_id=00
SRAT: lapic cpu_index=01, node_id=00, apic_id=01
SRAT: lapic cpu_index=02, node_id=00, apic_id=02
SRAT: lapic cpu_index=03, node_id=00, apic_id=03
SRAT: lapic cpu_index=04, node_id=00, apic_id=04
SRAT: lapic cpu_index=05, node_id=00, apic_id=05
SRAT: lapic cpu_index=06, node_id=00, apic_id=06
SRAT: lapic cpu_index=07, node_id=00, apic_id=07
SRAT: lapic cpu_index=08, node_id=01, apic_id=08
SRAT: lapic cpu_index=09, node_id=01, apic_id=09
SRAT: lapic cpu_index=0a, node_id=01, apic_id=0a
SRAT: lapic cpu_index=0b, node_id=01, apic_id=0b
SRAT: lapic cpu_index=0c, node_id=01, apic_id=0c
SRAT: lapic cpu_index=0d, node_id=01, apic_id=0d
SRAT: lapic cpu_index=0e, node_id=01, apic_id=0e
SRAT: lapic cpu_index=0f, node_id=01, apic_id=0f
set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000
set_srat_mem: dev DOMAIN: 0000, res->index=0008 startk=020e0000, sizek=00020000
set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00
set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00d00000
set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=01100000, sizek=01000000
ACPI: added table 6/32, length now 60
ACPI: * SLIT at b7c9fb70
ACPI: added table 7/32, length now 64
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
ACPI: * IVRS at b7c9fba0
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x01 @ 0x40
Capability: type 0x01 @ 0x44
ACPI: added table 8/32, length now 68
ACPI: * HPET
ACPI: added table 9/32, length now 72
ACPI: * SRAT at b7c9fcd0
SRAT: lapic cpu_index=00, node_id=00, apic_id=00
SRAT: lapic cpu_index=01, node_id=00, apic_id=01
SRAT: lapic cpu_index=02, node_id=00, apic_id=02
SRAT: lapic cpu_index=03, node_id=00, apic_id=03
SRAT: lapic cpu_index=04, node_id=00, apic_id=04
SRAT: lapic cpu_index=05, node_id=00, apic_id=05
SRAT: lapic cpu_index=06, node_id=00, apic_id=06
SRAT: lapic cpu_index=07, node_id=00, apic_id=07
SRAT: lapic cpu_index=08, node_id=01, apic_id=08
SRAT: lapic cpu_index=09, node_id=01, apic_id=09
SRAT: lapic cpu_index=0a, node_id=01, apic_id=0a
SRAT: lapic cpu_index=0b, node_id=01, apic_id=0b
SRAT: lapic cpu_index=0c, node_id=01, apic_id=0c
SRAT: lapic cpu_index=0d, node_id=01, apic_id=0d
SRAT: lapic cpu_index=0e, node_id=01, apic_id=0e
SRAT: lapic cpu_index=0f, node_id=01, apic_id=0f
set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000
set_srat_mem: dev DOMAIN: 0000, res->index=0008 startk=020e0000, sizek=00020000
set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00
set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00d00000
set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=01100000, sizek=01000000
ACPI: added table 10/32, length now 76
ACPI: * SLIT at b7c9fea0
ACPI: added table 11/32, length now 80
ACPI: done.
ACPI tables: 20176 bytes.
smbios_write_tables: b7c8a000
Root Device (ASUS KGPE-D16)
CPU_CLUSTER: 0 (AMD Family 10h/15h Root Complex)
APIC: 00 (unknown)
DOMAIN: 0000 (AMD Family 10h/15h Root Complex)
PCI: 00:18.0 (AMD Family 10h/15h Northbridge)
PCI: 00:00.0 (ATI SR5650)
PCI: 00:00.1 (ATI SR5650)
PCI: 00:00.2 (ATI SR5650)
PCI: 00:02.0 (ATI SR5650)
PCI: 00:03.0 (ATI SR5650)
PCI: 00:04.0 (ATI SR5650)
PCI: 00:05.0 (ATI SR5650)
PCI: 00:06.0 (ATI SR5650)
PCI: 00:07.0 (ATI SR5650)
PCI: 00:08.0 (ATI SR5650)
PCI: 00:09.0 (ATI SR5650)
PCI: 00:0a.0 (ATI SR5650)
PCI: 00:0b.0 (ATI SR5650)
PCI: 00:0c.0 (ATI SR5650)
PCI: 00:0d.0 (ATI SR5650)
PCI: 00:11.0 (ATI SP5100)
PCI: 00:12.0 (ATI SP5100)
PCI: 00:12.1 (ATI SP5100)
PCI: 00:12.2 (ATI SP5100)
PCI: 00:13.0 (ATI SP5100)
PCI: 00:13.1 (ATI SP5100)
PCI: 00:13.2 (ATI SP5100)
PCI: 00:14.0 (ATI SP5100)
I2C: 01:50 (unknown)
I2C: 01:51 (unknown)
I2C: 01:52 (unknown)
I2C: 01:53 (unknown)
I2C: 01:54 (unknown)
I2C: 01:55 (unknown)
I2C: 01:56 (unknown)
I2C: 01:57 (unknown)
I2C: 01:2f (Nuvoton W83795G/ADG Hardware Monitor)
PCI: 00:14.1 (ATI SP5100)
PCI: 00:14.2 (ATI SP5100)
PCI: 00:14.3 (ATI SP5100)
PNP: 002e.0 (WINBOND W83667HG-A Super I/O)
PNP: 002e.1 (WINBOND W83667HG-A Super I/O)
PNP: 002e.2 (WINBOND W83667HG-A Super I/O)
PNP: 002e.3 (WINBOND W83667HG-A Super I/O)
PNP: 002e.5 (WINBOND W83667HG-A Super I/O)
PNP: 002e.106 (WINBOND W83667HG-A Super I/O)
PNP: 002e.107 (WINBOND W83667HG-A Super I/O)
PNP: 002e.207 (WINBOND W83667HG-A Super I/O)
PNP: 002e.307 (WINBOND W83667HG-A Super I/O)
PNP: 002e.407 (WINBOND W83667HG-A Super I/O)
PNP: 002e.8 (WINBOND W83667HG-A Super I/O)
PNP: 002e.108 (WINBOND W83667HG-A Super I/O)
PNP: 002e.9 (WINBOND W83667HG-A Super I/O)
PNP: 002e.109 (WINBOND W83667HG-A Super I/O)
PNP: 002e.209 (WINBOND W83667HG-A Super I/O)
PNP: 002e.309 (WINBOND W83667HG-A Super I/O)
PNP: 002e.a (WINBOND W83667HG-A Super I/O)
PNP: 002e.b (WINBOND W83667HG-A Super I/O)
PNP: 002e.c (WINBOND W83667HG-A Super I/O)
PNP: 002e.d (WINBOND W83667HG-A Super I/O)
PNP: 002e.f (WINBOND W83667HG-A Super I/O)
PCI: 00:14.4 (ATI SP5100)
PCI: 08:01.0 (ATI SP5100)
PCI: 08:02.0 (ATI SP5100)
PCI: 08:03.0 (ATI SP5100)
PCI: 00:14.5 (ATI SP5100)
PCI: 00:18.1 (AMD Family 10h/15h Northbridge)
PCI: 00:18.2 (AMD Family 10h/15h Northbridge)
PCI: 00:18.3 (AMD Family 10h/15h Northbridge)
PCI: 00:18.4 (AMD Family 10h/15h Northbridge)
PCI: 00:18.5 (AMD Family 10h/15h Northbridge)
PCI: 00:19.0 (AMD Family 10h/15h Northbridge)
PCI: 00:19.1 (AMD Family 10h/15h Northbridge)
PCI: 00:19.2 (AMD Family 10h/15h Northbridge)
PCI: 00:19.3 (AMD Family 10h/15h Northbridge)
PCI: 00:19.4 (AMD Family 10h/15h Northbridge)
PCI: 00:19.5 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.0 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.1 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.2 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.3 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.4 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.5 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.0 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.1 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.2 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.3 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.4 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.5 (AMD Family 10h/15h Northbridge)
APIC: 01 (unknown)
APIC: 02 (unknown)
APIC: 03 (unknown)
APIC: 04 (unknown)
APIC: 05 (unknown)
APIC: 06 (unknown)
APIC: 07 (unknown)
APIC: 08 (unknown)
APIC: 09 (unknown)
APIC: 0a (unknown)
APIC: 0b (unknown)
APIC: 0c (unknown)
APIC: 0d (unknown)
APIC: 0e (unknown)
APIC: 0f (unknown)
PCI: 03:00.0 (unknown)
PCI: 04:00.0 (unknown)
SMBIOS tables: 526 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4812
Writing coreboot table at 0xb7cc0000
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000a0000-00000000000bffff: RESERVED
3. 00000000000c0000-00000000b7c89fff: RAM
4. 00000000b7c8a000-00000000b7ffffff: CONFIGURATION TABLES
5. 00000000b8000000-00000000bfffffff: RAM
6. 00000000c0000000-00000000cfffffff: RESERVED
7. 00000000fcb00000-00000000fcb03fff: RESERVED
8. 00000000feb00000-00000000feb00fff: RESERVED
9. 00000000fec00000-00000000fec00fff: RESERVED
10. 00000000fed00000-00000000fed00fff: RESERVED
11. 0000000100000000-0000000837ffffff: RAM
12. 0000000838000000-000000083fffffff: RESERVED
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
FMAP: Found "FLASH" version 1.1 at 100000.
FMAP: base = ffe00000 size = 200000 #areas = 3
Wrote coreboot table at: b7cc0000, 0x11c0 bytes, checksum 74dd
coreboot table: 4568 bytes.
IMD ROOT 0. b7fff000 00001000
IMD SMALL 1. b7ffe000 00001000
CAR GLOBALS 2. b7ff3000 0000a6c0
CONSOLE 3. b7fd3000 00020000
TIME STAMP 4. b7fd2000 00000400
AMDMEM INFO 5. b7fc8000 000093dc
ACPI RESUME 6. b7cc8000 00300000
COREBOOT 7. b7cc0000 00008000
SMP TABLE 8. b7cbf000 00001000
ACPI 9. b7c9b000 00024000
TCPA LOG 10. b7c8b000 00010000
SMBIOS 11. b7c8a000 00000800
IMD small region:
IMD ROOT 0. b7ffec00 00000400
ROMSTAGE 1. b7ffebe0 00000004
GDT 2. b7ffe9e0 00000200
Writing AMD DCT configuration to Flash
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header'
12208 bytes lost
-------------- next part --------------
coreboot-4.3-1193-g1716375-dirty-RAPTOR-NORMAL Mon May 30 13:15:24 UTC 2016 romstage starting...
Initial stack pointer: 000dff38
POST: 0x30
CPU APICID 00 start flag set
POST: 0x32
POST: 0x66
BSP Family_Model: 00600f20
*sysinfo range: [000c2d40,000cd28c]
bsp_apicid = 00
cpu_init_detectedx = 00000000
sb700 reset flags: 0004
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'microcode_amd.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Unmatched 'cmos_layout.bin' at 29e40
CBFS: Checking offset 2ad00
CBFS: File @ offset 2ad00 size 256b
CBFS: Unmatched 'fallback/dsdt.aml' at 2ad00
CBFS: Checking offset 2d2c0
CBFS: File @ offset 2d2c0 size 660
CBFS: Unmatched 'payload_config' at 2d2c0
CBFS: Checking offset 2d980
CBFS: File @ offset 2d980 size ee
CBFS: Unmatched 'payload_revision' at 2d980
CBFS: Checking offset 2dac0
CBFS: File @ offset 2dac0 size 1ec4
CBFS: Unmatched 'microcode_amd_fam15h.bin' at 2dac0
CBFS: Checking offset 2fa00
CBFS: File @ offset 2fa00 size 1
CBFS: Unmatched 'etc/pci-optionrom-exec' at 2fa00
CBFS: Checking offset 2fa80
CBFS: File @ offset 2fa80 size 418
CBFS: Unmatched '' at 2fa80
CBFS: Checking offset 2fec0
CBFS: File @ offset 2fec0 size 10000
CBFS: Unmatched 's3nv' at 2fec0
CBFS: Checking offset 3ff00
CBFS: File @ offset 3ff00 size 15057
CBFS: Unmatched 'fallback/ramstage' at 3ff00
CBFS: Checking offset 54fc0
CBFS: File @ offset 54fc0 size 7000
CBFS: Unmatched 'vgaroms/seavgabios.bin' at 54fc0
CBFS: Checking offset 5c040
CBFS: File @ offset 5c040 size f47d
CBFS: Unmatched 'fallback/payload' at 5c040
CBFS: Checking offset 6b500
CBFS: File @ offset 6b500 size 318c
CBFS: Found @ offset 6b500 size 318c
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'microcode_amd_fam15h.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Unmatched 'cmos_layout.bin' at 29e40
CBFS: Checking offset 2ad00
CBFS: File @ offset 2ad00 size 256b
*** Log truncated, F20446 characters dropped. ***
POST: 0x41
amdmct_cbmem_store_info: Storing AMDMCT configuration in CBMEM
CBFS: 'Master Header Locator' located CBFS at [100100:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 2967c
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 29780
CBFS: File @ offset 29780 size 287
CBFS: Unmatched 'config' at 29780
CBFS: Checking offset 29a40
CBFS: File @ offset 29a40 size 24e
CBFS: Unmatched 'revision' at 29a40
CBFS: Checking offset 29d00
CBFS: File @ offset 29d00 size 100
CBFS: Unmatched 'cmos.default' at 29d00
CBFS: Checking offset 29e40
CBFS: File @ offset 29e40 size e84
CBFS: Found @ offset 29e40 size e84
disable_spd()
prepare_romstage_ramstack: Prepare CAR migration and stack regions...memset_: Fill [003f5400-003fffff] ...prepare_romstage_ramstack: Done
post_cache_as_ram: Copying data from cache to RAM...memcpy_: Copy [000c2c00-000cd2bf] to [003f5940 - 003fffff] ...post_cache_as_ram: Done
post_cache_as_ram: Verifying data integrity in RAM...memcmp_: Compare [000c2c00-000cd2bf] with [003f5940 - 003fffff] ...post_cache_as_ram: Done
post_cache_as_ram: Switching to use RAM as stack...cache_as_ram_new_stack: Top about 003f592c ... Done
cache_as_ram_new_stack: Disabling cache as ram now
prepare_ramstage_region: Prepare ramstage memory region...memset_: Fill [00000000-003f53ff] ...POST: 0x39
POST: 0x80
POST: 0x70
POST: 0x71
POST: 0x72
POST: 0x24
POST: 0x25
POST: 0x24
POST: 0x25
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x55
POST: 0x55
POST: 0x73
POST: 0x74
POST: 0x75
POST: 0x75
POST: 0x60
POST: 0x93
POST: 0x9b
POST: 0x60
POST: 0x93
POST: 0x93
POST: 0x9b
POST: 0x9b
POST: 0x60
POST: 0x93
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POST: 0x60
POST: 0x93
POST: 0x93
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POST: 0x9b
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POST: 0x93
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POST: 0x9b
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POST: 0x9b
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POST: 0x9b
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POST: 0x60
POST: 0x93
POST: 0x9b
POST: 0x75
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POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
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POST: 0x75
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POST: 0x75
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POST: 0x75
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POST: 0x75
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POST: 0x75
POST: 0x75
POST: 0x75
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POST: 0x75
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POST: 0x7a
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POST: 0xf8
SeaBIOS (version rel-1.9.0-129-g1dc7774)
BUILD: gcc: (coreboot toolchain v1.35 January 29th, 2016) 5.2.0 binutils: (GNU Binutils) 2.25
Found coreboot cbmem console @ b7fd3000
Found mainboard ASUS KGPE-D16
Relocating init from 0x000e4ac0 to 0xbffb3fc0 (size 49024)
Found CBFS header at 0xfff00138
multiboot: eax=0, ebx=0
Found 38 PCI devices (max PCI bus is 08)
Copying SMBIOS entry point from 0xb7c8a000 to 0x000f0a20
Copying ACPI RSDP from 0xb7c9b000 to 0x000f09f0
Skipping MPTABLE copy due to large size (876 bytes)
Using pmtimer, ioport 0x820
Scan for VGA option rom
Running option rom at c000:0003
pmm call arg1=0
Turning on vga text mode console
SeaBIOS (version rel-1.9.0-129-g1dc7774)
EHCI init on dev 00:12.2 (regs=0xfcb0e020)
EHCI init on dev 00:13.2 (regs=0xfcb0f020)
OHCI init on dev 00:12.0 (regs=0xfcb08000)
OHCI init on dev 00:12.1 (regs=0xfcb09000)
OHCI init on dev 00:13.0 (regs=0xfcb0a000)
OHCI init on dev 00:13.1 (regs=0xfcb0b000)
OHCI init on dev 00:14.5 (regs=0xfcb0c000)
ATA controller 1 at 1f0/3f4/0 (irq 14 dev a1)
ATA controller 2 at 170/374/0 (irq 15 dev a1)
AHCI controller at 00:11.0, iobase 0xfcb0d000, irq 0
Found 0 lpt ports
Found 2 serial ports
Got ps2 nak (status=51)
All threads complete.
Scan for option roms
Running option rom at c700:0003
pmm call arg1=1
pmm call arg1=0
pmm call arg1=1
pmm call arg1=0
Running option rom at c800:0003
pmm call arg1=1
pmm call arg1=1
Searching bootorder for: /pci at i0cf8/pci-bridge at 9/*@0
Searching bootorder for: /pci at i0cf8/pci-bridge at a/*@0
Press ESC for boot menu.
Unable to find vesa video mode dimensions 640/480
failed to find a videomode with 640x480 0bpp (0=any).
Searching bootorder for: HALT
Space available for UMB: c9000-ec800, f0000-f0990
Returned 262144 bytes of ZoneHigh
e820 map has 13 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 00000000b7c8a000 = 1 RAM
4: 00000000b7c8a000 - 00000000b8000000 = 2 RESERVED
5: 00000000b8000000 - 00000000c0000000 = 1 RAM
6: 00000000c0000000 - 00000000d0000000 = 2 RESERVED
7: 00000000fcb00000 - 00000000fcb04000 = 2 RESERVED
8: 00000000feb00000 - 00000000feb01000 = 2 RESERVED
9: 00000000fec00000 - 00000000fec01000 = 2 RESERVED
10: 00000000fed00000 - 00000000fed01000 = 2 RESERVED
11: 0000000100000000 - 0000000838000000 = 1 RAM
12: 0000000838000000 - 0000000840000000 = 2 RESERVED
enter handle_19:
NULL
Booting from ROM...
Booting from c700:0373
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