[coreboot] minnowmax expertise needed

[Zoran Stojsavljevic]

Hello Ron,

Hmmmm.... I am afraid, you embarked on/boarded/asked the wrong forum.
My best advice: you should go to Tiano Core forum to ask there these
questions. Something like that:
https://sourceforge.net/projects/tianocore/support

Maybe even better pointer: http://www.tianocore.org/edk2/#

This forum, you asked these questions, actually supports a bootloader
called Coreboot, only. If you did not know!? :p

What is MinnowMax? I always thought that MinnowMax is an INTEL IOTG
BYT HW platform, INTEL development board. It actually started from ISG
desire to support embedded Tunnel Creek/TNC (remember this one, ONLY
32bit ISG CPU creation, in Y2010, by INTEL ISG executives X & Y (X=JJ,
Y=DD)? ISG (what is ISG, anyway?) experts developed this one, TNC, to
compete with ARMv7. Hmmmmm... Did they succeed? JJ and DD certainly
did. For sure! Both retired, although JJ ONLY once, DD many times
(still dead loop executing)... ;-)

And here is modernized version of one, you would like to do (some?!) job on it:
http://elinux.org/Minnowboard:MinnowMax

My best guess. Best, for sure.

I have no idea why you need all of this, but what you would like to do
is actually to use:
[1] Either UEFI AMI BIOS on MinnowMax (BYT wise);
[2] Either SEC+PEI (in binary form) + Tiano Core on MinnowMax (BYT wise).

Anyway, the interesting question (after all) is the following: Why do
you need this use case: "I want a single DXE, which PEI starts, and
the DXE never returns. In this case it will be a linux kernel."

I could not (as much as I am trying, now) envision such an use case
(what are the features/requirements requested)...And for what???

Thank you, Ron!
Zoran
_______

On 4/17/17, ron minnich <rminnich at gmail.com> wrote:
> On Mon, Apr 17, 2017 at 1:40 AM Zoran Stojsavljevic <
> zoran.stojsavljevic at gmail.com> wrote:
>
>>
>>
>> As my best understanding is, INTEL FSP is nothing else, but stripped
>> to the bones BIOS, with ONLY PEI phase in the charge (NOT the entire
>> PEI, Platform init is selectively implemented in FSP). We have there
>> CPU init, PCH init, and, at the very end. Platform init.
>>
>
> is that what's in minnowmax? I am a bit unsure.
>
>
>>
>> Now, said that, I will ask the entire community the following questions:
>> [1] What is the definition of Coreboot (in my naive vision, minimal/a
>> must DXE + OS Boot Loader phase preparation - example: SeaBIOS
>> payload)?
>>
>
> my question is not really about coreboot. I'm not using coreboot in this
> case. I'm hoping to gain from the expertise of this list.
>
>
>> [2] What does it mean in your interpretation: "single DXE"?
>>
>
> just that. I want a single DXE, which PEI starts, and the DXE never
> returns. In this case it will be a linux kernel.
>
>
>> [3] If you are talking about MinnowMax. I assume you are talking about
>> ATOM BYT M/I skus, aren't you?
>>
>
> Is that what turbot is?
>
>
>> [4] Why, in the first place, INTEL FSP experts are NOT answering your
>> quest, since they (I guess) better understand what you are asking
>> for???
>>
>
> I don't know.
>
>
>> [5] What does it mean: "our own Tiano Core"? Does INTEL does NOT own
>> Tiano Core? Or Coreboot (Google) created its own Tiano Core???
>>
>>
> by 'our own tiano core' I simply mean a tiano core built from source.
>
> ron
>