[coreboot] New patch to review for coreboot: a3084fa Intel and GFXUMA: use uma_resource()
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Wed Jul 18 14:55:43 CEST 2012
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1239
-gerrit
commit a3084fa9d2a7697c13a5e3086b3dbc0d1e391307
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Wed Jul 18 13:16:26 2012 +0300
Intel and GFXUMA: use uma_resource()
Commit 2d42b340034ff005693482ef9ca34ce3e0f08371 removed MTRR setup
for un-cached UMA region, if uma_resource() was not used.
I don't think it broke UMA though, since these northbridges do not
include the UMA memory in the ram_resource() calls.
Change-Id: I4ca99b5c2ca4e474296590b3d0c6ef5d09550d80
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/northbridge/intel/i82810/northbridge.c | 1 +
src/northbridge/intel/i82830/northbridge.c | 1 +
src/northbridge/intel/i945/northbridge.c | 13 +++----------
src/northbridge/intel/sch/northbridge.c | 11 ++---------
4 files changed, 7 insertions(+), 19 deletions(-)
diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c
index 3337417..5bf29ad 100644
--- a/src/northbridge/intel/i82810/northbridge.c
+++ b/src/northbridge/intel/i82810/northbridge.c
@@ -143,6 +143,7 @@ static void pci_domain_set_resources(device_t dev)
idx = 10;
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tolmk - 768);
+ uma_resource(dev, idx++, uma_memory_base >> 10, uma_memory_size >> 10);
#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c
index 22f59dc..1b58bc1 100644
--- a/src/northbridge/intel/i82830/northbridge.c
+++ b/src/northbridge/intel/i82830/northbridge.c
@@ -110,6 +110,7 @@ static void pci_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, 256);
ram_resource(dev, idx++, 1024, tolmk - 1024);
+ uma_resource(dev, idx++, uma_memory_base >> 10, uma_memory_size >> 10);
assign_resources(dev->link_list);
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 58e70d7..3ec5a06 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -73,16 +73,9 @@ static void add_fixed_resources(struct device *dev, int index)
struct resource *resource;
u32 pcie_config_base, pcie_config_size;
- printk(BIOS_DEBUG, "Adding UMA memory area\n");
- resource = new_resource(dev, index);
- resource->base = (resource_t) uma_memory_base;
- resource->size = (resource_t) uma_memory_size;
- resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
- IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
-
if (get_pcie_bar(&pcie_config_base, &pcie_config_size)) {
printk(BIOS_DEBUG, "Adding PCIe config bar\n");
- resource = new_resource(dev, index+1);
+ resource = new_resource(dev, index++);
resource->base = (resource_t) pcie_config_base;
resource->size = (resource_t) pcie_config_size;
resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
@@ -173,8 +166,8 @@ static void pci_domain_set_resources(device_t dev)
if (tomk > 4 * 1024 * 1024) {
ram_resource(dev, 5, 4096 * 1024, tomk - 4 * 1024 * 1024);
}
-
- add_fixed_resources(dev, 6);
+ uma_resource(dev, 6, uma_memory_base >> 10, uma_memory_size >> 10);
+ add_fixed_resources(dev, 7);
assign_resources(dev->link_list);
diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c
index 581f97c..b11f27f 100644
--- a/src/northbridge/intel/sch/northbridge.c
+++ b/src/northbridge/intel/sch/northbridge.c
@@ -78,13 +78,6 @@ static void add_fixed_resources(struct device *dev, int index)
struct resource *resource;
u32 pcie_config_base, pcie_config_size;
- printk(BIOS_DEBUG, "Adding UMA memory area\n");
- resource = new_resource(dev, index++);
- resource->base = (resource_t) uma_memory_base;
- resource->size = (resource_t) uma_memory_size;
- resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
- IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
-
if (get_pcie_bar(&pcie_config_base, &pcie_config_size)) {
printk(BIOS_DEBUG, "Adding PCIe config bar\n");
resource = new_resource(dev, index++);
@@ -184,8 +177,8 @@ static void pci_domain_set_resources(device_t dev)
ram_resource(dev, 4, 768, (tomk - 768));
if (tomk > 4 * 1024 * 1024)
ram_resource(dev, 5, 4096 * 1024, tomk - 4 * 1024 * 1024);
-
- add_fixed_resources(dev, 6);
+ uma_resource(dev, 6, uma_memory_base >> 10, uma_memory_size >> 10);
+ add_fixed_resources(dev, 7);
assign_resources(dev->link_list);
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