[coreboot] Getting started with Coreboot on Intel Core
Karl-Heinz Nirschl
kh.nirschl at googlemail.com
Tue Mar 9 13:41:58 CET 2010
Hi,
no i use crossgcc which looks fine, but still can't hang with postcode 0x23.
if have the following in crt0.disasm:
153 0148 B023E680 post_code(0x23)
154
155 014c E8FCFFFF call stage1_main
155 FF
and the following in romstage.inc (both from build dir):
stage1_main:
subl $24, %esp
/APP
/ 29 "/home/xxx/coreboot/src/cpu/intel/model_6ex/cache_as_ram_disable.c" 1
movb 0xa4, %al
outb %al, $0x80
so i suppose i should at least see postcode 0xa4 if the call
instruction succeeds.
any further hints what i could have done wrong?
regards,
khn
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