[coreboot] [PATCH]es 7 assorted fixes
Mart Raudsepp
mart.raudsepp at artecdesign.ee
Wed Mar 18 18:32:01 CET 2009
Ühel kenal päeval, N, 2008-10-23 kell 03:41, kirjutas Carl-Daniel
Hailfinger:
> On 23.10.2008 01:38, ron minnich wrote:
> > Jens, I am very happy to see these contributions from Lippert. I hope
> > you or someone from this list can look at bringing them forward to v3
> > as well.
>
> This is the GeodeLX RAM speed calculation patch for v3.
>
> Changed RAM speed calculation to fix RAM modules getting rejected only
> due to integer rounding errors. Previously, the formula was:
> speed = 2 * (10000/spd_value)
> For spd_value=60 this means speed = 2 * 166 = 332, which is less than
> 333 and coreboot died saying RAM was incompatible. The new formula is:
> speed = 20000 / spd_value
> For spd_value=60, speed=333, which is fine.
>
> Signed-off-by: Jens Rottmann <JRottmann at LiPPERTEmbedded.de>
> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Tested on ThinCan DBE63 to fix the issue of 333 > 332 comparison for RAM
modules I had problems with before due to bailing out in the
overclocking check.
Acked-by: Mart Raudsepp <mart.raudsepp at artecdesign.ee>
> Index: corebootv3-geodelx_speedcalc/northbridge/amd/geodelx/raminit.c
> ===================================================================
> --- corebootv3-geodelx_speedcalc/northbridge/amd/geodelx/raminit.c (Revision 946)
> +++ corebootv3-geodelx_speedcalc/northbridge/amd/geodelx/raminit.c (Arbeitskopie)
> @@ -261,7 +261,7 @@
> spd_byte0 = spd_byte1;
>
> /* Turn SPD ns time into MHz. Check what the asm does to this math. */
> - speed = 2 * ((10000 / (((spd_byte0 >> 4) * 10) + (spd_byte0 & 0x0F))));
> + speed = 20000 / (((spd_byte0 >> 4) * 10) + (spd_byte0 & 0x0F));
>
> printk(BIOS_DEBUG, "ddr max speed is %d\n", speed);
> /* Current speed > max speed? */
> @@ -353,15 +353,14 @@
> /* Turn SPD ns time into MHz. Check what the asm does
> * to this math.
> */
> - dimm_speed = 2 * (10000 / (((spd_byte >> 4) * 10) +
> - (spd_byte & 0x0F)));
> + dimm_speed = 20000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F));
> if (dimm_speed >= glspeed) {
> /* If -1 timing is supported, check -1 timing > GeodeLink. */
> /* EEPROM byte usage: (25) SDRAM Minimum Clock Cycle Time @ CLX -1 */
> spd_byte = spd_read_byte(dimm0, SPD_SDRAM_CYCLE_TIME_3RD);
> if (spd_byte != 0) {
> /* Turn SPD ns time into MHz. Check what the asm does to this math. */
> - dimm_speed = 2 * (10000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F)));
> + dimm_speed = 20000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F));
> if (dimm_speed <= glspeed) {
> /* Set we can use -.5 timing but not -1. */
> spd_byte = 31 - __builtin_clz((u32) casmap0);
> @@ -388,14 +387,14 @@
> spd_byte = spd_read_byte(dimm1, SPD_SDRAM_CYCLE_TIME_2ND);
> if (spd_byte != 0) {
> /* Turn SPD ns time into MHz. Check what the asm does to this math. */
> - dimm_speed = 2 * (10000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F)));
> + dimm_speed = 20000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F));
> if (dimm_speed >= glspeed) {
> /* If -1 timing is supported, check -1 timing > GeodeLink. */
> /* EEPROM byte usage: (25) SDRAM Minimum Clock Cycle Time @ CLX -1 */
> spd_byte = spd_read_byte(dimm1, SPD_SDRAM_CYCLE_TIME_3RD);
> if (spd_byte != 0) {
> /* Turn SPD ns time into MHz. Check what the asm does to this math. */
> - dimm_speed = 2 * (10000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F)));
> + dimm_speed = 20000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F));
> if (dimm_speed <= glspeed) {
> /* Set we can use -.5 timing but not -1. */
> spd_byte = 31 - __builtin_clz((u32) casmap1);
>
>
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