<p>Michał Żygowski has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/c/coreboot/+/30335">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">superio/ite: Add IT8786E-I<br><br>Based on IT8786E-I V0.4.1 datasheet with following remark:<br><br> "Please note that the IT8786E-I V0.4.1 is<br> applicable only to the D version."<br><br>Signed-off-by: Kyösti Mälkki <kyosti.malkki@3mdeb.com><br>Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com><br>Change-Id: I7317da6a72db64f95f9a790ef96ed7a5f93b3aea<br>---<br>M src/superio/ite/Makefile.inc<br>M src/superio/ite/common/env_ctrl.c<br>M src/superio/ite/common/env_ctrl.h<br>M src/superio/ite/common/env_ctrl_chip.h<br>A src/superio/ite/it8786e/Kconfig<br>A src/superio/ite/it8786e/Makefile.inc<br>A src/superio/ite/it8786e/acpi/superio.asl<br>A src/superio/ite/it8786e/chip.h<br>A src/superio/ite/it8786e/it8786e.h<br>A src/superio/ite/it8786e/superio.c<br>10 files changed, 481 insertions(+), 7 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/30335/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/superio/ite/Makefile.inc b/src/superio/ite/Makefile.inc</span><br><span>index 382dbd7..41b171f6 100644</span><br><span>--- a/src/superio/ite/Makefile.inc</span><br><span>+++ b/src/superio/ite/Makefile.inc</span><br><span>@@ -2,6 +2,7 @@</span><br><span> ## This file is part of the coreboot project.</span><br><span> ##</span><br><span> ## Copyright (C) 2009 Ronald G. Minnich</span><br><span style="color: hsl(120, 100%, 40%);">+## Copyright (C) 2018 Libretrend LDA</span><br><span> ##</span><br><span> ## This program is free software; you can redistribute it and/or modify</span><br><span> ## it under the terms of the GNU General Public License as published by</span><br><span>@@ -29,3 +30,4 @@</span><br><span> subdirs-y += it8728f</span><br><span> subdirs-y += it8772f</span><br><span> subdirs-y += it8783ef</span><br><span style="color: hsl(120, 100%, 40%);">+subdirs-y += it8786e</span><br><span>diff --git a/src/superio/ite/common/env_ctrl.c b/src/superio/ite/common/env_ctrl.c</span><br><span>index 1dc5bb6..ba96996 100644</span><br><span>--- a/src/superio/ite/common/env_ctrl.c</span><br><span>+++ b/src/superio/ite/common/env_ctrl.c</span><br><span>@@ -3,6 +3,7 @@</span><br><span> *</span><br><span> * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.</span><br><span> * Copyright (C) 2016 secunet Security Networks AG</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Libretrend LDA</span><br><span> *</span><br><span> * This program is free software; you can redistribute it and/or modify</span><br><span> * it under the terms of the GNU General Public License as published by</span><br><span>@@ -164,7 +165,8 @@</span><br><span> pwm_ctrl |= ITE_EC_FAN_CTL_TEMPIN(conf->tmpin);</span><br><span> </span><br><span> pwm_start = ITE_EC_FAN_CTL_PWM_START_DUTY(conf->pwm_start);</span><br><span style="color: hsl(0, 100%, 40%);">- pwm_start |= ITE_EC_FAN_CTL_PWM_SLOPE_BIT6(conf->slope);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (!IS_ENABLED(CONFIG_SUPERIO_ITE_IT8786E))</span><br><span style="color: hsl(120, 100%, 40%);">+ pwm_start |= ITE_EC_FAN_CTL_PWM_SLOPE_BIT6(conf->slope);</span><br><span> </span><br><span> pwm_auto = ITE_EC_FAN_CTL_PWM_SLOPE_LOWER(conf->slope);</span><br><span> if (conf->smoothing)</span><br><span>@@ -214,7 +216,8 @@</span><br><span> }</span><br><span> </span><br><span> if (IS_ENABLED(SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG)</span><br><span style="color: hsl(0, 100%, 40%);">- && conf->mode >= FAN_MODE_ON) {</span><br><span style="color: hsl(120, 100%, 40%);">+ && (conf->mode >= FAN_MODE_ON)</span><br><span style="color: hsl(120, 100%, 40%);">+ && !IS_ENABLED(CONFIG_SUPERIO_ITE_IT8786E)) {</span><br><span> reg = ite_ec_read(base, ITE_EC_FAN_TAC_COUNTER_ENABLE);</span><br><span> reg |= ITE_EC_FAN_TAC_16BIT_ENABLE(fan);</span><br><span> ite_ec_write(base, ITE_EC_FAN_TAC_COUNTER_ENABLE, reg);</span><br><span>@@ -271,6 +274,12 @@</span><br><span> for (i = 0; i < ITE_EC_TMPIN_CNT; ++i)</span><br><span> enable_tmpin(base, i + 1, &conf->tmpin[i]);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+ /* Enable External Sensor SMBus Host if configured */</span><br><span style="color: hsl(120, 100%, 40%);">+ if(conf->smbus_en)</span><br><span style="color: hsl(120, 100%, 40%);">+ ite_ec_write(base, ITE_EC_INTERFACE_SELECT,</span><br><span style="color: hsl(120, 100%, 40%);">+ ite_ec_read(base, ITE_EC_INTERFACE_SELECT) |</span><br><span style="color: hsl(120, 100%, 40%);">+ ITE_EC_INTERFACE_SMB_ENABLE);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /* Enable reading of voltage pins */</span><br><span> ite_ec_write(base, ITE_EC_ADC_VOLTAGE_CHANNEL_ENABLE, conf->vin_mask);</span><br><span> </span><br><span>diff --git a/src/superio/ite/common/env_ctrl.h b/src/superio/ite/common/env_ctrl.h</span><br><span>index 11316db..32b105f 100644</span><br><span>--- a/src/superio/ite/common/env_ctrl.h</span><br><span>+++ b/src/superio/ite/common/env_ctrl.h</span><br><span>@@ -3,6 +3,7 @@</span><br><span> *</span><br><span> * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.</span><br><span> * Copyright (C) 2016 secunet Security Networks AG</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Libretrend LDA</span><br><span> *</span><br><span> * This program is free software; you can redistribute it and/or modify</span><br><span> * it under the terms of the GNU General Public License as published by</span><br><span>@@ -31,6 +32,40 @@</span><br><span> #define ITE_EC_CONFIGURATION 0x00</span><br><span> #define ITE_EC_CONFIGURATION_START (1 << 0)</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_SMI_MASK_REG1 0x04</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_SMI_MASK_FAN_TAC5_DIS (1 << 6)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_SMI_MASK_COPEN_DIS (1 << 4)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_SMI_MASK_FAN_TAC4_DIS (1 << 3)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_SMI_MASK_FAN_TAC3_DIS (1 << 2)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_SMI_MASK_FAN_TAC2_DIS (1 << 1)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_SMI_MASK_FAN_TAC1_DIS (1 << 0)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_SMI_MASK_REG2 0x05</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_SMI_MASK_3VSB_DIS (1 << 7)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_SMI_MASK_VIN_DIS(x) (1 << (x))</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_SMI_MASK_REG3 0x06</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_SMI_MASK_AMDTSI_DIS (1 << 3)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_SMI_MASK_TMPIN_DIS(x) (1 << ((x)-1))</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_INT_MASK_REG1 0x07</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_INT_MASK_FAN_TAC5_DIS (1 << 6)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_INT_MASK_COPEN_DIS (1 << 4)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_INT_MASK_FAN_TAC4_DIS (1 << 3)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_INT_MASK_FAN_TAC3_DIS (1 << 2)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_INT_MASK_FAN_TAC2_DIS (1 << 1)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_INT_MASK_FAN_TAC1_DIS (1 << 0)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_INT_MASK_REG2 0x08</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_INT_MASK_3VSB_DIS (1 << 7)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_INT_MASK_VIN_DIS(x) (1 << (x))</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_INT_MASK_REG3 0x06</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_INT_MASK_EXT_SENS_DIS (1 << 7)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_INT_MASK_SMBUS_DIS (1 << 6)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_INT_MASK_AMDTSI_DIS (1 << 3)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_INT_MASK_TMPIN_DIS(x) (1 << ((x)-1))</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #define ITE_EC_INTERFACE_SELECT 0x0a</span><br><span> #define ITE_EC_INTERFACE_PSEUDO_EOC (1 << 7)</span><br><span> #define ITE_EC_INTERFACE_SMB_ENABLE (1 << 6)</span><br><span>@@ -43,17 +78,38 @@</span><br><span> #define ITE_EC_INTERFACE_SPEED_TOLERANCE (1 << 2)</span><br><span> #define ITE_EC_INTERFACE_PECI_AWFCS (1 << 0)</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_TAC_COUNTER_ENABLE 0x0c</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_TAC_16BIT_ENABLE(x) (1 << ((x)-1))</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_TAC_LIMIT(x) (0x10 + ((x)-1))</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_TAC_EXT_LIMIT(x) (0x1b + ((x)-1))</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* SUPERIO_ITE_IT8786E FAN_TAC_CNTRL register content */</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_TAC_CNTRL 0x0c</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_TMPIN3_ENCHANCED_INT_MODE (1 << 7)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_TMPIN2_ENCHANCED_INT_MODE (1 << 6)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_TAC5_EN (1 << 5)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_TAC4_EN (1 << 4)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_TMPIN1_ENCHANCED_INT_MODE (1 << 3)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_AMDTSI_ERR_EN (1 << 0)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #define ITE_EC_FAN_PWM_SMOOTHING_FREQ 0x0b</span><br><span> #define ITE_EC_FAN_PWM_SMOOTHING_MASK (3 << 6)</span><br><span> #define ITE_EC_FAN_PWM_SMOOTHING_1KHZ (0 << 6)</span><br><span> #define ITE_EC_FAN_PWM_SMOOTHING_256HZ (1 << 6)</span><br><span> #define ITE_EC_FAN_PWM_SMOOTHING_64HZ (2 << 6)</span><br><span style="color: hsl(120, 100%, 40%);">+#if IS_ENABLED(CONFIG_SUPERIO_ITE_IT8786E)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_PWM_SMOOTHING_16HZ (1 << 6)</span><br><span style="color: hsl(120, 100%, 40%);">+#else</span><br><span> #define ITE_EC_FAN_PWM_SMOOTHING_16HZ (3 << 6)</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#define ITE_EC_FAN_TAC_COUNTER_ENABLE 0x0c</span><br><span style="color: hsl(0, 100%, 40%);">-#define ITE_EC_FAN_TAC_16BIT_ENABLE(x) (1 << ((x)-1))</span><br><span style="color: hsl(0, 100%, 40%);">-#define ITE_EC_FAN_TAC_LIMIT(x) (0x10 + ((x)-1))</span><br><span style="color: hsl(0, 100%, 40%);">-#define ITE_EC_FAN_TAC_EXT_LIMIT(x) (0x1b + ((x)-1))</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+/* SUPERIO_ITE_IT8786E PWM_SMOOTHING_FREQ contents */</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_PWM_SMOOTHING_1HZ (0 << 6)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_PWM_SMOOTHING_8HZ (2 << 6)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_PWM_SMOOTHING_4HZ (3 << 6)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_CTL5_SEL(x) ((((x)-1) & 3) << 2)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_CTL5_SEL_NONE (3 << 2)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_CTL4_SEL(x) (((x)-1) & 3)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_CTL4_SEL_NONE (3 << 0)</span><br><span> </span><br><span> #define ITE_EC_FAN_MAIN_CTL 0x13</span><br><span> #define ITE_EC_FAN_MAIN_CTL_TAC_EN(x) (1 << ((x)+3))</span><br><span>@@ -127,9 +183,15 @@</span><br><span> #define ITE_EC_FAN_CTL_PWM_START_DUTY(p) ITE_EC_FAN_CTL_PWM_DUTY(p)</span><br><span> #define ITE_EC_FAN_CTL_PWM_AUTO(x) (0x64 + ((x)-1) * 8)</span><br><span> #define ITE_EC_FAN_CTL_AUTO_SMOOTHING_EN (1 << 7)</span><br><span style="color: hsl(120, 100%, 40%);">+#if IS_ENABLED(CONFIG_SUPERIO_ITE_IT8786E)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_CTL_PWM_SLOPE_LOWER(s) ((s) & 0x7f)</span><br><span style="color: hsl(120, 100%, 40%);">+#else</span><br><span> #define ITE_EC_FAN_CTL_PWM_SLOPE_LOWER(s) ((s) & 0x3f)</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span> #define ITE_EC_FAN_CTL_DELTA_TEMP(x) (0x65 + ((x)-1) * 8)</span><br><span> #define ITE_EC_FAN_CTL_DELTA_TEMP_INTRVL(c) ((c) & 0x1f)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_CTL_TARGET_ZONE(x) (0x66 + ((x)-1) * 8)</span><br><span style="color: hsl(120, 100%, 40%);">+#define ITE_EC_FAN_CTL_TARGET_ZONE_MASK 0x0f</span><br><span> </span><br><span> #define ITE_EC_EXTEMP_STATUS 0x88</span><br><span> #define ITE_EC_EXTEMP_STATUS_HOST_BUSY (1 << 0)</span><br><span>diff --git a/src/superio/ite/common/env_ctrl_chip.h b/src/superio/ite/common/env_ctrl_chip.h</span><br><span>index f8f2e1e..4df9b01 100644</span><br><span>--- a/src/superio/ite/common/env_ctrl_chip.h</span><br><span>+++ b/src/superio/ite/common/env_ctrl_chip.h</span><br><span>@@ -3,6 +3,7 @@</span><br><span> *</span><br><span> * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.</span><br><span> * Copyright (C) 2016 secunet Security Networks AG</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Libretrend LDA</span><br><span> *</span><br><span> * This program is free software; you can redistribute it and/or modify</span><br><span> * it under the terms of the GNU General Public License as published by</span><br><span>@@ -95,6 +96,7 @@</span><br><span> bool tmpin_beep;</span><br><span> bool fan_beep;</span><br><span> bool vin_beep;</span><br><span style="color: hsl(120, 100%, 40%);">+ bool smbus_en;</span><br><span> };</span><br><span> </span><br><span> /* Some shorthands for device trees */</span><br><span>diff --git a/src/superio/ite/it8786e/Kconfig b/src/superio/ite/it8786e/Kconfig</span><br><span>new file mode 100644</span><br><span>index 0000000..0077964</span><br><span>--- /dev/null</span><br><span>+++ b/src/superio/ite/it8786e/Kconfig</span><br><span>@@ -0,0 +1,22 @@</span><br><span style="color: hsl(120, 100%, 40%);">+##</span><br><span style="color: hsl(120, 100%, 40%);">+## This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+##</span><br><span style="color: hsl(120, 100%, 40%);">+## Copyright (C) 2016 secunet Security Networks AG</span><br><span style="color: hsl(120, 100%, 40%);">+## Copyright (C) 2018 Libretrend LDA</span><br><span style="color: hsl(120, 100%, 40%);">+##</span><br><span style="color: hsl(120, 100%, 40%);">+## This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+## it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+## the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+##</span><br><span style="color: hsl(120, 100%, 40%);">+## This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+## but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+## GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+##</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config SUPERIO_ITE_IT8786E</span><br><span style="color: hsl(120, 100%, 40%);">+ bool</span><br><span style="color: hsl(120, 100%, 40%);">+ select SUPERIO_ITE_COMMON_ROMSTAGE</span><br><span style="color: hsl(120, 100%, 40%);">+ select SUPERIO_ITE_ENV_CTRL</span><br><span style="color: hsl(120, 100%, 40%);">+ select SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG</span><br><span style="color: hsl(120, 100%, 40%);">+ select SUPERIO_ITE_ENV_CTRL_PWM_FREQ2</span><br><span>diff --git a/src/superio/ite/it8786e/Makefile.inc b/src/superio/ite/it8786e/Makefile.inc</span><br><span>new file mode 100644</span><br><span>index 0000000..560957f</span><br><span>--- /dev/null</span><br><span>+++ b/src/superio/ite/it8786e/Makefile.inc</span><br><span>@@ -0,0 +1,18 @@</span><br><span style="color: hsl(120, 100%, 40%);">+##</span><br><span style="color: hsl(120, 100%, 40%);">+## This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+##</span><br><span style="color: hsl(120, 100%, 40%);">+## Copyright (C) 2016 secunet Security Networks AG</span><br><span style="color: hsl(120, 100%, 40%);">+## Copyright (C) 2018 Libretrend LDA</span><br><span style="color: hsl(120, 100%, 40%);">+##</span><br><span style="color: hsl(120, 100%, 40%);">+## This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+## it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+## the Free Software Foundation; either version 2 of the License, or</span><br><span style="color: hsl(120, 100%, 40%);">+## (at your option) any later version.</span><br><span style="color: hsl(120, 100%, 40%);">+##</span><br><span style="color: hsl(120, 100%, 40%);">+## This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+## but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+## GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+##</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-$(CONFIG_SUPERIO_ITE_IT8786E) += superio.c</span><br><span>diff --git a/src/superio/ite/it8786e/acpi/superio.asl b/src/superio/ite/it8786e/acpi/superio.asl</span><br><span>new file mode 100644</span><br><span>index 0000000..2a8c0d3</span><br><span>--- /dev/null</span><br><span>+++ b/src/superio/ite/it8786e/acpi/superio.asl</span><br><span>@@ -0,0 +1,172 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2011 Christoph Grenz <christophg+cb@grenz-bonn.de></span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2013, 2016 secunet Security Networks AG</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Libretrend LDA</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Include this file into a mainboard's DSDT _SB device tree and it will</span><br><span style="color: hsl(120, 100%, 40%);">+ * expose the IT8786E SuperIO and some of its functionality.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * It allows the change of IO ports, IRQs and DMA settings on logical</span><br><span style="color: hsl(120, 100%, 40%);">+ * devices, disabling and reenabling logical devices.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * LDN State</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x0 FDC Not implemented</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x1 UARTA Implemented, untested</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x2 UARTB Implemented, untested</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x3 PP Not implemented</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x4 EC Not implemented</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x5 KBC Implemented, untested</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x6 MOUSE Implemented, untested</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x7 GPIO Not implemented</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x8 UARTC Implemented, untested</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x9 UARTD Implemented, untested</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0xa UARTE Not implemented</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0xb UARTF Not implemented</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0xc CIR Not implemented</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Controllable through preprocessor defines:</span><br><span style="color: hsl(120, 100%, 40%);">+ * SUPERIO_DEV Device identifier for this SIO (e.g. SIO0)</span><br><span style="color: hsl(120, 100%, 40%);">+ * SUPERIO_PNP_BASE I/O address of the first PnP configuration register</span><br><span style="color: hsl(120, 100%, 40%);">+ * IT8786E_SHOW_UARTA If defined, UARTA will be exposed.</span><br><span style="color: hsl(120, 100%, 40%);">+ * IT8786E_SHOW_UARTB If defined, UARTB will be exposed.</span><br><span style="color: hsl(120, 100%, 40%);">+ * IT8786E_SHOW_UARTC If defined, UARTC will be exposed.</span><br><span style="color: hsl(120, 100%, 40%);">+ * IT8786E_SHOW_UARTD If defined, UARTD will be exposed.</span><br><span style="color: hsl(120, 100%, 40%);">+ * IT8786E_SHOW_KBC If defined, the KBC will be exposed.</span><br><span style="color: hsl(120, 100%, 40%);">+ * IT8786E_SHOW_PS2M If defined, PS/2 mouse support will be exposed.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#undef SUPERIO_CHIP_NAME</span><br><span style="color: hsl(120, 100%, 40%);">+#define SUPERIO_CHIP_NAME IT8786E</span><br><span style="color: hsl(120, 100%, 40%);">+#include <superio/acpi/pnp.asl></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#undef PNP_DEFAULT_PSC</span><br><span style="color: hsl(120, 100%, 40%);">+#define PNP_DEFAULT_PSC Return (0) /* no power management */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONFIGURE_CONTROL CCTL</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Device(SUPERIO_DEV) {</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_HID, EisaId("PNP0A05"))</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_STR, Unicode("ITE IT8786E Super I/O"))</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_UID, SUPERIO_UID(SUPERIO_DEV,))</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Mutex for accesses to the configuration ports */</span><br><span style="color: hsl(120, 100%, 40%);">+ Mutex(CRMX, 1)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* SuperIO configuration ports */</span><br><span style="color: hsl(120, 100%, 40%);">+ OperationRegion (CREG, SystemIO, SUPERIO_PNP_BASE, 0x02)</span><br><span style="color: hsl(120, 100%, 40%);">+ Field (CREG, ByteAcc, NoLock, Preserve)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_ADDR_REG, 8,</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_DATA_REG, 8</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ IndexField (ADDR, DATA, ByteAcc, NoLock, Preserve)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ Offset (0x02),</span><br><span style="color: hsl(120, 100%, 40%);">+ CONFIGURE_CONTROL, 8, /* Global configure control */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Offset (0x07),</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_LOGICAL_DEVICE, 8, /* Logical device selector */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Offset (0x30),</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_DEVICE_ACTIVE, 1, /* Logical device activation */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Offset (0x60),</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_IO0_HIGH_BYTE, 8, /* First I/O port base - high byte */</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_IO0_LOW_BYTE, 8, /* First I/O port base - low byte */</span><br><span style="color: hsl(120, 100%, 40%);">+ Offset (0x62),</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_IO1_HIGH_BYTE, 8, /* Second I/O port base - high byte */</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_IO1_LOW_BYTE, 8, /* Second I/O port base - low byte */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Offset (0x70),</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_IRQ0, 8, /* First IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Method (_CRS)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Announce the used i/o ports to the OS */</span><br><span style="color: hsl(120, 100%, 40%);">+ Return (ResourceTemplate () {</span><br><span style="color: hsl(120, 100%, 40%);">+ IO (Decode16, SUPERIO_PNP_BASE, SUPERIO_PNP_BASE, 0x01, 0x02)</span><br><span style="color: hsl(120, 100%, 40%);">+ })</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef PNP_ENTER_MAGIC_1ST</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef PNP_ENTER_MAGIC_2ND</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef PNP_ENTER_MAGIC_3RD</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef PNP_ENTER_MAGIC_4TH</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef PNP_EXIT_MAGIC_1ST</span><br><span style="color: hsl(120, 100%, 40%);">+ #define PNP_ENTER_MAGIC_1ST 0x87</span><br><span style="color: hsl(120, 100%, 40%);">+ #define PNP_ENTER_MAGIC_2ND 0x01</span><br><span style="color: hsl(120, 100%, 40%);">+ #define PNP_ENTER_MAGIC_3RD 0x55</span><br><span style="color: hsl(120, 100%, 40%);">+#if SUPERIO_PNP_BASE == 0x2e</span><br><span style="color: hsl(120, 100%, 40%);">+ #define PNP_ENTER_MAGIC_4TH 0x55</span><br><span style="color: hsl(120, 100%, 40%);">+#else</span><br><span style="color: hsl(120, 100%, 40%);">+ #define PNP_ENTER_MAGIC_4TH 0xaa</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+ #define PNP_EXIT_SPECIAL_REG CONFIGURE_CONTROL</span><br><span style="color: hsl(120, 100%, 40%);">+ #define PNP_EXIT_SPECIAL_VAL 0x02</span><br><span style="color: hsl(120, 100%, 40%);">+ #include <superio/acpi/pnp_config.asl></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef IT8786E_SHOW_UARTA</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_DDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_REG</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_VAL</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #define SUPERIO_UART_LDN 1</span><br><span style="color: hsl(120, 100%, 40%);">+ #include <superio/acpi/pnp_uart.asl></span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef IT8786E_SHOW_UARTB</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_DDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_REG</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_VAL</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #define SUPERIO_UART_LDN 2</span><br><span style="color: hsl(120, 100%, 40%);">+ #include <superio/acpi/pnp_uart.asl></span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef IT8786E_SHOW_KBC</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_KBC_LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_KBC_PS2M</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_KBC_PS2LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #define SUPERIO_KBC_LDN 5</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef IT8786E_SHOW_PS2M</span><br><span style="color: hsl(120, 100%, 40%);">+ #define SUPERIO_KBC_PS2LDN 6</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+ #include <superio/acpi/pnp_kbc.asl></span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef IT8786E_SHOW_UARTC</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_DDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_REG</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_VAL</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #define SUPERIO_UART_LDN 8</span><br><span style="color: hsl(120, 100%, 40%);">+ #include <superio/acpi/pnp_uart.asl></span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef IT8786E_SHOW_UARTD</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_DDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_REG</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_VAL</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #define SUPERIO_UART_LDN 9</span><br><span style="color: hsl(120, 100%, 40%);">+ #include <superio/acpi/pnp_uart.asl></span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/superio/ite/it8786e/chip.h b/src/superio/ite/it8786e/chip.h</span><br><span>new file mode 100644</span><br><span>index 0000000..fab4472</span><br><span>--- /dev/null</span><br><span>+++ b/src/superio/ite/it8786e/chip.h</span><br><span>@@ -0,0 +1,27 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2016 secunet Security Networks AG</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Libretrend LDA</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; either version 2 of the License, or</span><br><span style="color: hsl(120, 100%, 40%);">+ * (at your option) any later version.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef SUPERIO_ITE_IT8786E_CHIP_H</span><br><span style="color: hsl(120, 100%, 40%);">+#define SUPERIO_ITE_IT8786E_CHIP_H</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <superio/ite/common/env_ctrl_chip.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+struct superio_ite_it8786e_config {</span><br><span style="color: hsl(120, 100%, 40%);">+ struct ite_ec_config ec;</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#endif /* SUPERIO_ITE_IT8786E_CHIP_H */</span><br><span>diff --git a/src/superio/ite/it8786e/it8786e.h b/src/superio/ite/it8786e/it8786e.h</span><br><span>new file mode 100644</span><br><span>index 0000000..dab9427</span><br><span>--- /dev/null</span><br><span>+++ b/src/superio/ite/it8786e/it8786e.h</span><br><span>@@ -0,0 +1,38 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2016 secunet Security Networks AG</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Libretrend LDA</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; either version 2 of the License, or</span><br><span style="color: hsl(120, 100%, 40%);">+ * (at your option) any later version.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef SUPERIO_ITE_IT8786E_H</span><br><span style="color: hsl(120, 100%, 40%);">+#define SUPERIO_ITE_IT8786E_H</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define IT8786E_FDC 0x00 /* Floppy disk controller */</span><br><span style="color: hsl(120, 100%, 40%);">+#define IT8786E_SP1 0x01 /* COM1 */</span><br><span style="color: hsl(120, 100%, 40%);">+#define IT8786E_SP2 0x02 /* COM2 */</span><br><span style="color: hsl(120, 100%, 40%);">+#define IT8786E_PP 0x03 /* Printer port */</span><br><span style="color: hsl(120, 100%, 40%);">+#define IT8786E_EC 0x04 /* Environment controller */</span><br><span style="color: hsl(120, 100%, 40%);">+#define IT8786E_KBCK 0x05 /* Keyboard */</span><br><span style="color: hsl(120, 100%, 40%);">+#define IT8786E_KBCM 0x06 /* Mouse */</span><br><span style="color: hsl(120, 100%, 40%);">+#define IT8786E_GPIO 0x07 /* GPIO */</span><br><span style="color: hsl(120, 100%, 40%);">+#define IT8786E_SP3 0x08 /* COM3 */</span><br><span style="color: hsl(120, 100%, 40%);">+#define IT8786E_SP4 0x09 /* COM4 */</span><br><span style="color: hsl(120, 100%, 40%);">+#define IT8786E_CIR 0x0a /* Consumer IR */</span><br><span style="color: hsl(120, 100%, 40%);">+#define IT8786E_SP5 0x0b /* COM5 */</span><br><span style="color: hsl(120, 100%, 40%);">+#define IT8786E_SP6 0x0c /* COM6 */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/io.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <stdint.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#endif /* SUPERIO_ITE_IT8786E_H */</span><br><span>diff --git a/src/superio/ite/it8786e/superio.c b/src/superio/ite/it8786e/superio.c</span><br><span>new file mode 100644</span><br><span>index 0000000..0e86a4d</span><br><span>--- /dev/null</span><br><span>+++ b/src/superio/ite/it8786e/superio.c</span><br><span>@@ -0,0 +1,122 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2016 secunet Security Networks AG</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Libretrend LDA</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; either version 2 of the License, or</span><br><span style="color: hsl(120, 100%, 40%);">+ * (at your option) any later version.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/device.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pnp.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <pc80/keyboard.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <superio/conf_mode.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <superio/ite/common/env_ctrl.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include "it8786e.h"</span><br><span style="color: hsl(120, 100%, 40%);">+#include "chip.h"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void it8786e_init(struct device *const dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ const struct superio_ite_it8786e_config *conf;</span><br><span style="color: hsl(120, 100%, 40%);">+ const struct resource *res;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (!dev->enabled)</span><br><span style="color: hsl(120, 100%, 40%);">+ return;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (dev->path.pnp.device) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case IT8786E_EC:</span><br><span style="color: hsl(120, 100%, 40%);">+ conf = dev->chip_info;</span><br><span style="color: hsl(120, 100%, 40%);">+ res = find_resource(dev, PNP_IDX_IO0);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (!conf || !res)</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ ite_ec_init(res->base, &conf->ec);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case IT8786E_KBCK:</span><br><span style="color: hsl(120, 100%, 40%);">+ pc_keyboard_init(NO_AUX_DEVICE);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static struct device_operations ops = {</span><br><span style="color: hsl(120, 100%, 40%);">+ .read_resources = pnp_read_resources,</span><br><span style="color: hsl(120, 100%, 40%);">+ .set_resources = pnp_set_resources,</span><br><span style="color: hsl(120, 100%, 40%);">+ .enable_resources = pnp_enable_resources,</span><br><span style="color: hsl(120, 100%, 40%);">+ .enable = pnp_alt_enable,</span><br><span style="color: hsl(120, 100%, 40%);">+ .init = it8786e_init,</span><br><span style="color: hsl(120, 100%, 40%);">+ .ops_pnp_mode = &pnp_conf_mode_870155_aa,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static struct pnp_info pnp_dev_info[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Floppy Disk Controller */</span><br><span style="color: hsl(120, 100%, 40%);">+ { &ops, IT8786E_FDC, PNP_IO0 | PNP_IRQ0 | PNP_MSC0 | PNP_MSC1 |</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_MSC2,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Serial Port 1 */</span><br><span style="color: hsl(120, 100%, 40%);">+ { &ops, IT8786E_SP1, PNP_IO0 | PNP_IRQ0 | PNP_MSC0 | PNP_MSC1 |</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_MSC2,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Serial Port 2 */</span><br><span style="color: hsl(120, 100%, 40%);">+ { &ops, IT8786E_SP2, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Printer Port */</span><br><span style="color: hsl(120, 100%, 40%);">+ { &ops, IT8786E_PP, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_DRQ0 |</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_MSC0,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x0ffc, 0x0ffc, },</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Environmental Controller */</span><br><span style="color: hsl(120, 100%, 40%);">+ { &ops, IT8786E_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_MSC0 |</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_MSC1 | PNP_MSC2 | PNP_MSC3 | PNP_MSC4 |</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_MSC5 | PNP_MSC6 | PNP_MSCA | PNP_MSCB |</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_MSCC,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x0ff8, 0x0ffc, },</span><br><span style="color: hsl(120, 100%, 40%);">+ /* KBC Keyboard */</span><br><span style="color: hsl(120, 100%, 40%);">+ { &ops, IT8786E_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_MSC0,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x0fff, 0x0fff, },</span><br><span style="color: hsl(120, 100%, 40%);">+ /* KBC Mouse */</span><br><span style="color: hsl(120, 100%, 40%);">+ { &ops, IT8786E_KBCM, PNP_IRQ0 | PNP_MSC0, },</span><br><span style="color: hsl(120, 100%, 40%);">+ /* GPIO */</span><br><span style="color: hsl(120, 100%, 40%);">+ { &ops, IT8786E_GPIO, PNP_IO0 | PNP_IO1 | PNP_IRQ0 |</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_MSC0 | PNP_MSC1 | PNP_MSC2 | PNP_MSC3 |</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_MSC4 | PNP_MSC5 | PNP_MSC6 | PNP_MSC7 |</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_MSC8 | PNP_MSC9 | PNP_MSCA | PNP_MSCB,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x0ffc, 0x0fff, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Serial Port 3 */</span><br><span style="color: hsl(120, 100%, 40%);">+ { &ops, IT8786E_SP3, PNP_IO0 | PNP_IRQ0 | PNP_MSC0 | PNP_MSC1 |</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_MSC2,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Serial Port 4 */</span><br><span style="color: hsl(120, 100%, 40%);">+ { &ops, IT8786E_SP4, PNP_IO0 | PNP_IRQ0 | PNP_MSC0 | PNP_MSC1 |</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_MSC2,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Consumer Infrared */</span><br><span style="color: hsl(120, 100%, 40%);">+ { &ops, IT8786E_CIR, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Serial Port 5 */</span><br><span style="color: hsl(120, 100%, 40%);">+ { &ops, IT8786E_SP5, PNP_IO0 | PNP_IRQ0 | PNP_MSC0 | PNP_MSC1 |</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_MSC2,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Serial Port 6 */</span><br><span style="color: hsl(120, 100%, 40%);">+ { &ops, IT8786E_SP6, PNP_IO0 | PNP_IRQ0 | PNP_MSC0 | PNP_MSC1 |</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_MSC2,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x0ff8, },</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void enable_dev(struct device *dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ pnp_enable_devices(dev, &pnp_ops,</span><br><span style="color: hsl(120, 100%, 40%);">+ ARRAY_SIZE(pnp_dev_info), pnp_dev_info);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+struct chip_operations superio_ite_it8786e_ops = {</span><br><span style="color: hsl(120, 100%, 40%);">+ CHIP_NAME("ITE IT8786E Super I/O")</span><br><span style="color: hsl(120, 100%, 40%);">+ .enable_dev = enable_dev,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/30335">change 30335</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/c/coreboot/+/30335"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: I7317da6a72db64f95f9a790ef96ed7a5f93b3aea </div>
<div style="display:none"> Gerrit-Change-Number: 30335 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Michał Żygowski <michal.zygowski@3mdeb.com> </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>