<p>Patrick Georgi has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/c/coreboot/+/30344">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">Documentation: Update 4.9 release notes<br><br>Change-Id: Ib1057541dc0decd98921f3c84de3c08f10cd802e<br>Signed-off-by: Patrick Georgi <pgeorgi@google.com><br>---<br>M Documentation/releases/coreboot-4.9-relnotes.md<br>1 file changed, 250 insertions(+), 19 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/30344/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/Documentation/releases/coreboot-4.9-relnotes.md b/Documentation/releases/coreboot-4.9-relnotes.md</span><br><span>index cca5f64..47158ca 100644</span><br><span>--- a/Documentation/releases/coreboot-4.9-relnotes.md</span><br><span>+++ b/Documentation/releases/coreboot-4.9-relnotes.md</span><br><span>@@ -1,36 +1,267 @@</span><br><span style="color: hsl(0, 100%, 40%);">-Upcoming release - coreboot 4.9</span><br><span style="color: hsl(120, 100%, 40%);">+coreboot 4.9 release notes</span><br><span> ==========================</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-The 4.9 release is planned for November 2018</span><br><span style="color: hsl(120, 100%, 40%);">+The 4.9 release covers commit 532b8d5f25 to commit 7f520c8fe6</span><br><span style="color: hsl(120, 100%, 40%);">+There is a pgp signed 4.9 tag in the git repository, and a branch will</span><br><span style="color: hsl(120, 100%, 40%);">+be created as needed.</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-Update this document with changes that should be in the release</span><br><span style="color: hsl(0, 100%, 40%);">-notes.</span><br><span style="color: hsl(0, 100%, 40%);">-* Please use Markdown.</span><br><span style="color: hsl(0, 100%, 40%);">-* See the [4.7](coreboot-4.7-relnotes.md) and [4.8](coreboot-4.8.1-relnotes.md)</span><br><span style="color: hsl(0, 100%, 40%);">- release notes for the general format.</span><br><span style="color: hsl(0, 100%, 40%);">-* The chip and board additions and removals will be updated right</span><br><span style="color: hsl(0, 100%, 40%);">-before the release, so those do not need to be added.</span><br><span style="color: hsl(120, 100%, 40%);">+In the little more than 7 months since 4.8.1 we had 175 authors commit</span><br><span style="color: hsl(120, 100%, 40%);">+2610 changes to master. The changes were, for the most part, all over</span><br><span style="color: hsl(120, 100%, 40%);">+the place, touching every part of the repository: chipsets, mainboards,</span><br><span style="color: hsl(120, 100%, 40%);">+tools, build system, documentation.</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+In that time we also had 70 authors made their first commit to coreboot:</span><br><span style="color: hsl(120, 100%, 40%);">+Welcome and to many more!</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+Finally, a big Thank You to all contributors who helped shape the</span><br><span style="color: hsl(120, 100%, 40%);">+coreboot project, community and code with their effort, no matter if</span><br><span style="color: hsl(120, 100%, 40%);">+through development, review, testing, documentation or by helping people</span><br><span style="color: hsl(120, 100%, 40%);">+asking questions on our venues like IRC or our mailing list.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Clean up</span><br><span style="color: hsl(120, 100%, 40%);">+--------</span><br><span style="color: hsl(120, 100%, 40%);">+If there's any topic to give to this release, "clean up" might be the</span><br><span style="color: hsl(120, 100%, 40%);">+most appropriate: There was lots of effort to bring the codebase into</span><br><span style="color: hsl(120, 100%, 40%);">+compliance with our coding style, to remove old idioms that we'd like</span><br><span style="color: hsl(120, 100%, 40%);">+to retire like the overloaded `device_t` data type, and to let features</span><br><span style="color: hsl(120, 100%, 40%);">+percolate through the entire tree to bring more uniformity to its parts.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+For example, during the coreboot 4.4 cycle, coreboot gained the notion</span><br><span style="color: hsl(120, 100%, 40%);">+of mainboard variants to avoid duplication of code in rather similar</span><br><span style="color: hsl(120, 100%, 40%);">+mainboards.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Back then, this feature was developed and used mostly for the benefit</span><br><span style="color: hsl(120, 100%, 40%);">+of Chrome OS devices, but more recently the code for various Lenovo</span><br><span style="color: hsl(120, 100%, 40%);">+Thinkpads was deduplicated in the same way.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Another part of cleaning up our tree is improving our tools that help</span><br><span style="color: hsl(120, 100%, 40%);">+developers follow coding style and avoid mistakes, as well as the</span><br><span style="color: hsl(120, 100%, 40%);">+infrastructure we have for automated build tests and we've seen quite</span><br><span style="color: hsl(120, 100%, 40%);">+some activity in that space as well.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Documentation</span><br><span style="color: hsl(120, 100%, 40%);">+-------------</span><br><span style="color: hsl(120, 100%, 40%);">+Since the last release we also moved the documentation into the</span><br><span style="color: hsl(120, 100%, 40%);">+repository. No need for a special wiki account to edit the documentation,</span><br><span style="color: hsl(120, 100%, 40%);">+and by colocating sources and documentation, it's easier to keep the</span><br><span style="color: hsl(120, 100%, 40%);">+latter in sync with the code, too.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+This effort is still under way, which is why we still host the old wiki (now</span><br><span style="color: hsl(120, 100%, 40%);">+read-only) in parallel to the [new documentation</span><br><span style="color: hsl(120, 100%, 40%);">+site](https://doc.coreboot.org) that is rendered from coreboot.git's</span><br><span style="color: hsl(120, 100%, 40%);">+Documentation/ directory.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Blobs handling</span><br><span style="color: hsl(120, 100%, 40%);">+--------------</span><br><span style="color: hsl(120, 100%, 40%);">+Another big change is in our blobs handling: Given that Intel now</span><br><span style="color: hsl(120, 100%, 40%);">+provides a reasonably licensed repository with FSP binaries, we were</span><br><span style="color: hsl(120, 100%, 40%);">+able to mirror it to coreboot.org and integrate it in the build system.</span><br><span style="color: hsl(120, 100%, 40%);">+This makes it easier to have working images out of the box for devices</span><br><span style="color: hsl(120, 100%, 40%);">+that depend on Intel's proprietary init code.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+As usual the blobs aren't part of the coreboot tree and only downloaded</span><br><span style="color: hsl(120, 100%, 40%);">+with the `USE_BLOBS` options.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Deprecations</span><br><span style="color: hsl(120, 100%, 40%);">+------------</span><br><span style="color: hsl(120, 100%, 40%);">+One of the first changes to coreboot after the 4.8 release was to remove</span><br><span style="color: hsl(120, 100%, 40%);">+boards that didn't support certain new features and were apparently</span><br><span style="color: hsl(120, 100%, 40%);">+unmaintained, as discussed in the release notes of coreboot 4.6.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+We didn't follow up on all plans made back then to deprecate boards more</span><br><span style="color: hsl(120, 100%, 40%);">+aggressively: The board status reporting mechanism is still rather raw</span><br><span style="color: hsl(120, 100%, 40%);">+and therefore places quite a burden on otherwise sympathetic contributors</span><br><span style="color: hsl(120, 100%, 40%);">+of build results.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Also, there will be no deprecations after 4.10: Due to its slipping</span><br><span style="color: hsl(120, 100%, 40%);">+schedule, coreboot 4.9 is released rather late, and as a result 4.10</span><br><span style="color: hsl(120, 100%, 40%);">+will only see about 4 months of development. We considered that a rather</span><br><span style="color: hsl(120, 100%, 40%);">+short timeframe in which to bring old boards up to new standards, and</span><br><span style="color: hsl(120, 100%, 40%);">+so the next deprecation cycle may be announced with 4.10 to occur after</span><br><span style="color: hsl(120, 100%, 40%);">+4.11 is released, in late 2019.</span><br><span> </span><br><span> General changes</span><br><span> ---------------</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> * Various code cleanups</span><br><span style="color: hsl(0, 100%, 40%);">- * Removed `device_t` in favor of `struct device*` in ramstage code</span><br><span style="color: hsl(0, 100%, 40%);">- * Improve adherence to coding style</span><br><span style="color: hsl(120, 100%, 40%);">+ * Removed `device_t` in favor of `struct device*` in ramstage code</span><br><span style="color: hsl(120, 100%, 40%);">+ * Removed unnecessary include directives</span><br><span style="color: hsl(120, 100%, 40%);">+ * Improved adherence to coding style</span><br><span style="color: hsl(120, 100%, 40%);">+ * Deduplicated boards by using the variants mechanism</span><br><span> * Expand use of the postcar stage</span><br><span> * Add bootblock compression capability: on systems that copy the bootblock</span><br><span style="color: hsl(0, 100%, 40%);">- from very slow flash to ERAM, allow adding a stub that decompresses the</span><br><span style="color: hsl(0, 100%, 40%);">- bootblock into ERAM to minimize the amount of flash reads</span><br><span style="color: hsl(120, 100%, 40%);">+ from very slow flash to SRAM, allow adding a stub that decompresses the</span><br><span style="color: hsl(120, 100%, 40%);">+ bootblock into SRAM to minimize the amount of flash reads</span><br><span> * Rename the POWER8 architecture port to PPC64 to reflect that it isn't limited</span><br><span> to POWER8</span><br><span style="color: hsl(120, 100%, 40%);">+* Added support for booting FIT (uImage) payloads on arm64</span><br><span style="color: hsl(120, 100%, 40%);">+* Added SPI flash write protection API</span><br><span style="color: hsl(120, 100%, 40%);">+ * Implemented on Winbond</span><br><span style="color: hsl(120, 100%, 40%);">+* Implemented TCPA log for measured boot</span><br><span style="color: hsl(120, 100%, 40%);">+* Implemented GDB support for arm64 architecture in libpayload</span><br><span style="color: hsl(120, 100%, 40%);">+* Dropped support for unmaintained code paths</span><br><span style="color: hsl(120, 100%, 40%);">+* Measured boot support</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-Added mainboards</span><br><span>-----------------</span><br><span style="color: hsl(0, 100%, 40%);">-* Lenovo W530 Intel Ivybridge</span><br><span style="color: hsl(120, 100%, 40%);">+Added 56 mainboards</span><br><span style="color: hsl(120, 100%, 40%);">+-------------------</span><br><span style="color: hsl(120, 100%, 40%);">+* ASROCK G41C-GS</span><br><span style="color: hsl(120, 100%, 40%);">+* ASROCK G41M-GS</span><br><span style="color: hsl(120, 100%, 40%);">+* ASROCK G41M-S3</span><br><span style="color: hsl(120, 100%, 40%);">+* ASROCK G41M-VS3 R2.0</span><br><span style="color: hsl(120, 100%, 40%);">+* ASROCK H81M-HDS</span><br><span style="color: hsl(120, 100%, 40%);">+* ASUS P5QC</span><br><span style="color: hsl(120, 100%, 40%);">+* ASUS P5QL-PRO</span><br><span style="color: hsl(120, 100%, 40%);">+* ASUS P5Q-PRO</span><br><span style="color: hsl(120, 100%, 40%);">+* ASUS P8H61-M-LX</span><br><span style="color: hsl(120, 100%, 40%);">+* ASUS P8H61-M-PRO</span><br><span style="color: hsl(120, 100%, 40%);">+* CAVIUM CN8100-SFF-EVB</span><br><span style="color: hsl(120, 100%, 40%);">+* FACEBOOK WATSON</span><br><span style="color: hsl(120, 100%, 40%);">+* FOXCONN D41S</span><br><span style="color: hsl(120, 100%, 40%);">+* GIGABYTE GA-H61M-S2PV</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE ALEENA</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE AMPTON</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE ARCADA</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE ASUKA</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE BOBBA</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE BUDDY</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE CAREENA</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE CAROLINE</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE CASTA</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE CAVE</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE DELAN</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE DRAGONEGG</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE FLEEX</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE HATCH</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE KARMA</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE KUKUI</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE LIARA</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE MEEP</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE RAMMUS</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE SARIEN</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE SENTRY</span><br><span style="color: hsl(120, 100%, 40%);">+* HEWLETT PACKARD HP COMPAQ 8200 ELITE SFF PC</span><br><span style="color: hsl(120, 100%, 40%);">+* INTEL COFFEELAKE RVP11</span><br><span style="color: hsl(120, 100%, 40%);">+* INTEL COFFEELAKE RVP8</span><br><span style="color: hsl(120, 100%, 40%);">+* INTEL COFFEELAKE RVPU</span><br><span style="color: hsl(120, 100%, 40%);">+* INTEL DG41WV</span><br><span style="color: hsl(120, 100%, 40%);">+* INTEL ICELAKE RVPU</span><br><span style="color: hsl(120, 100%, 40%);">+* INTEL ICELAKE RVPY</span><br><span style="color: hsl(120, 100%, 40%);">+* INTEL WHISKEYLAKE RVP</span><br><span style="color: hsl(120, 100%, 40%);">+* LENOVO T431S</span><br><span style="color: hsl(120, 100%, 40%);">+* LENOVO THINKCENTRE A58</span><br><span style="color: hsl(120, 100%, 40%);">+* LENOVO W500</span><br><span style="color: hsl(120, 100%, 40%);">+* LENOVO W530</span><br><span style="color: hsl(120, 100%, 40%);">+* OPENCELLULAR ELGON</span><br><span style="color: hsl(120, 100%, 40%);">+* OPENCELLULAR ROTUNDU</span><br><span style="color: hsl(120, 100%, 40%);">+* OPENCELLULAR SUPABRCKV1</span><br><span style="color: hsl(120, 100%, 40%);">+* SIEMENS MC-APL2</span><br><span style="color: hsl(120, 100%, 40%);">+* SIEMENS MC-APL3</span><br><span style="color: hsl(120, 100%, 40%);">+* SIEMENS MC-APL4</span><br><span style="color: hsl(120, 100%, 40%);">+* SIEMENS MC-APL5</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Dropped 71 mainboards</span><br><span style="color: hsl(120, 100%, 40%);">+---------------------</span><br><span style="color: hsl(120, 100%, 40%);">+* AAEON PFM-540I REVB</span><br><span style="color: hsl(120, 100%, 40%);">+* AMD DB800</span><br><span style="color: hsl(120, 100%, 40%);">+* AMD DBM690T</span><br><span style="color: hsl(120, 100%, 40%);">+* AMD F2950</span><br><span style="color: hsl(120, 100%, 40%);">+* AMD MAHOGANY</span><br><span style="color: hsl(120, 100%, 40%);">+* AMD NORWICH</span><br><span style="color: hsl(120, 100%, 40%);">+* AMD PISTACHIO</span><br><span style="color: hsl(120, 100%, 40%);">+* AMD SERENGETI-CHEETAH</span><br><span style="color: hsl(120, 100%, 40%);">+* ARTECGROUP DBE61</span><br><span style="color: hsl(120, 100%, 40%);">+* ASROCK 939A785GMH</span><br><span style="color: hsl(120, 100%, 40%);">+* ASUS A8N-E</span><br><span style="color: hsl(120, 100%, 40%);">+* ASUS A8N-SLI</span><br><span style="color: hsl(120, 100%, 40%);">+* ASUS A8V-E DELUXE</span><br><span style="color: hsl(120, 100%, 40%);">+* ASUS A8V-E SE</span><br><span style="color: hsl(120, 100%, 40%);">+* ASUS K8V-X</span><br><span style="color: hsl(120, 100%, 40%);">+* ASUS KFSN4-DRE K8</span><br><span style="color: hsl(120, 100%, 40%);">+* ASUS M2N-E</span><br><span style="color: hsl(120, 100%, 40%);">+* ASUS M2V</span><br><span style="color: hsl(120, 100%, 40%);">+* ASUS M2V MX-SE</span><br><span style="color: hsl(120, 100%, 40%);">+* BACHMANN OT200</span><br><span style="color: hsl(120, 100%, 40%);">+* BCOM WINNETP680</span><br><span style="color: hsl(120, 100%, 40%);">+* BROADCOM BLAST</span><br><span style="color: hsl(120, 100%, 40%);">+* DIGITALLOGIC MSM800SEV</span><br><span style="color: hsl(120, 100%, 40%);">+* GIGABYTE GA-2761GXDK</span><br><span style="color: hsl(120, 100%, 40%);">+* GIGABYTE M57SLI</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE KAHLEE</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE MEOWTH</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE PURIN</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE ROTOR</span><br><span style="color: hsl(120, 100%, 40%);">+* GOOGLE ZOOMBINI</span><br><span style="color: hsl(120, 100%, 40%);">+* HP DL145-G1</span><br><span style="color: hsl(120, 100%, 40%);">+* HP DL145-G3</span><br><span style="color: hsl(120, 100%, 40%);">+* IEI PCISA LX-800 R10</span><br><span style="color: hsl(120, 100%, 40%);">+* IEI PM LX2-800 R10</span><br><span style="color: hsl(120, 100%, 40%);">+* IEI PM LX-800 R11</span><br><span style="color: hsl(120, 100%, 40%);">+* INTEL COUGAR-CANYON2</span><br><span style="color: hsl(120, 100%, 40%);">+* INTEL STARGO2</span><br><span style="color: hsl(120, 100%, 40%);">+* IWILL DK8 HTX</span><br><span style="color: hsl(120, 100%, 40%);">+* JETWAY J7F2</span><br><span style="color: hsl(120, 100%, 40%);">+* JETWAY J7F4K1G2E</span><br><span style="color: hsl(120, 100%, 40%);">+* JETWAY J7F4K1G5D</span><br><span style="color: hsl(120, 100%, 40%);">+* KONTRON KT690</span><br><span style="color: hsl(120, 100%, 40%);">+* LINUTOP LINUTOP1</span><br><span style="color: hsl(120, 100%, 40%);">+* LIPPERT HURRICANE LX</span><br><span style="color: hsl(120, 100%, 40%);">+* LIPPERT LITERUNNER LX</span><br><span style="color: hsl(120, 100%, 40%);">+* LIPPERT ROADRUNNER LX</span><br><span style="color: hsl(120, 100%, 40%);">+* LIPPERT SPACERUNNER LX</span><br><span style="color: hsl(120, 100%, 40%);">+* LOWRISC NEXYS4DDR</span><br><span style="color: hsl(120, 100%, 40%);">+* MSI MS7135</span><br><span style="color: hsl(120, 100%, 40%);">+* MSI MS7260</span><br><span style="color: hsl(120, 100%, 40%);">+* MSI MS9185</span><br><span style="color: hsl(120, 100%, 40%);">+* MSI MS9282</span><br><span style="color: hsl(120, 100%, 40%);">+* NVIDIA L1-2PVV</span><br><span style="color: hsl(120, 100%, 40%);">+* SIEMENS SITEMP-G1P1</span><br><span style="color: hsl(120, 100%, 40%);">+* SUNW ULTRA40</span><br><span style="color: hsl(120, 100%, 40%);">+* SUNW ULTRA40M2</span><br><span style="color: hsl(120, 100%, 40%);">+* SUPERMICRO H8DME</span><br><span style="color: hsl(120, 100%, 40%);">+* SUPERMICRO H8DMR</span><br><span style="color: hsl(120, 100%, 40%);">+* TECHNEXION TIM5690</span><br><span style="color: hsl(120, 100%, 40%);">+* TECHNEXION TIM8690</span><br><span style="color: hsl(120, 100%, 40%);">+* TRAVERSE GEOS</span><br><span style="color: hsl(120, 100%, 40%);">+* TYAN S2912</span><br><span style="color: hsl(120, 100%, 40%);">+* VIA EPIA-CN</span><br><span style="color: hsl(120, 100%, 40%);">+* VIA EPIA-M700</span><br><span style="color: hsl(120, 100%, 40%);">+* VIA PC2500E</span><br><span style="color: hsl(120, 100%, 40%);">+* VIA VT8454C</span><br><span style="color: hsl(120, 100%, 40%);">+* WINENT MB6047</span><br><span style="color: hsl(120, 100%, 40%);">+* WINENT PL6064</span><br><span style="color: hsl(120, 100%, 40%);">+* WINNET G170</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+CPU changes</span><br><span style="color: hsl(120, 100%, 40%);">+-----------</span><br><span style="color: hsl(120, 100%, 40%);">+* cpu/intel/model\_2065x,206ax,haswell: Switch to `POSTCAR_STAGE`</span><br><span style="color: hsl(120, 100%, 40%);">+* cpu/intel/slot\_1: Switch to different CAR setup</span><br><span style="color: hsl(120, 100%, 40%);">+* Dropped support for the FSP1.0 sandy-/ivy-bridge bootpath</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+SoC changes</span><br><span style="color: hsl(120, 100%, 40%);">+-----------</span><br><span style="color: hsl(120, 100%, 40%);">+* Added Cavium CN81xx, Intel Ice Lake and Mediatek MT8183</span><br><span style="color: hsl(120, 100%, 40%);">+* Dropped Broadcom Cygnus, Lowrisc and Marvell mvmap2315</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Northbridge changes</span><br><span style="color: hsl(120, 100%, 40%);">+-------------------</span><br><span style="color: hsl(120, 100%, 40%);">+* Dropped AMD K8, VIA CN700, VIA CX700, VIA VX800 because they lack `EARLY_CBMEM` support</span><br><span style="color: hsl(120, 100%, 40%);">+* intel/e7505: Moved to `EARLY_CBMEM`</span><br><span style="color: hsl(120, 100%, 40%);">+* nb/intel/i945,e7505,pineview,x4x,gm45,i440bx: Moved to `POSTCAR_STAGE`</span><br><span style="color: hsl(120, 100%, 40%);">+* nb/intel/i440bx, e7505: Moved to `RELOCATABLE_RAMSTAGE`</span><br><span style="color: hsl(120, 100%, 40%);">+* intel/x4x: Add DDR3 support</span><br><span style="color: hsl(120, 100%, 40%);">+* nb/intel/pineview: Speed up fetching SPD</span><br><span style="color: hsl(120, 100%, 40%);">+* nb/intel/i945,gm45,x4x,pineview: Use TSEG in SMI</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Southbridge changes</span><br><span style="color: hsl(120, 100%, 40%);">+-------------------</span><br><span style="color: hsl(120, 100%, 40%);">+* sb/intel/i82801{g,i,j}x, lynxpoint: Use the common ACPI pirq generator</span><br><span style="color: hsl(120, 100%, 40%);">+* sb/intel/i82801{g,i,j}x: Use common code to set up SMM and for the smihandler</span><br><span style="color: hsl(120, 100%, 40%);">+* Use common functions for PMBASE configuration</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Payload changes</span><br><span style="color: hsl(120, 100%, 40%);">+---------------</span><br><span style="color: hsl(120, 100%, 40%);">+* Support initrd in uImage/FIT to be placed above 4GiB</span><br><span style="color: hsl(120, 100%, 40%);">+* Added documentation for uImage/FIT payloads</span><br><span> </span><br><span> Toolchain</span><br><span> ---------</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-* Update IASL to version 10280531</span><br><span style="color: hsl(120, 100%, 40%);">+* Update to gcc 8.1.0, binutils 2.30, IASL 20180810, clang 6</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/30344">change 30344</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: Ib1057541dc0decd98921f3c84de3c08f10cd802e </div>
<div style="display:none"> Gerrit-Change-Number: 30344 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Patrick Georgi <pgeorgi@google.com> </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>