<p>Patrick Georgi <strong>merged</strong> this change.</p><p><a href="https://review.coreboot.org/c/coreboot/+/29859">View Change</a></p><div style="white-space:pre-wrap">Approvals:
build bot (Jenkins): Verified
Patrick Rudolph: Looks good to me, approved
Boon Tiong Teo: Looks good to me, but someone else must approve
</div><pre style="font-family: monospace,monospace; white-space: pre-wrap;">Documentation/../../kblrvp11: Add RVP11 documentation<br><br>Signed-off-by: Praveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com><br>Change-Id: I01509c2fa2c127b77ae72b8b0aaac0f826b0bedd<br>Reviewed-on: https://review.coreboot.org/c/29859<br>Tested-by: build bot (Jenkins) <no-reply@coreboot.org><br>Reviewed-by: Patrick Rudolph <siro@das-labor.org><br>Reviewed-by: Boon Tiong Teo <boon.tiong.teo@intel.com><br>---<br>M Documentation/mainboard/index.md<br>A Documentation/mainboard/intel/kblrvp11.md<br>2 files changed, 80 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md</span><br><span>index 356f203..f97e178 100644</span><br><span>--- a/Documentation/mainboard/index.md</span><br><span>+++ b/Documentation/mainboard/index.md</span><br><span>@@ -24,6 +24,7 @@</span><br><span> </span><br><span> - [DG43GT](intel/dg43gt.md)</span><br><span> - [IceLake RVP](intel/icelake_rvp.md)</span><br><span style="color: hsl(120, 100%, 40%);">+- [KBLRVP11](intel/kblrvp11.md)</span><br><span> </span><br><span> ## Foxconn</span><br><span> </span><br><span>diff --git a/Documentation/mainboard/intel/kblrvp11.md b/Documentation/mainboard/intel/kblrvp11.md</span><br><span>new file mode 100644</span><br><span>index 0000000..5b0496d</span><br><span>--- /dev/null</span><br><span>+++ b/Documentation/mainboard/intel/kblrvp11.md</span><br><span>@@ -0,0 +1,79 @@</span><br><span style="color: hsl(120, 100%, 40%);">+# Intel Kaby lake RVP11</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+## Specs</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+* 1 SATA cable connect</span><br><span style="color: hsl(120, 100%, 40%);">+* 1 SATAe direct</span><br><span style="color: hsl(120, 100%, 40%);">+* 2 USB2.0 connector</span><br><span style="color: hsl(120, 100%, 40%);">+* 4 USB3.0 connector</span><br><span style="color: hsl(120, 100%, 40%);">+* 1 Gigabit Ethernet</span><br><span style="color: hsl(120, 100%, 40%);">+* 1 x4 PCIe slot</span><br><span style="color: hsl(120, 100%, 40%);">+* 1 x1 PCIe slot</span><br><span style="color: hsl(120, 100%, 40%);">+* 1 X16 PEG slot</span><br><span style="color: hsl(120, 100%, 40%);">+* UART debug DB9 connector</span><br><span style="color: hsl(120, 100%, 40%);">+* 4 DIMMS with DDR4 memory</span><br><span style="color: hsl(120, 100%, 40%);">+* SPI flash</span><br><span style="color: hsl(120, 100%, 40%);">+* Audio Jack</span><br><span style="color: hsl(120, 100%, 40%);">+* PS2 Keyboard and Mouse</span><br><span style="color: hsl(120, 100%, 40%);">+* Display: HDMI, DP, VGA</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+## Target Audience</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+* OEMs, internal only</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+## Flashing coreboot</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+```eval_rst</span><br><span style="color: hsl(120, 100%, 40%);">++---------------------+------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| Type | Value |</span><br><span style="color: hsl(120, 100%, 40%);">++=====================+============+</span><br><span style="color: hsl(120, 100%, 40%);">+| Socketed flash | no |</span><br><span style="color: hsl(120, 100%, 40%);">++---------------------+------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| Vendor | Winbond |</span><br><span style="color: hsl(120, 100%, 40%);">++---------------------+------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| Model | W25Q128FV |</span><br><span style="color: hsl(120, 100%, 40%);">++---------------------+------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| Size | 16 MiB |</span><br><span style="color: hsl(120, 100%, 40%);">++---------------------+------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| Package | SOIC-8 |</span><br><span style="color: hsl(120, 100%, 40%);">++---------------------+------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| Write protection | No |</span><br><span style="color: hsl(120, 100%, 40%);">++---------------------+------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| Dual BIOS feature | No |</span><br><span style="color: hsl(120, 100%, 40%);">++---------------------+------------+</span><br><span style="color: hsl(120, 100%, 40%);">+```</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+### Instruction to flash coreboot to SPI</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+### Internal programming</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+The SPI flash can be accessed internally using [flashrom].</span><br><span style="color: hsl(120, 100%, 40%);">+The following command is used to flash BIOS region.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+```bash</span><br><span style="color: hsl(120, 100%, 40%);">+$ flashrom -p internal --ifd -i bios -w coreboot.rom --noverify-all</span><br><span style="color: hsl(120, 100%, 40%);">+```</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+### External programming</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+1. Dediprog SF600 with adapter B is used.</span><br><span style="color: hsl(120, 100%, 40%);">+2. Make sure power supply is disconnected from board.</span><br><span style="color: hsl(120, 100%, 40%);">+3. Connect Dediprog SF600 to header at J7H1.</span><br><span style="color: hsl(120, 100%, 40%);">+4. Ensure that "currently working on" is in "application memory chip 1"</span><br><span style="color: hsl(120, 100%, 40%);">+5. Go to "file" and select the .rom file (16 MB) to program chip1.</span><br><span style="color: hsl(120, 100%, 40%);">+6. Execute the batch operation to erase and program the chip.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+## Technology</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+```eval_rst</span><br><span style="color: hsl(120, 100%, 40%);">++------------------+---------------------------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| CPU | Kaby lake H (i7-7820EQ) |</span><br><span style="color: hsl(120, 100%, 40%);">++------------------+---------------------------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| PCH | Skylake PCH-H (called SPT-H) |</span><br><span style="color: hsl(120, 100%, 40%);">++------------------+---------------------------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| Coprocessor | Intel ME |</span><br><span style="color: hsl(120, 100%, 40%);">++------------------+---------------------------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+```</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+[W25Q128FV]: https://www.winbond.com/resource-files/w25q128fv%20rev.m%2005132016%20kms.pdf</span><br><span style="color: hsl(120, 100%, 40%);">+[flashrom]: https://flashrom.org/Flashrom</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/29859">change 29859</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: I01509c2fa2c127b77ae72b8b0aaac0f826b0bedd </div>
<div style="display:none"> Gerrit-Change-Number: 29859 </div>
<div style="display:none"> Gerrit-PatchSet: 4 </div>
<div style="display:none"> Gerrit-Owner: PraveenX Hodagatta Pranesh <praveenx.hodagatta.pranesh@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Boon Tiong Teo <boon.tiong.teo@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> </div>
<div style="display:none"> Gerrit-Reviewer: PraveenX Hodagatta Pranesh <praveenx.hodagatta.pranesh@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Subrata Banik <subrata.banik@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Teo Boon Tiong <boon.tiong.teo@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>
<div style="display:none"> Gerrit-MessageType: merged </div>