<p>Patrick Georgi <strong>merged</strong> this change.</p><p><a href="https://review.coreboot.org/c/coreboot/+/30241">View Change</a></p><div style="white-space:pre-wrap">Approvals:
build bot (Jenkins): Verified
Tristan Corrick: Looks good to me, approved
</div><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/foxconn/g41s-k: Don't reprogram inherited subsystemid<br><br>Change-Id: I85b5aef758a1ed30c46ed0adabec3293edb0f3fd<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>Reviewed-on: https://review.coreboot.org/c/30241<br>Tested-by: build bot (Jenkins) <no-reply@coreboot.org><br>Reviewed-by: Tristan Corrick <tristan@corrick.kiwi><br>---<br>M src/mainboard/foxconn/g41s-k/devicetree.cb<br>1 file changed, 11 insertions(+), 34 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/foxconn/g41s-k/devicetree.cb b/src/mainboard/foxconn/g41s-k/devicetree.cb</span><br><span>index a638457..84cf353 100644</span><br><span>--- a/src/mainboard/foxconn/g41s-k/devicetree.cb</span><br><span>+++ b/src/mainboard/foxconn/g41s-k/devicetree.cb</span><br><span>@@ -27,13 +27,9 @@</span><br><span> end</span><br><span> device domain 0 on # PCI domain</span><br><span> subsystemid 0x105b 0x0dda inherit</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 0.0 on # Host Bridge</span><br><span style="color: hsl(0, 100%, 40%);">- subsystemid 0x105b 0x0dda</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 0.0 on end # Host Bridge</span><br><span> device pci 1.0 on end # PEG</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 2.0 on # Integrated graphics controller</span><br><span style="color: hsl(0, 100%, 40%);">- subsystemid 0x105b 0x0dda</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 2.0 on end # Integrated graphics controller</span><br><span> device pci 2.1 off end # Integrated graphics controller 2</span><br><span> device pci 3.0 off end # ME</span><br><span> device pci 3.1 off end # ME</span><br><span>@@ -55,39 +51,24 @@</span><br><span> register "sata_ahci" = "0x0" # AHCI does not work</span><br><span> register "sata_ports_implemented" = "0x3"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1b.0 on # Audio</span><br><span style="color: hsl(0, 100%, 40%);">- subsystemid 0x105b 0x0dda</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1b.0 on end # Audio</span><br><span> device pci 1c.0 on end # PCIe 1</span><br><span> device pci 1c.1 on # PCIe 2 (NIC)</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 00.0 on # PCI 10ec:8168</span><br><span style="color: hsl(0, 100%, 40%);">- subsystemid 0x105b 0x0dda</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 00.0 on end # PCI 10ec:8168</span><br><span> end</span><br><span> device pci 1c.2 off end # PCIe 3</span><br><span> device pci 1c.3 off end # PCIe 4</span><br><span> device pci 1c.4 off end # PCIe 5</span><br><span> device pci 1c.5 off end # PCIe 6</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1d.0 on # USB</span><br><span style="color: hsl(0, 100%, 40%);">- subsystemid 0x105b 0x0dda</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1d.1 on # USB</span><br><span style="color: hsl(0, 100%, 40%);">- subsystemid 0x105b 0x0dda</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1d.2 on # USB</span><br><span style="color: hsl(0, 100%, 40%);">- subsystemid 0x105b 0x0dda</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1d.3 on # USB</span><br><span style="color: hsl(0, 100%, 40%);">- subsystemid 0x105b 0x0dda</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1d.7 on # USB</span><br><span style="color: hsl(0, 100%, 40%);">- subsystemid 0x105b 0x0dda</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1d.0 on end # USB</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1d.1 on end # USB</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1d.2 on end # USB</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1d.3 on end # USB</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1d.7 on end # USB</span><br><span> device pci 1e.0 on end # PCI bridge</span><br><span> device pci 1e.2 off end # AC'97 Audio</span><br><span> device pci 1e.3 off end # AC'97 Modem</span><br><span> device pci 1f.0 on # ISA bridge</span><br><span style="color: hsl(0, 100%, 40%);">- subsystemid 0x105b 0x0dda</span><br><span> chip superio/ite/it8720f # Super I/O</span><br><span> register "TMPIN1.mode" = "THERMAL_DIODE"</span><br><span> register "TMPIN1.offset" = "0"</span><br><span>@@ -179,12 +160,8 @@</span><br><span> end</span><br><span> end</span><br><span> device pci 1f.1 off end # PATA/IDE</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1f.2 on # SATA</span><br><span style="color: hsl(0, 100%, 40%);">- subsystemid 0x105b 0x0dda</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1f.3 on # SMbus</span><br><span style="color: hsl(0, 100%, 40%);">- subsystemid 0x105b 0x0dda</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1f.2 on end # SATA</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1f.3 on end # SMbus</span><br><span> end</span><br><span> end</span><br><span> end</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/30241">change 30241</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: I85b5aef758a1ed30c46ed0adabec3293edb0f3fd </div>
<div style="display:none"> Gerrit-Change-Number: 30241 </div>
<div style="display:none"> Gerrit-PatchSet: 4 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>
<div style="display:none"> Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz> </div>
<div style="display:none"> Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Tristan Corrick <tristan@corrick.kiwi> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>
<div style="display:none"> Gerrit-CC: Patrick Rudolph <siro@das-labor.org> </div>
<div style="display:none"> Gerrit-MessageType: merged </div>