<p>Patrick Georgi <strong>merged</strong> this change.</p><p><a href="https://review.coreboot.org/c/coreboot/+/30093">View Change</a></p><div style="white-space:pre-wrap">Approvals:
  build bot (Jenkins): Verified
  Duncan Laurie: Looks good to me, approved
  Patrick Rudolph: Looks good to me, approved

</div><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/cannonlake: Declare SATA Mode clear<br><br>FSP support two SATA modes as AHCI mode (0) and RAID mode (1), make it<br>more clear in header file.<br><br>Change-Id: I1edcadc0048df839da145260b60f9f7720d981fe<br>Signed-off-by: Lijian Zhao <lijian.zhao@intel.com><br>Reviewed-on: https://review.coreboot.org/c/30093<br>Reviewed-by: Duncan Laurie <dlaurie@chromium.org><br>Reviewed-by: Patrick Rudolph <siro@das-labor.org><br>Tested-by: build bot (Jenkins) <no-reply@coreboot.org><br>---<br>M src/soc/intel/cannonlake/chip.h<br>1 file changed, 4 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h</span><br><span>index 8eaf02b..962748f 100644</span><br><span>--- a/src/soc/intel/cannonlake/chip.h</span><br><span>+++ b/src/soc/intel/cannonlake/chip.h</span><br><span>@@ -124,7 +124,10 @@</span><br><span>     uint16_t usb3_wake_enable_bitmap;</span><br><span> </span><br><span>        /* SATA related */</span><br><span style="color: hsl(0, 100%, 40%);">-      uint8_t SataMode;</span><br><span style="color: hsl(120, 100%, 40%);">+     enum {</span><br><span style="color: hsl(120, 100%, 40%);">+                Sata_AHCI,</span><br><span style="color: hsl(120, 100%, 40%);">+            Sata_RAID,</span><br><span style="color: hsl(120, 100%, 40%);">+    } SataMode;</span><br><span>  uint8_t SataSalpSupport;</span><br><span>     uint8_t SataPortsEnable[8];</span><br><span>  uint8_t SataPortsDevSlp[8];</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/30093">change 30093</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/c/coreboot/+/30093"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: I1edcadc0048df839da145260b60f9f7720d981fe </div>
<div style="display:none"> Gerrit-Change-Number: 30093 </div>
<div style="display:none"> Gerrit-PatchSet: 6 </div>
<div style="display:none"> Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Duncan Laurie <dlaurie@chromium.org> </div>
<div style="display:none"> Gerrit-Reviewer: Lijian Zhao <lijian.zhao@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>
<div style="display:none"> Gerrit-MessageType: merged </div>