<p>Subrata Banik has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/c/coreboot/+/30123">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/{skl,cnl,icl}: Move cpuid(1) function into soc/intel/common/ code<br><br>This patch replaces all cpuid(1) references from soc/intel/{skl,cnl,icl}<br>with intel cpu common code library functions.<br><br>1. cpu_get_cpuid() -> to get processor id (from cpuid.eax)<br>2. cpu_get_feature_flag -> to get processor feature flag (from cpuid.ecx)<br><br>Change-Id: Ib96a7c79dadb1feff0b8d58aa408b355fbb3bc50<br>Signed-off-by: Subrata Banik <subrata.banik@intel.com><br>---<br>M src/soc/intel/cannonlake/bootblock/report_platform.c<br>M src/soc/intel/cannonlake/cpu.c<br>M src/soc/intel/common/block/cpu/cpulib.c<br>M src/soc/intel/common/block/include/intelblocks/cpulib.h<br>M src/soc/intel/common/block/vmx/vmx.c<br>M src/soc/intel/icelake/bootblock/report_platform.c<br>M src/soc/intel/icelake/cpu.c<br>M src/soc/intel/skylake/bootblock/report_platform.c<br>M src/soc/intel/skylake/cpu.c<br>9 files changed, 77 insertions(+), 32 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/30123/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c</span><br><span>index 17bcce9..54de85d 100644</span><br><span>--- a/src/soc/intel/cannonlake/bootblock/report_platform.c</span><br><span>+++ b/src/soc/intel/cannonlake/bootblock/report_platform.c</span><br><span>@@ -20,6 +20,7 @@</span><br><span> #include <cpu/x86/msr.h></span><br><span> #include <device/pci.h></span><br><span> #include <device/pci_ids.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <intelblocks/cpulib.h></span><br><span> #include <intelblocks/mp_init.h></span><br><span> #include <soc/bootblock.h></span><br><span> #include <soc/pch.h></span><br><span>@@ -96,7 +97,7 @@</span><br><span> static void report_cpu_info(void)</span><br><span> {</span><br><span> struct cpuid_result cpuidr;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 i, index;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 i, index, cpu_id, cpu_feature_flag;</span><br><span> char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */</span><br><span> int vt, txt, aes;</span><br><span> msr_t microcode_ver;</span><br><span>@@ -128,12 +129,12 @@</span><br><span> microcode_ver.lo = 0;</span><br><span> microcode_ver.hi = 0;</span><br><span> wrmsr(BIOS_SIGN_ID, microcode_ver);</span><br><span style="color: hsl(0, 100%, 40%);">- cpuidr = cpuid(1);</span><br><span style="color: hsl(120, 100%, 40%);">+ cpu_id = cpu_get_cpuid();</span><br><span> microcode_ver = rdmsr(BIOS_SIGN_ID);</span><br><span> </span><br><span> /* Look for string to match the name */</span><br><span> for (i = 0; i < ARRAY_SIZE(cpu_table); i++) {</span><br><span style="color: hsl(0, 100%, 40%);">- if (cpu_table[i].cpuid == cpuidr.eax) {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (cpu_table[i].cpuid == cpu_id) {</span><br><span> cpu_type = cpu_table[i].name;</span><br><span> break;</span><br><span> }</span><br><span>@@ -141,11 +142,12 @@</span><br><span> </span><br><span> printk(BIOS_DEBUG, "CPU: %s\n", cpu_name);</span><br><span> printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n",</span><br><span style="color: hsl(0, 100%, 40%);">- cpuidr.eax, cpu_type, microcode_ver.hi);</span><br><span style="color: hsl(120, 100%, 40%);">+ cpu_id, cpu_type, microcode_ver.hi);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- aes = (cpuidr.ecx & (1 << 25)) ? 1 : 0;</span><br><span style="color: hsl(0, 100%, 40%);">- txt = (cpuidr.ecx & (1 << 6)) ? 1 : 0;</span><br><span style="color: hsl(0, 100%, 40%);">- vt = (cpuidr.ecx & (1 << 5)) ? 1 : 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ cpu_feature_flag = cpu_get_feature_flag();</span><br><span style="color: hsl(120, 100%, 40%);">+ aes = (cpu_feature_flag & (1 << 25)) ? 1 : 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ txt = (cpu_feature_flag & (1 << 6)) ? 1 : 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ vt = (cpu_feature_flag & (1 << 5)) ? 1 : 0;</span><br><span> printk(BIOS_DEBUG,</span><br><span> "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n",</span><br><span> mode[aes], mode[txt], mode[vt]);</span><br><span>diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c</span><br><span>index ccd1dea..d651985 100644</span><br><span>--- a/src/soc/intel/cannonlake/cpu.c</span><br><span>+++ b/src/soc/intel/cannonlake/cpu.c</span><br><span>@@ -104,12 +104,12 @@</span><br><span> </span><br><span> static void configure_dca_cap(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- struct cpuid_result cpuid_regs;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t feature_flag;</span><br><span> msr_t msr;</span><br><span> </span><br><span> /* Check feature flag in CPUID.(EAX=1):ECX[18]==1 */</span><br><span style="color: hsl(0, 100%, 40%);">- cpuid_regs = cpuid(1);</span><br><span style="color: hsl(0, 100%, 40%);">- if (cpuid_regs.ecx & (1 << 18)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ feature_flag = cpu_get_feature_flag();</span><br><span style="color: hsl(120, 100%, 40%);">+ if (feature_flag & (1 << 18)) {</span><br><span> msr = rdmsr(IA32_PLATFORM_DCA_CAP);</span><br><span> msr.lo |= 1;</span><br><span> wrmsr(IA32_PLATFORM_DCA_CAP, msr);</span><br><span>diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c</span><br><span>index d18b50c..af7e7aa 100644</span><br><span>--- a/src/soc/intel/common/block/cpu/cpulib.c</span><br><span>+++ b/src/soc/intel/common/block/cpu/cpulib.c</span><br><span>@@ -335,3 +335,29 @@</span><br><span> (msr_t) {.lo = 0xffffffff, .hi = 0xffffffff});</span><br><span> }</span><br><span> }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Get processor id using cpuid eax=1</span><br><span style="color: hsl(120, 100%, 40%);">+ * return value will be in EAX register</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+uint32_t cpu_get_cpuid(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct cpuid_result cpuidr;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ cpuidr = cpuid(1);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return cpuidr.eax;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Get processor feature flag using cpuid eax=1</span><br><span style="color: hsl(120, 100%, 40%);">+ * return value will be in ECX register</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+uint32_t cpu_get_feature_flag(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct cpuid_result cpuidr;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ cpuidr = cpuid(1);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return cpuidr.ecx;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h</span><br><span>index 5cea96e..51d499e 100644</span><br><span>--- a/src/soc/intel/common/block/include/intelblocks/cpulib.h</span><br><span>+++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h</span><br><span>@@ -167,4 +167,16 @@</span><br><span> /* Configure Machine Check Architecture support */</span><br><span> void mca_configure(void *unused);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Get processor id using cpuid eax=1</span><br><span style="color: hsl(120, 100%, 40%);">+ * return value will be in EAX register</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+uint32_t cpu_get_cpuid(void);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Get processor feature flag using cpuid eax=1</span><br><span style="color: hsl(120, 100%, 40%);">+ * return value will be in ECX register</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+uint32_t cpu_get_feature_flag(void);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #endif /* SOC_INTEL_COMMON_BLOCK_CPULIB_H */</span><br><span>diff --git a/src/soc/intel/common/block/vmx/vmx.c b/src/soc/intel/common/block/vmx/vmx.c</span><br><span>index 2cffdab..4ef9359 100644</span><br><span>--- a/src/soc/intel/common/block/vmx/vmx.c</span><br><span>+++ b/src/soc/intel/common/block/vmx/vmx.c</span><br><span>@@ -13,6 +13,7 @@</span><br><span> </span><br><span> #include <console/console.h></span><br><span> #include <cpu/x86/msr.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <intelblocks/cpulib.h></span><br><span> #include <intelblocks/msr.h></span><br><span> #include <intelblocks/vmx.h></span><br><span> #include <soc/cpu.h></span><br><span>@@ -46,11 +47,11 @@</span><br><span> void vmx_configure(void *unused)</span><br><span> {</span><br><span> msr_t msr;</span><br><span style="color: hsl(0, 100%, 40%);">- struct cpuid_result regs;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t feature_flag;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- regs = cpuid(1);</span><br><span style="color: hsl(120, 100%, 40%);">+ feature_flag = cpu_get_feature_flag();</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- if (!soc_vmx_enabled() || !(regs.ecx & CPUID_VMX)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (!soc_vmx_enabled() || !(feature_flag & CPUID_VMX)) {</span><br><span> printk(BIOS_ERR, "VMX: pre-conditions not met\n");</span><br><span> return;</span><br><span> }</span><br><span>diff --git a/src/soc/intel/icelake/bootblock/report_platform.c b/src/soc/intel/icelake/bootblock/report_platform.c</span><br><span>index a5dcd77..07a45c1 100644</span><br><span>--- a/src/soc/intel/icelake/bootblock/report_platform.c</span><br><span>+++ b/src/soc/intel/icelake/bootblock/report_platform.c</span><br><span>@@ -19,6 +19,7 @@</span><br><span> #include <cpu/x86/msr.h></span><br><span> #include <device/pci.h></span><br><span> #include <device/pci_ids.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <intelblocks/cpulib.h></span><br><span> #include <intelblocks/mp_init.h></span><br><span> #include <soc/bootblock.h></span><br><span> #include <soc/pch.h></span><br><span>@@ -92,7 +93,7 @@</span><br><span> static void report_cpu_info(void)</span><br><span> {</span><br><span> struct cpuid_result cpuidr;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 i, index;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 i, index, cpu_id, cpu_feature_flag;</span><br><span> char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */</span><br><span> int vt, txt, aes;</span><br><span> msr_t microcode_ver;</span><br><span>@@ -124,12 +125,12 @@</span><br><span> microcode_ver.lo = 0;</span><br><span> microcode_ver.hi = 0;</span><br><span> wrmsr(BIOS_SIGN_ID, microcode_ver);</span><br><span style="color: hsl(0, 100%, 40%);">- cpuidr = cpuid(1);</span><br><span style="color: hsl(120, 100%, 40%);">+ cpu_id = cpu_get_cpuid();</span><br><span> microcode_ver = rdmsr(BIOS_SIGN_ID);</span><br><span> </span><br><span> /* Look for string to match the name */</span><br><span> for (i = 0; i < ARRAY_SIZE(cpu_table); i++) {</span><br><span style="color: hsl(0, 100%, 40%);">- if (cpu_table[i].cpuid == cpuidr.eax) {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (cpu_table[i].cpuid == cpu_id) {</span><br><span> cpu_type = cpu_table[i].name;</span><br><span> break;</span><br><span> }</span><br><span>@@ -137,11 +138,12 @@</span><br><span> </span><br><span> printk(BIOS_DEBUG, "CPU: %s\n", cpu_name);</span><br><span> printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n",</span><br><span style="color: hsl(0, 100%, 40%);">- cpuidr.eax, cpu_type, microcode_ver.hi);</span><br><span style="color: hsl(120, 100%, 40%);">+ cpu_id, cpu_type, microcode_ver.hi);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- aes = (cpuidr.ecx & (1 << 25)) ? 1 : 0;</span><br><span style="color: hsl(0, 100%, 40%);">- txt = (cpuidr.ecx & (1 << 6)) ? 1 : 0;</span><br><span style="color: hsl(0, 100%, 40%);">- vt = (cpuidr.ecx & (1 << 5)) ? 1 : 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ cpu_feature_flag = cpu_get_feature_flag();</span><br><span style="color: hsl(120, 100%, 40%);">+ aes = (cpu_feature_flag & (1 << 25)) ? 1 : 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ txt = (cpu_feature_flag & (1 << 6)) ? 1 : 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ vt = (cpu_feature_flag & (1 << 5)) ? 1 : 0;</span><br><span> printk(BIOS_DEBUG,</span><br><span> "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n",</span><br><span> mode[aes], mode[txt], mode[vt]);</span><br><span>diff --git a/src/soc/intel/icelake/cpu.c b/src/soc/intel/icelake/cpu.c</span><br><span>index bfe9f7be..26b5414 100644</span><br><span>--- a/src/soc/intel/icelake/cpu.c</span><br><span>+++ b/src/soc/intel/icelake/cpu.c</span><br><span>@@ -105,12 +105,12 @@</span><br><span> </span><br><span> static void configure_dca_cap(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- struct cpuid_result cpuid_regs;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t feature_flag;</span><br><span> msr_t msr;</span><br><span> </span><br><span> /* Check feature flag in CPUID.(EAX=1):ECX[18]==1 */</span><br><span style="color: hsl(0, 100%, 40%);">- cpuid_regs = cpuid(1);</span><br><span style="color: hsl(0, 100%, 40%);">- if (cpuid_regs.ecx & (1 << 18)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ feature_flag = cpu_get_feature_flag();</span><br><span style="color: hsl(120, 100%, 40%);">+ if (feature_flag & (1 << 18)) {</span><br><span> msr = rdmsr(IA32_PLATFORM_DCA_CAP);</span><br><span> msr.lo |= 1;</span><br><span> wrmsr(IA32_PLATFORM_DCA_CAP, msr);</span><br><span>diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c</span><br><span>index 7dbd371..5b34a16 100644</span><br><span>--- a/src/soc/intel/skylake/bootblock/report_platform.c</span><br><span>+++ b/src/soc/intel/skylake/bootblock/report_platform.c</span><br><span>@@ -20,6 +20,7 @@</span><br><span> #include <cpu/x86/msr.h></span><br><span> #include <device/pci.h></span><br><span> #include <device/pci_ids.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <intelblocks/cpulib.h></span><br><span> #include <intelblocks/mp_init.h></span><br><span> #include <soc/bootblock.h></span><br><span> #include <soc/cpu.h></span><br><span>@@ -121,7 +122,7 @@</span><br><span> static void report_cpu_info(void)</span><br><span> {</span><br><span> struct cpuid_result cpuidr;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 i, index;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 i, index, cpu_id, cpu_feature_flag;</span><br><span> char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */</span><br><span> int vt, txt, aes;</span><br><span> msr_t microcode_ver;</span><br><span>@@ -149,12 +150,12 @@</span><br><span> microcode_ver.lo = 0;</span><br><span> microcode_ver.hi = 0;</span><br><span> wrmsr(IA32_BIOS_SIGN_ID, microcode_ver);</span><br><span style="color: hsl(0, 100%, 40%);">- cpuidr = cpuid(1);</span><br><span style="color: hsl(120, 100%, 40%);">+ cpu_id = cpu_get_cpuid();</span><br><span> microcode_ver = rdmsr(IA32_BIOS_SIGN_ID);</span><br><span> </span><br><span> /* Look for string to match the name */</span><br><span> for (i = 0; i < ARRAY_SIZE(cpu_table); i++) {</span><br><span style="color: hsl(0, 100%, 40%);">- if (cpu_table[i].cpuid == cpuidr.eax) {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (cpu_table[i].cpuid == cpu_id) {</span><br><span> cpu_type = cpu_table[i].name;</span><br><span> break;</span><br><span> }</span><br><span>@@ -164,9 +165,10 @@</span><br><span> printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n",</span><br><span> cpuidr.eax, cpu_type, microcode_ver.hi);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- aes = (cpuidr.ecx & (1 << 25)) ? 1 : 0;</span><br><span style="color: hsl(0, 100%, 40%);">- txt = (cpuidr.ecx & (1 << 6)) ? 1 : 0;</span><br><span style="color: hsl(0, 100%, 40%);">- vt = (cpuidr.ecx & (1 << 5)) ? 1 : 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ cpu_feature_flag = cpu_get_feature_flag();</span><br><span style="color: hsl(120, 100%, 40%);">+ aes = (cpu_feature_flag & (1 << 25)) ? 1 : 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ txt = (cpu_feature_flag & (1 << 6)) ? 1 : 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ vt = (cpu_feature_flag & (1 << 5)) ? 1 : 0;</span><br><span> printk(BIOS_DEBUG,</span><br><span> "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n",</span><br><span> mode[aes], mode[txt], mode[vt]);</span><br><span>diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c</span><br><span>index 9e4bbe8..2a9a446 100644</span><br><span>--- a/src/soc/intel/skylake/cpu.c</span><br><span>+++ b/src/soc/intel/skylake/cpu.c</span><br><span>@@ -333,12 +333,12 @@</span><br><span> </span><br><span> static void configure_dca_cap(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- struct cpuid_result cpuid_regs;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t feature_flag;</span><br><span> msr_t msr;</span><br><span> </span><br><span> /* Check feature flag in CPUID.(EAX=1):ECX[18]==1 */</span><br><span style="color: hsl(0, 100%, 40%);">- cpuid_regs = cpuid(1);</span><br><span style="color: hsl(0, 100%, 40%);">- if (cpuid_regs.ecx & (1 << 18)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ feature_flag = cpu_get_feature_flag();</span><br><span style="color: hsl(120, 100%, 40%);">+ if (feature_flag & (1 << 18)) {</span><br><span> msr = rdmsr(IA32_PLATFORM_DCA_CAP);</span><br><span> msr.lo |= 1;</span><br><span> wrmsr(IA32_PLATFORM_DCA_CAP, msr);</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/30123">change 30123</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/c/coreboot/+/30123"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: Ib96a7c79dadb1feff0b8d58aa408b355fbb3bc50 </div>
<div style="display:none"> Gerrit-Change-Number: 30123 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Subrata Banik <subrata.banik@intel.com> </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>