<p>Lijian Zhao has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/c/coreboot/+/30097">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/cannonlake: Auto turn on HDA controller<br><br>Update HDAenable bit in Fsp memory init UPD data base on devicetree<br>settings.<br><br>BUG=N/A<br>TEST=N/A<br><br>Change-Id: I5159c00a855a2a9516714ccee8ee9933465c5063<br>Signed-off-by: Lijian Zhao <lijian.zhao@intel.com><br>---<br>M src/soc/intel/cannonlake/chip.h<br>M src/soc/intel/cannonlake/romstage/fsp_params.c<br>2 files changed, 8 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/30097/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h</span><br><span>index 9eb91bd..f148c37 100644</span><br><span>--- a/src/soc/intel/cannonlake/chip.h</span><br><span>+++ b/src/soc/intel/cannonlake/chip.h</span><br><span>@@ -130,7 +130,6 @@</span><br><span>        uint8_t SataPortsDevSlp[8];</span><br><span> </span><br><span>      /* Audio related */</span><br><span style="color: hsl(0, 100%, 40%);">-     uint8_t PchHdaEnable;</span><br><span>        uint8_t PchHdaDspEnable;</span><br><span> </span><br><span>         /* Enable/Disable HD Audio Link. Muxed with SSP0/SSP1/SNDW1 */</span><br><span>diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c</span><br><span>index 8f6fa2f..d188a96 100644</span><br><span>--- a/src/soc/intel/cannonlake/romstage/fsp_params.c</span><br><span>+++ b/src/soc/intel/cannonlake/romstage/fsp_params.c</span><br><span>@@ -61,6 +61,14 @@</span><br><span>             m_cfg->PchIshEnable = 0;</span><br><span>  else</span><br><span>                 m_cfg->PchIshEnable = dev->enabled;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+   /* If HDA is enabled, enable HDA elements */</span><br><span style="color: hsl(120, 100%, 40%);">+  dev = dev_find_slot(0, PCH_DEVFN_HDA);</span><br><span style="color: hsl(120, 100%, 40%);">+        if (!dev)</span><br><span style="color: hsl(120, 100%, 40%);">+             m_cfg->PchHdaEnable = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+   else</span><br><span style="color: hsl(120, 100%, 40%);">+          m_cfg->PchHdaEnable = dev->enabled;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> }</span><br><span> </span><br><span> void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/30097">change 30097</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/c/coreboot/+/30097"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: I5159c00a855a2a9516714ccee8ee9933465c5063 </div>
<div style="display:none"> Gerrit-Change-Number: 30097 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com> </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>