<p>Patrick Georgi <strong>merged</strong> this change.</p><p><a href="https://review.coreboot.org/c/coreboot/+/29872">View Change</a></p><div style="white-space:pre-wrap">Approvals:
build bot (Jenkins): Verified
Furquan Shaikh: Looks good to me, approved
Ren Kuo: Looks good to me, but someone else must approve
</div><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/poppy/variant/nami: Move FPMCU_INT_L gpios to B group<br><br>We discovered that the gpios previously used for FPMCU_INT_L were in<br>two different groups with two different voltages (C group was at 3.3V<br>and D group was at 1.8V). Moving both to B group which is at 3.3V.<br><br>BUG=b:119447525<br>BRANCH=Nami<br>TEST=unlock OS with fingerprint<br> register fingerprint<br> run powerd_dbus_suspend and see if it goes int s0ix<br><br>Change-Id: I2332b0eb7a2f74e8178b95a23c8ac2091027a071<br>Signed-off-by: Shelley Chen <shchen@google.com><br>Reviewed-on: https://review.coreboot.org/c/29872<br>Tested-by: build bot (Jenkins) <no-reply@coreboot.org><br>Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com><br>Reviewed-by: Furquan Shaikh <furquan@google.com><br>---<br>M src/mainboard/google/poppy/variants/nami/devicetree.cb<br>M src/mainboard/google/poppy/variants/nami/gpio.c<br>2 files changed, 6 insertions(+), 6 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb</span><br><span>index edf7ed6..d4e5d2f 100644</span><br><span>--- a/src/mainboard/google/poppy/variants/nami/devicetree.cb</span><br><span>+++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb</span><br><span>@@ -469,8 +469,8 @@</span><br><span> register "hid" = "ACPI_DT_NAMESPACE_HID"</span><br><span> register "uid" = "1"</span><br><span> register "compat_string" = ""google,cros-ec-spi""</span><br><span style="color: hsl(0, 100%, 40%);">- register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C8_IRQ)"</span><br><span style="color: hsl(0, 100%, 40%);">- register "wake" = "GPE0_DW1_06" # GPP_D6</span><br><span style="color: hsl(120, 100%, 40%);">+ register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B0_IRQ)"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "wake" = "GPE0_DW0_01" # GPP_B1</span><br><span> device spi 0 on end</span><br><span> end # FPMCU</span><br><span> end # GSPI #1</span><br><span>diff --git a/src/mainboard/google/poppy/variants/nami/gpio.c b/src/mainboard/google/poppy/variants/nami/gpio.c</span><br><span>index 2c9b932..a1a0f92 100644</span><br><span>--- a/src/mainboard/google/poppy/variants/nami/gpio.c</span><br><span>+++ b/src/mainboard/google/poppy/variants/nami/gpio.c</span><br><span>@@ -409,6 +409,10 @@</span><br><span> };</span><br><span> </span><br><span> static const struct pad_config fpmcu_gpio_table[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* B0 : CORE_VID0 ==> FPMCU_INT_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC(GPP_B0, NONE, DEEP),</span><br><span style="color: hsl(120, 100%, 40%);">+ /* B1 : CORE_VID1 ==> FPMCU_INT_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_ACPI_SCI(GPP_B1, 20K_PU, DEEP, INVERT),</span><br><span> /* B11 : EXT_PWR_GATE# ==> PCH_FP_PWR_EN */</span><br><span> PAD_CFG_GPO(GPP_B11, 1, DEEP),</span><br><span> /* B19 : GSPI1_CS# ==> PCH_SPI_FP_CS# */</span><br><span>@@ -421,14 +425,10 @@</span><br><span> PAD_CFG_NF(GPP_B22, NONE, DEEP, NF1),</span><br><span> /* C3 : SML0CLK ==> TOUCHSCREEN_DIS# */</span><br><span> PAD_CFG_GPO(GPP_C3, 0, DEEP),</span><br><span style="color: hsl(0, 100%, 40%);">- /* C8 : UART0_RXD ==> FPMCU_INT_L */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC(GPP_C8, NONE, DEEP),</span><br><span> /* C9 : UART0_TXD ==> FP_RST_ODL */</span><br><span> PAD_CFG_GPO(GPP_C9, 1, DEEP),</span><br><span> /* D5 : ISH_I2C0_SDA ==> FPMCU_BOOT0 */</span><br><span> PAD_CFG_GPO(GPP_D5, 0, DEEP),</span><br><span style="color: hsl(0, 100%, 40%);">- /* D6 : ISH_I2C0_SCL ==> FPMCU_INT_L */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_ACPI_SCI(GPP_D6, 20K_PU, DEEP, INVERT),</span><br><span> /* D17 : DMIC_CLK1 ==> NC */</span><br><span> PAD_CFG_NC(GPP_D17),</span><br><span> };</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/29872">change 29872</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/c/coreboot/+/29872"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: I2332b0eb7a2f74e8178b95a23c8ac2091027a071 </div>
<div style="display:none"> Gerrit-Change-Number: 29872 </div>
<div style="display:none"> Gerrit-PatchSet: 3 </div>
<div style="display:none"> Gerrit-Owner: Shelley Chen <shchen@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Furquan Shaikh <furquan@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Shelley Chen <shchen@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>
<div style="display:none"> Gerrit-MessageType: merged </div>