<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/c/coreboot/+/30019">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sb/intel/common/smi.c: Remove unused functions<br><br>Since all targets using sb/intel/common and cpu/intel/smm/gen1<br>are now using PARALLEL_MP some code is not used anymore.<br><br>Change-Id: Ibdc2bb0f1412366b945813efbc1b6451d27f376f<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/cpu/intel/smm/gen1/smi.h<br>M src/cpu/intel/smm/gen1/smmrelocate.c<br>M src/southbridge/intel/common/smi.c<br>3 files changed, 0 insertions(+), 204 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/30019/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/cpu/intel/smm/gen1/smi.h b/src/cpu/intel/smm/gen1/smi.h</span><br><span>index d6a6f88..ec62458 100644</span><br><span>--- a/src/cpu/intel/smm/gen1/smi.h</span><br><span>+++ b/src/cpu/intel/smm/gen1/smi.h</span><br><span>@@ -17,11 +17,8 @@</span><br><span> </span><br><span> /* These helpers are for performing SMM relocation. */</span><br><span> void southbridge_smm_init(void);</span><br><span style="color: hsl(0, 100%, 40%);">-void southbridge_trigger_smi(void);</span><br><span style="color: hsl(0, 100%, 40%);">-void southbridge_clear_smi_status(void);</span><br><span> u32 northbridge_get_tseg_base(void);</span><br><span> u32 northbridge_get_tseg_size(void);</span><br><span style="color: hsl(0, 100%, 40%);">-int cpu_get_apic_id_map(int *apic_id_map);</span><br><span> void northbridge_write_smram(u8 smram);</span><br><span> void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,</span><br><span> size_t *smm_save_state_size);</span><br><span>diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c</span><br><span>index f2035f2..fa038a3 100644</span><br><span>--- a/src/cpu/intel/smm/gen1/smmrelocate.c</span><br><span>+++ b/src/cpu/intel/smm/gen1/smmrelocate.c</span><br><span>@@ -86,60 +86,6 @@</span><br><span> }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-/* The relocation work is actually performed in SMM context, but the code</span><br><span style="color: hsl(0, 100%, 40%);">- * resides in the ramstage module. This occurs by trampolining from the default</span><br><span style="color: hsl(0, 100%, 40%);">- * SMRAM entry point to here. */</span><br><span style="color: hsl(0, 100%, 40%);">-static void asmlinkage cpu_smm_do_relocation(void *arg)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- em64t101_smm_state_save_area_t *save_state;</span><br><span style="color: hsl(0, 100%, 40%);">- msr_t mtrr_cap;</span><br><span style="color: hsl(0, 100%, 40%);">- struct smm_relocation_params *relo_params;</span><br><span style="color: hsl(0, 100%, 40%);">- const struct smm_module_params *p;</span><br><span style="color: hsl(0, 100%, 40%);">- const struct smm_runtime *runtime;</span><br><span style="color: hsl(0, 100%, 40%);">- int cpu;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- p = arg;</span><br><span style="color: hsl(0, 100%, 40%);">- runtime = p->runtime;</span><br><span style="color: hsl(0, 100%, 40%);">- relo_params = p->arg;</span><br><span style="color: hsl(0, 100%, 40%);">- cpu = p->cpu;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (cpu >= CONFIG_MAX_CPUS) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_CRIT,</span><br><span style="color: hsl(0, 100%, 40%);">- "Invalid CPU number assigned in SMM stub: %d\n", cpu);</span><br><span style="color: hsl(0, 100%, 40%);">- return;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "In relocation handler: cpu %d\n", cpu);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* All threads need to set IEDBASE and SMBASE in the save state area.</span><br><span style="color: hsl(0, 100%, 40%);">- * Since one thread runs at a time during the relocation the save state</span><br><span style="color: hsl(0, 100%, 40%);">- * is the same for all cpus. */</span><br><span style="color: hsl(0, 100%, 40%);">- save_state = (void *)(runtime->smbase + SMM_DEFAULT_SIZE -</span><br><span style="color: hsl(0, 100%, 40%);">- runtime->save_state_size);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* The relocated handler runs with all CPUs concurrently. Therefore</span><br><span style="color: hsl(0, 100%, 40%);">- * stagger the entry points adjusting SMBASE downwards by save state</span><br><span style="color: hsl(0, 100%, 40%);">- * size * CPU num. */</span><br><span style="color: hsl(0, 100%, 40%);">- save_state->smbase = relo_params->smram_base -</span><br><span style="color: hsl(0, 100%, 40%);">- cpu * runtime->save_state_size;</span><br><span style="color: hsl(0, 100%, 40%);">- if (CONFIG_IED_REGION_SIZE != 0) {</span><br><span style="color: hsl(0, 100%, 40%);">- save_state->iedbase = relo_params->ied_base;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "New SMBASE=0x%08x IEDBASE=0x%08x @ %p\n",</span><br><span style="color: hsl(0, 100%, 40%);">- save_state->smbase, save_state->iedbase, save_state);</span><br><span style="color: hsl(0, 100%, 40%);">- } else {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "New SMBASE=0x%08x @ %p\n",</span><br><span style="color: hsl(0, 100%, 40%);">- save_state->smbase, save_state);</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Write SMRR MSRs based on indicated support. */</span><br><span style="color: hsl(0, 100%, 40%);">- mtrr_cap = rdmsr(MTRR_CAP_MSR);</span><br><span style="color: hsl(0, 100%, 40%);">- if (mtrr_cap.lo & SMRR_SUPPORTED)</span><br><span style="color: hsl(0, 100%, 40%);">- write_smrr(relo_params);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- southbridge_clear_smi_status();</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> static void fill_in_relocation_params(struct smm_relocation_params *params)</span><br><span> {</span><br><span> /* All range registers are aligned to 4KiB */</span><br><span>@@ -188,33 +134,6 @@</span><br><span> }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int install_relocation_handler(int *apic_id_map, int num_cpus,</span><br><span style="color: hsl(0, 100%, 40%);">- struct smm_relocation_params *relo_params)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- /* The default SMM entry happens serially at the default location.</span><br><span style="color: hsl(0, 100%, 40%);">- * Therefore, there is only 1 concurrent save state area. Set the</span><br><span style="color: hsl(0, 100%, 40%);">- * stack size to the save state size, and call into the</span><br><span style="color: hsl(0, 100%, 40%);">- * do_relocation handler. */</span><br><span style="color: hsl(0, 100%, 40%);">- int save_state_size = sizeof(em64t101_smm_state_save_area_t);</span><br><span style="color: hsl(0, 100%, 40%);">- struct smm_loader_params smm_params = {</span><br><span style="color: hsl(0, 100%, 40%);">- .per_cpu_stack_size = save_state_size,</span><br><span style="color: hsl(0, 100%, 40%);">- .num_concurrent_stacks = num_cpus,</span><br><span style="color: hsl(0, 100%, 40%);">- .per_cpu_save_state_size = save_state_size,</span><br><span style="color: hsl(0, 100%, 40%);">- .num_concurrent_save_states = 1,</span><br><span style="color: hsl(0, 100%, 40%);">- .handler = &cpu_smm_do_relocation,</span><br><span style="color: hsl(0, 100%, 40%);">- .handler_arg = (void *)relo_params,</span><br><span style="color: hsl(0, 100%, 40%);">- };</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- default_smm_area = backup_default_smm_area();</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (smm_setup_relocation_handler(&smm_params))</span><br><span style="color: hsl(0, 100%, 40%);">- return -1;</span><br><span style="color: hsl(0, 100%, 40%);">- int i;</span><br><span style="color: hsl(0, 100%, 40%);">- for (i = 0; i < num_cpus; i++)</span><br><span style="color: hsl(0, 100%, 40%);">- smm_params.runtime->apic_id_to_cpu[i] = apic_id_map[i];</span><br><span style="color: hsl(0, 100%, 40%);">- return 0;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> static void setup_ied_area(struct smm_relocation_params *params)</span><br><span> {</span><br><span> char *ied_base;</span><br><span>@@ -234,94 +153,6 @@</span><br><span> memset(ied_base + (1 << 20), 0, (32 << 10));</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int install_permanent_handler(int *apic_id_map, int num_cpus,</span><br><span style="color: hsl(0, 100%, 40%);">- struct smm_relocation_params *relo_params)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- /* There are num_cpus concurrent stacks and num_cpus concurrent save</span><br><span style="color: hsl(0, 100%, 40%);">- * state areas. Lastly, set the stack size to the save state size. */</span><br><span style="color: hsl(0, 100%, 40%);">- int save_state_size = sizeof(em64t101_smm_state_save_area_t);</span><br><span style="color: hsl(0, 100%, 40%);">- struct smm_loader_params smm_params = {</span><br><span style="color: hsl(0, 100%, 40%);">- .per_cpu_stack_size = save_state_size,</span><br><span style="color: hsl(0, 100%, 40%);">- .num_concurrent_stacks = num_cpus,</span><br><span style="color: hsl(0, 100%, 40%);">- .per_cpu_save_state_size = save_state_size,</span><br><span style="color: hsl(0, 100%, 40%);">- .num_concurrent_save_states = num_cpus,</span><br><span style="color: hsl(0, 100%, 40%);">- };</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "Installing SMM handler to 0x%08x\n",</span><br><span style="color: hsl(0, 100%, 40%);">- relo_params->smram_base);</span><br><span style="color: hsl(0, 100%, 40%);">- if (smm_load_module((void *)relo_params->smram_base,</span><br><span style="color: hsl(0, 100%, 40%);">- relo_params->smram_size, &smm_params))</span><br><span style="color: hsl(0, 100%, 40%);">- return -1;</span><br><span style="color: hsl(0, 100%, 40%);">- int i;</span><br><span style="color: hsl(0, 100%, 40%);">- for (i = 0; i < num_cpus; i++)</span><br><span style="color: hsl(0, 100%, 40%);">- smm_params.runtime->apic_id_to_cpu[i] = apic_id_map[i];</span><br><span style="color: hsl(0, 100%, 40%);">- return 0;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static int cpu_smm_setup(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- int num_cpus;</span><br><span style="color: hsl(0, 100%, 40%);">- int apic_id_map[CONFIG_MAX_CPUS];</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "Setting up SMI for CPU\n");</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- fill_in_relocation_params(&smm_reloc_params);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* enable the SMM memory window */</span><br><span style="color: hsl(0, 100%, 40%);">- northbridge_write_smram(D_OPEN | G_SMRAME | C_BASE_SEG);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (CONFIG_IED_REGION_SIZE != 0)</span><br><span style="color: hsl(0, 100%, 40%);">- setup_ied_area(&smm_reloc_params);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- num_cpus = cpu_get_apic_id_map(apic_id_map);</span><br><span style="color: hsl(0, 100%, 40%);">- if (num_cpus > CONFIG_MAX_CPUS) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_CRIT,</span><br><span style="color: hsl(0, 100%, 40%);">- "Error: Hardware CPUs (%d) > MAX_CPUS (%d)\n",</span><br><span style="color: hsl(0, 100%, 40%);">- num_cpus, CONFIG_MAX_CPUS);</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (install_relocation_handler(apic_id_map, num_cpus,</span><br><span style="color: hsl(0, 100%, 40%);">- &smm_reloc_params)) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_CRIT, "SMM Relocation handler install failed.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- return -1;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (install_permanent_handler(apic_id_map, num_cpus,</span><br><span style="color: hsl(0, 100%, 40%);">- &smm_reloc_params)) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_CRIT, "SMM Permanent handler install failed.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- return -1;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Ensure the SMM handlers hit DRAM before performing first SMI. */</span><br><span style="color: hsl(0, 100%, 40%);">- /* TODO(adurbin): Is this really needed? */</span><br><span style="color: hsl(0, 100%, 40%);">- wbinvd();</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* close the SMM memory window and enable normal SMM */</span><br><span style="color: hsl(0, 100%, 40%);">- northbridge_write_smram(G_SMRAME | C_BASE_SEG);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return 0;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void smm_init(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- /* Return early if CPU SMM setup failed. */</span><br><span style="color: hsl(0, 100%, 40%);">- if (cpu_smm_setup())</span><br><span style="color: hsl(0, 100%, 40%);">- return;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- southbridge_smm_init();</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Initiate first SMI to kick off SMM-context relocation. Note: this</span><br><span style="color: hsl(0, 100%, 40%);">- * SMI being triggered here queues up an SMI in the APs which are in</span><br><span style="color: hsl(0, 100%, 40%);">- * wait-for-SIPI state. Once an AP gets an SIPI it will service the SMI</span><br><span style="color: hsl(0, 100%, 40%);">- * at the SMM_DEFAULT_BASE before jumping to startup vector. */</span><br><span style="color: hsl(0, 100%, 40%);">- southbridge_trigger_smi();</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "Relocation complete.\n");</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Lock down the SMRAM space. */</span><br><span style="color: hsl(0, 100%, 40%);">- smm_lock();</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> void smm_init_completion(void)</span><br><span> {</span><br><span> restore_default_smm_area(default_smm_area);</span><br><span>diff --git a/src/southbridge/intel/common/smi.c b/src/southbridge/intel/common/smi.c</span><br><span>index 17ac0cb..36c01e6 100644</span><br><span>--- a/src/southbridge/intel/common/smi.c</span><br><span>+++ b/src/southbridge/intel/common/smi.c</span><br><span>@@ -104,38 +104,6 @@</span><br><span> write_pmbase32(SMI_EN, smi_en);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void southbridge_trigger_smi(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- /**</span><br><span style="color: hsl(0, 100%, 40%);">- * There are several methods of raising a controlled SMI# via</span><br><span style="color: hsl(0, 100%, 40%);">- * software, among them:</span><br><span style="color: hsl(0, 100%, 40%);">- * - Writes to io 0xb2 (APMC)</span><br><span style="color: hsl(0, 100%, 40%);">- * - Writes to the Local Apic ICR with Delivery mode SMI.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Using the local apic is a bit more tricky. According to</span><br><span style="color: hsl(0, 100%, 40%);">- * AMD Family 11 Processor BKDG no destination shorthand must be</span><br><span style="color: hsl(0, 100%, 40%);">- * used.</span><br><span style="color: hsl(0, 100%, 40%);">- * The whole SMM initialization is quite a bit hardware specific, so</span><br><span style="color: hsl(0, 100%, 40%);">- * I'm not too worried about the better of the methods at the moment</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* raise an SMI interrupt */</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_SPEW, " ... raise SMI#\n");</span><br><span style="color: hsl(0, 100%, 40%);">- outb(0x00, 0xb2);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void southbridge_clear_smi_status(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- /* Clear SMI status */</span><br><span style="color: hsl(0, 100%, 40%);">- reset_smi_status();</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Clear PM1 status */</span><br><span style="color: hsl(0, 100%, 40%);">- reset_pm1_status();</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Set EOS bit so other SMIs can occur. */</span><br><span style="color: hsl(0, 100%, 40%);">- smi_set_eos();</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> void smm_setup_structures(void *gnvs, void *tcg, void *smi1)</span><br><span> {</span><br><span> /*</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/30019">change 30019</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/c/coreboot/+/30019"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: Ibdc2bb0f1412366b945813efbc1b6451d27f376f </div>
<div style="display:none"> Gerrit-Change-Number: 30019 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>