<p>Tristan Corrick <strong>uploaded patch set #3</strong> to this change.</p><p><a href="https://review.coreboot.org/c/coreboot/+/29977">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sb/intel/common: Create a common PCH finalise implementation<br><br>The common finalise code is used by bd82x6x, Lynx Point, and Ibex Peak.<br><br>Lynx Point now benefits from being able to write-protect the flash chip.<br><br>For Lynx Point, writing the SPI OPMENU now happens in ramstage, as done<br>in bd82x6x.<br><br>Tested on an ASRock H81M-HDS (Lynx Point). When write-protection is<br>configured, flashrom reports all flash regions as read-only, and does<br>not manage to alter the contents of the flash chip.<br><br>Also tested on an ASUS P8H61-M LX (Cougar Point). Everything seems to<br>work as before.<br><br>Change-Id: I781082b1ed507b00815d1e85aec3e56ae5a4bef2<br>Signed-off-by: Tristan Corrick <tristan@corrick.kiwi><br>---<br>M src/mainboard/lenovo/x201/smihandler.c<br>M src/mainboard/packardbell/ms2290/smihandler.c<br>M src/southbridge/intel/bd82x6x/Kconfig<br>M src/southbridge/intel/bd82x6x/Makefile.inc<br>M src/southbridge/intel/bd82x6x/pch.h<br>M src/southbridge/intel/bd82x6x/smihandler.c<br>M src/southbridge/intel/common/Kconfig<br>M src/southbridge/intel/common/Makefile.inc<br>R src/southbridge/intel/common/finalize.c<br>A src/southbridge/intel/common/finalize.h<br>M src/southbridge/intel/common/pmutil.h<br>M src/southbridge/intel/ibexpeak/Kconfig<br>M src/southbridge/intel/ibexpeak/Makefile.inc<br>M src/southbridge/intel/ibexpeak/pch.h<br>M src/southbridge/intel/lynxpoint/Kconfig<br>M src/southbridge/intel/lynxpoint/Makefile.inc<br>D src/southbridge/intel/lynxpoint/finalize.c<br>M src/southbridge/intel/lynxpoint/lpc.c<br>M src/southbridge/intel/lynxpoint/pch.h<br>M src/southbridge/intel/lynxpoint/smihandler.c<br>20 files changed, 115 insertions(+), 141 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/29977/3</pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/29977">change 29977</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/c/coreboot/+/29977"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: I781082b1ed507b00815d1e85aec3e56ae5a4bef2 </div>
<div style="display:none"> Gerrit-Change-Number: 29977 </div>
<div style="display:none"> Gerrit-PatchSet: 3 </div>
<div style="display:none"> Gerrit-Owner: Tristan Corrick <tristan@corrick.kiwi> </div>
<div style="display:none"> Gerrit-Reviewer: Alexander Couzens <lynxis@fe80.eu> </div>
<div style="display:none"> Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz> </div>
<div style="display:none"> Gerrit-Reviewer: Martin Roth <martinroth@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Nico Huber <nico.h@gmx.de> </div>
<div style="display:none"> Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> </div>
<div style="display:none"> Gerrit-Reviewer: Tristan Corrick <tristan@corrick.kiwi> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>
<div style="display:none"> Gerrit-MessageType: newpatchset </div>