<p>nsekar@codeaurora.org has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/c/coreboot/+/29967">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">qclib: Add qclib support<br><br>Add qclib support to configure pmic, clocks, DDR<br><br>Change-Id: I534af71163d034ea04420dda6a94ce31b08c8a07<br>Signed-off-by: Nitheesh Sekar <nsekar@codeaurora.org><br>Signed-off-by: Sricharan R <sricharan@codeaurora.org><br>---<br>M src/mainboard/google/mistral/mainboard.c<br>M src/mainboard/google/mistral/romstage.c<br>M src/soc/qualcomm/qcs405/Makefile.inc<br>M src/soc/qualcomm/qcs405/include/soc/memlayout.ld<br>A src/soc/qualcomm/qcs405/include/soc/qclib.h<br>M src/soc/qualcomm/qcs405/include/soc/symbols.h<br>M src/soc/qualcomm/qcs405/mmu.c<br>A src/soc/qualcomm/qcs405/qclib_execute.c<br>8 files changed, 247 insertions(+), 16 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/29967/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/mistral/mainboard.c b/src/mainboard/google/mistral/mainboard.c</span><br><span>index 7201874..f4fc31e 100644</span><br><span>--- a/src/mainboard/google/mistral/mainboard.c</span><br><span>+++ b/src/mainboard/google/mistral/mainboard.c</span><br><span>@@ -18,12 +18,14 @@</span><br><span> #include <timestamp.h></span><br><span> #include <soc/usb.h></span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#if 0</span><br><span> static struct usb_board_data usb0_board_data = {</span><br><span> .parameter_override_x0 = 0x63,</span><br><span> .parameter_override_x1 = 0x03,</span><br><span> .parameter_override_x0 = 0x1d,</span><br><span> .parameter_override_x1 = 0x03,</span><br><span> };</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span> </span><br><span> static struct usb_board_data usb1_board_data = {</span><br><span> .parameter_override_x0 = 0x63,</span><br><span>@@ -35,7 +37,7 @@</span><br><span> static void setup_usb(void)</span><br><span> {</span><br><span> /* Setting Primarty usb controller */</span><br><span style="color: hsl(0, 100%, 40%);">- setup_usb_host(HSUSB_SS_PORT_0, &usb0_board_data);</span><br><span style="color: hsl(120, 100%, 40%);">+ //setup_usb_host(HSUSB_SS_PORT_0, &usb0_board_data);</span><br><span> </span><br><span> /* Setting secondary usb controller */</span><br><span> setup_usb_host(HSUSB_HS_PORT_1, &usb1_board_data);</span><br><span>diff --git a/src/mainboard/google/mistral/romstage.c b/src/mainboard/google/mistral/romstage.c</span><br><span>index 31e5113..e53f485 100644</span><br><span>--- a/src/mainboard/google/mistral/romstage.c</span><br><span>+++ b/src/mainboard/google/mistral/romstage.c</span><br><span>@@ -21,19 +21,18 @@</span><br><span> #include <timestamp.h></span><br><span> #include <arch/stages.h></span><br><span> #include <soc/usb.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/qclib.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifdef CONFIG_QC_SOC_SIMULATE</span><br><span> extern void qcs405_mmu_dram_config_c(void);</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span> void platform_romstage_main(void)</span><br><span> {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* QCLib: DDR init & train */</span><br><span style="color: hsl(120, 100%, 40%);">+ qclib_load_and_run();</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /*</span><br><span> * Do DWC3 core and phy reset. Kick these resets off early</span><br><span> * so they get atleast 1msec to settle.</span><br><span> */</span><br><span> reset_usb(HSUSB_SS_PORT_0);</span><br><span> reset_usb(HSUSB_HS_PORT_1);</span><br><span style="color: hsl(0, 100%, 40%);">-#ifdef CONFIG_QC_SOC_SIMULATE</span><br><span style="color: hsl(0, 100%, 40%);">- qcs405_mmu_dram_config_c();</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span> }</span><br><span>diff --git a/src/soc/qualcomm/qcs405/Makefile.inc b/src/soc/qualcomm/qcs405/Makefile.inc</span><br><span>index c174cae..5e255e2 100644</span><br><span>--- a/src/soc/qualcomm/qcs405/Makefile.inc</span><br><span>+++ b/src/soc/qualcomm/qcs405/Makefile.inc</span><br><span>@@ -28,6 +28,7 @@</span><br><span> romstage-$(CONFIG_DRIVERS_UART) += uart.c</span><br><span> romstage-$(CONFIG_QC_SOC_SIMULATE) += flash_controller.c</span><br><span> romstage-y += usb.c</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-y += qclib_execute.c</span><br><span> </span><br><span> ################################################################################</span><br><span> ramstage-y += soc.c</span><br><span>@@ -51,6 +52,28 @@</span><br><span> cp $(objcbfs)/bootblock.raw.bin $(objcbfs)/bootblock.bin</span><br><span> </span><br><span> ################################################################################</span><br><span style="color: hsl(120, 100%, 40%);">+QCLIB_FILE := $(QCS405_BLOB)/QcLib.elf</span><br><span style="color: hsl(120, 100%, 40%);">+qclib_file := $(shell ls $(QCLIB_FILE))</span><br><span style="color: hsl(120, 100%, 40%);">+ifneq (,$(findstring $(QCLIB_FILE),$(qclib_file)))</span><br><span style="color: hsl(120, 100%, 40%);">+ QCLIB_CBFS := $(CONFIG_CBFS_PREFIX)/qclib</span><br><span style="color: hsl(120, 100%, 40%);">+ $(QCLIB_CBFS)-file := $(QCLIB_FILE)</span><br><span style="color: hsl(120, 100%, 40%);">+ $(QCLIB_CBFS)-type := stage</span><br><span style="color: hsl(120, 100%, 40%);">+ $(QCLIB_CBFS)-compression := none</span><br><span style="color: hsl(120, 100%, 40%);">+ cbfs-files-y += $(QCLIB_CBFS)</span><br><span style="color: hsl(120, 100%, 40%);">+endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+################################################################################</span><br><span style="color: hsl(120, 100%, 40%);">+PMIC_FILE := $(QCS405_BLOB)/pmic.elf</span><br><span style="color: hsl(120, 100%, 40%);">+pmic_file := $(shell ls $(PMIC_FILE))</span><br><span style="color: hsl(120, 100%, 40%);">+ifneq (,$(findstring $(PMIC_FILE),$(pmic_file)))</span><br><span style="color: hsl(120, 100%, 40%);">+ PMIC_CBFS := $(CONFIG_CBFS_PREFIX)/pmiccfg</span><br><span style="color: hsl(120, 100%, 40%);">+ $(PMIC_CBFS)-file := $(PMIC_FILE)</span><br><span style="color: hsl(120, 100%, 40%);">+ $(PMIC_CBFS)-type := stage</span><br><span style="color: hsl(120, 100%, 40%);">+ $(PMIC_CBFS)-compression := none</span><br><span style="color: hsl(120, 100%, 40%);">+ cbfs-files-y += $(PMIC_CBFS)</span><br><span style="color: hsl(120, 100%, 40%);">+endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+################################################################################</span><br><span> QC_SEC_FILE := $(QCS405_BLOB)/qc_sec.mbn</span><br><span> qc_sec_file := $(shell ls $(QC_SEC_FILE))</span><br><span> ifneq (,$(findstring $(QC_SEC_FILE),$(qc_sec_file)))</span><br><span>diff --git a/src/soc/qualcomm/qcs405/include/soc/memlayout.ld b/src/soc/qualcomm/qcs405/include/soc/memlayout.ld</span><br><span>index 03c6edb..dadbbe8 100644</span><br><span>--- a/src/soc/qualcomm/qcs405/include/soc/memlayout.ld</span><br><span>+++ b/src/soc/qualcomm/qcs405/include/soc/memlayout.ld</span><br><span>@@ -30,8 +30,8 @@</span><br><span> SSRAM_END(0x8608000)</span><br><span> </span><br><span> BSRAM_START(0x8C00000)</span><br><span style="color: hsl(0, 100%, 40%);">- OVERLAP_VERSTAGE_ROMSTAGE(0x8C00000, 100K)</span><br><span style="color: hsl(0, 100%, 40%);">- REGION(fw_reserved2, 0x8C19000, 0x16000, 4096)</span><br><span style="color: hsl(120, 100%, 40%);">+ REGION(fw_reserved2, 0x8C00000, 0x16000, 4096)</span><br><span style="color: hsl(120, 100%, 40%);">+ OVERLAP_VERSTAGE_ROMSTAGE(0x8C16000, 100K)</span><br><span> BOOTBLOCK(0x8C2F000, 40K)</span><br><span> TTB(0x8C39000, 56K)</span><br><span> VBOOT2_WORK(0x8C47000, 16K)</span><br><span>@@ -39,10 +39,10 @@</span><br><span> TIMESTAMP(0x8C4F000, 1K)</span><br><span> PRERAM_CBMEM_CONSOLE(0x8C4F400, 32K)</span><br><span> PRERAM_CBFS_CACHE(0x8C57400, 70K)</span><br><span style="color: hsl(0, 100%, 40%);">- REGION(bsram_unused, 0x8C68C00, 0xA2400, 0x100)</span><br><span style="color: hsl(0, 100%, 40%);">-/* REGION(qclib, 0x8D0B000, 0x80000, 4096)</span><br><span style="color: hsl(0, 100%, 40%);">- REGION(dcb, 0x8D8B000, 0x4000, 4096)</span><br><span style="color: hsl(0, 100%, 40%);">- REGION(pmic, 0x8D8F000, 0xA000, 4096)*/</span><br><span style="color: hsl(120, 100%, 40%);">+ //REGION(bsram_unused, 0x8C68C00, 0xA2400, 0x100)</span><br><span style="color: hsl(120, 100%, 40%);">+ REGION(qclib, 0x8C69000, 0x80000, 4096)</span><br><span style="color: hsl(120, 100%, 40%);">+ REGION(dcb, 0x8CE9000, 0x4000, 4096)</span><br><span style="color: hsl(120, 100%, 40%);">+ REGION(pmic, 0x8CED000, 0x10000, 4096)</span><br><span> BSRAM_END(0x8D80000)</span><br><span> </span><br><span> DRAM_START(0x80000000)</span><br><span>diff --git a/src/soc/qualcomm/qcs405/include/soc/qclib.h b/src/soc/qualcomm/qcs405/include/soc/qclib.h</span><br><span>new file mode 100644</span><br><span>index 0000000..b6a681e</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/qualcomm/qcs405/include/soc/qclib.h</span><br><span>@@ -0,0 +1,102 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018, The Linux Foundation. All rights reserved.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License version 2 and</span><br><span style="color: hsl(120, 100%, 40%);">+ * only version 2 as published by the Free Software Foundation.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef _SOC_QUALCOMM_QCS405_QCLIB_H__</span><br><span style="color: hsl(120, 100%, 40%);">+#define _SOC_QUALCOMM_QCS405_QCLIB_H__</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <fmap.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* coreboot & QCLib I/F definitions */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* TE_NAME (table entry name) */</span><br><span style="color: hsl(120, 100%, 40%);">+#define TE_NAME_LENGTH 24 /* length (bytes) of name field */</span><br><span style="color: hsl(120, 100%, 40%);">+#define TE_DDR_INFORMATION "ddr_information"</span><br><span style="color: hsl(120, 100%, 40%);">+#define TE_DCB_SETTINGS "dcb_settings"</span><br><span style="color: hsl(120, 100%, 40%);">+#define TE_PMIC_SETTINGS "pmic_settings"</span><br><span style="color: hsl(120, 100%, 40%);">+#define TE_DDR_TRAINING_DATA "ddr_training_data"</span><br><span style="color: hsl(120, 100%, 40%);">+#define TE_LIMITS_CFG_DATA "limits_cfg_data"</span><br><span style="color: hsl(120, 100%, 40%);">+#define TE_QCLIB_LOG_BUFFER "qclib_log_buffer"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#if IS_ENABLED(CONFIG_QC_SDI_ENABLE)</span><br><span style="color: hsl(120, 100%, 40%);">+#define TE_QCSDI "qcsdi"</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* TE_INDEX (table entry index) */</span><br><span style="color: hsl(120, 100%, 40%);">+/* te_index_ddr_information must be first index</span><br><span style="color: hsl(120, 100%, 40%);">+ This allows DDR mmu configuration to occcur first</span><br><span style="color: hsl(120, 100%, 40%);">+ in case other write operations require DDR access */</span><br><span style="color: hsl(120, 100%, 40%);">+enum te_index {</span><br><span style="color: hsl(120, 100%, 40%);">+ te_index_ddr_information, /* 00 */</span><br><span style="color: hsl(120, 100%, 40%);">+ te_index_dcb, /* 01 */</span><br><span style="color: hsl(120, 100%, 40%);">+ te_index_pmic, /* 02 */</span><br><span style="color: hsl(120, 100%, 40%);">+ te_index_ddr_training, /* 03 */</span><br><span style="color: hsl(120, 100%, 40%);">+ te_index_limits_cfg, /* 04 */</span><br><span style="color: hsl(120, 100%, 40%);">+ te_index_qclib_log_buffer, /* 05 */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* add new entries above */</span><br><span style="color: hsl(120, 100%, 40%);">+#if IS_ENABLED(CONFIG_QC_SDI_ENABLE)</span><br><span style="color: hsl(120, 100%, 40%);">+ te_index_qcsdi, /* ALWAYS LAST */</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+ te_index_last</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* BA_BMASK_VALUES (blob_attributes bit mask values) */</span><br><span style="color: hsl(120, 100%, 40%);">+#define BA_BMASK_SAVE_TO_STORAGE 0x00000001</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+struct qclib_cb_if_table_entry {</span><br><span style="color: hsl(120, 100%, 40%);">+ const char name[TE_NAME_LENGTH]; /* 0x00 TE_NAME */</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t blob_address; /* 0x18 blob addr in SRAM */</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t size; /* 0x20 blob size in SRAM */</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t blob_attributes; /* 0x24 BA_BMASK_VALUES */</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* GA_BMASK_VALUES (global_attributes bit mask values) */</span><br><span style="color: hsl(120, 100%, 40%);">+#define GA_BMASK_ENABLE_SOC_DEBUG_FLOW 0x00000001</span><br><span style="color: hsl(120, 100%, 40%);">+#define GA_BMASK_ENABLE_UART_LOGGING 0x00000002</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define INTERFACE_VERSION 0x00000001</span><br><span style="color: hsl(120, 100%, 40%);">+#define MAX_NUMBER_OF_ENTRIES 16</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define QCLIB_MAGIC_NUMBER 0x51434C49425F4342 /* QCLIB_CB */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+struct qclib_cb_if_table_header {</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t magic; /* 0x00 */</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t version; /* 0x08 */</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t num_entries; /* 0x0C */</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t max_entries; /* 0x10 */</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t global_attributes; /* 0x14 */</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t reserved; /* 0x18 */</span><br><span style="color: hsl(120, 100%, 40%);">+ struct qclib_cb_if_table_entry te[MAX_NUMBER_OF_ENTRIES]; /* 0x20 */</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* fmap_region[] table index */</span><br><span style="color: hsl(120, 100%, 40%);">+enum fmap_region_index {</span><br><span style="color: hsl(120, 100%, 40%);">+ fmap_ddr_region,</span><br><span style="color: hsl(120, 100%, 40%);">+ fmap_limits_cfg,</span><br><span style="color: hsl(120, 100%, 40%);">+ fmap_region_max</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* Region Device for Data in Flash */</span><br><span style="color: hsl(120, 100%, 40%);">+struct fmap_region {</span><br><span style="color: hsl(120, 100%, 40%);">+ struct region_device dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ size_t size;</span><br><span style="color: hsl(120, 100%, 40%);">+ bool dev_valid;</span><br><span style="color: hsl(120, 100%, 40%);">+ enum te_index index;</span><br><span style="color: hsl(120, 100%, 40%);">+ char fmap_name[TE_NAME_LENGTH];</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void qclib_load_and_run(void);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#endif // _SOC_QUALCOMM_QCS405_QCLIB_H_</span><br><span>diff --git a/src/soc/qualcomm/qcs405/include/soc/symbols.h b/src/soc/qualcomm/qcs405/include/soc/symbols.h</span><br><span>index f7cdc8d..447b7ae 100644</span><br><span>--- a/src/soc/qualcomm/qcs405/include/soc/symbols.h</span><br><span>+++ b/src/soc/qualcomm/qcs405/include/soc/symbols.h</span><br><span>@@ -30,4 +30,12 @@</span><br><span> extern u8 _edram_reserved[];</span><br><span> #define _dram_reserved_size (_edram_reserved - _dram_reserved)</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+extern u8 _dcb[];</span><br><span style="color: hsl(120, 100%, 40%);">+extern u8 _edcb[];</span><br><span style="color: hsl(120, 100%, 40%);">+#define _dcb_size (_edcb - _dcb)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+extern u8 _pmic[];</span><br><span style="color: hsl(120, 100%, 40%);">+extern u8 _epmic[];</span><br><span style="color: hsl(120, 100%, 40%);">+#define _pmic_size (_epmic - _pmic)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #endif // _SOC_QUALCOMM_QCS405_SYMBOLS_H_</span><br><span>diff --git a/src/soc/qualcomm/qcs405/mmu.c b/src/soc/qualcomm/qcs405/mmu.c</span><br><span>index bebca24..ecae39f 100644</span><br><span>--- a/src/soc/qualcomm/qcs405/mmu.c</span><br><span>+++ b/src/soc/qualcomm/qcs405/mmu.c</span><br><span>@@ -27,16 +27,12 @@</span><br><span> MA_DEV | MA_S | MA_RW);</span><br><span> mmu_config_range((void *)_ssram, _ssram_size, MA_MEM | MA_S | MA_RW);</span><br><span> mmu_config_range((void *)_bsram, _bsram_size, MA_MEM | MA_S | MA_RW);</span><br><span style="color: hsl(0, 100%, 40%);">-#ifdef CONFIG_QC_SOC_SIMULATE</span><br><span> mmu_config_range((void *)0x80000000, 0x40000000, MA_MEM | MA_S | MA_RW);</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span> </span><br><span> mmu_enable();</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifdef CONFIG_QC_SOC_SIMULATE</span><br><span> void qcs405_mmu_dram_config_c(void)</span><br><span> {</span><br><span> mmu_config_range((void *)0x80000000, 0x40000000, MA_MEM | MA_NS | MA_RW);</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span>diff --git a/src/soc/qualcomm/qcs405/qclib_execute.c b/src/soc/qualcomm/qcs405/qclib_execute.c</span><br><span>new file mode 100644</span><br><span>index 0000000..917a04c</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/qualcomm/qcs405/qclib_execute.c</span><br><span>@@ -0,0 +1,101 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018, The Linux Foundation. All rights reserved.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License version 2 and</span><br><span style="color: hsl(120, 100%, 40%);">+ * only version 2 as published by the Free Software Foundation.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <string.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/cache.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/mmu.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cbfs.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <halt.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <timestamp.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/mmu.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/qclib.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/symbols.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define PMIC_NAME "/pmiccfg"</span><br><span style="color: hsl(120, 100%, 40%);">+#define DCB_NAME "/dcb"</span><br><span style="color: hsl(120, 100%, 40%);">+#define QCLIB_NAME "/qclib"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define PBL_DATA_PTR 0x8c101a0 //0x14810188</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void qclib_load_and_run(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ int (*doit)(void *, void *);</span><br><span style="color: hsl(120, 100%, 40%);">+ void *arg;</span><br><span style="color: hsl(120, 100%, 40%);">+ int ret_code;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct mmu_context pre_qclib_mmu_context;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ struct prog qclib =</span><br><span style="color: hsl(120, 100%, 40%);">+ PROG_INIT(PROG_REFCODE, CONFIG_CBFS_PREFIX QCLIB_NAME);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ struct prog pmic =</span><br><span style="color: hsl(120, 100%, 40%);">+ PROG_INIT(PROG_REFCODE, CONFIG_CBFS_PREFIX PMIC_NAME);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Attempt to load PMICCFG Blob */</span><br><span style="color: hsl(120, 100%, 40%);">+#if 0</span><br><span style="color: hsl(120, 100%, 40%);">+ if (!cbfs_boot_load_file(CONFIG_CBFS_PREFIX PMIC_NAME,</span><br><span style="color: hsl(120, 100%, 40%);">+ _pmic, _pmic_size, CBFS_TYPE_RAW))</span><br><span style="color: hsl(120, 100%, 40%);">+ goto fail;</span><br><span style="color: hsl(120, 100%, 40%);">+#else</span><br><span style="color: hsl(120, 100%, 40%);">+ if (prog_locate(&pmic))</span><br><span style="color: hsl(120, 100%, 40%);">+ goto fail;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (cbfs_prog_stage_load(&pmic))</span><br><span style="color: hsl(120, 100%, 40%);">+ goto fail;</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Attempt to load DCB Blob */</span><br><span style="color: hsl(120, 100%, 40%);">+// if (!cbfs_boot_load_file(CONFIG_CBFS_PREFIX DCB_NAME,</span><br><span style="color: hsl(120, 100%, 40%);">+// _dcb, _dcb_size, CBFS_TYPE_RAW))</span><br><span style="color: hsl(120, 100%, 40%);">+// goto fail;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Attempt to load QCLib elf */</span><br><span style="color: hsl(120, 100%, 40%);">+ if (prog_locate(&qclib))</span><br><span style="color: hsl(120, 100%, 40%);">+ goto fail;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (cbfs_prog_stage_load(&qclib))</span><br><span style="color: hsl(120, 100%, 40%);">+ goto fail;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ prog_set_entry(&qclib, qclib.entry, (void *)PBL_DATA_PTR);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "\n\n\nQCLib is about to Initialize PMIC and DDR\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "Jumping to QCLib code at %p(%p)\n",</span><br><span style="color: hsl(120, 100%, 40%);">+ prog_entry(&qclib), prog_entry_arg(&qclib));</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ doit = prog_entry(&qclib);</span><br><span style="color: hsl(120, 100%, 40%);">+ arg = prog_entry_arg(&qclib);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* back-up mmu context before disabling mmu and executing qclib */</span><br><span style="color: hsl(120, 100%, 40%);">+ mmu_save_context(&pre_qclib_mmu_context);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* disable mmu before jumping to qclib. mmu_disable also</span><br><span style="color: hsl(120, 100%, 40%);">+ flushes and invalidates caches before disabling mmu. */</span><br><span style="color: hsl(120, 100%, 40%);">+ mmu_disable();</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ ret_code = doit(arg, NULL);</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "QCLib completed\n\n\n");</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Before returning, QCLib flushes cache and disables mmu.</span><br><span style="color: hsl(120, 100%, 40%);">+ Explicitly disable mmu (flush, invalidate and disable mmu)</span><br><span style="color: hsl(120, 100%, 40%);">+ before re-enabling mmu with backed-up mmu context */</span><br><span style="color: hsl(120, 100%, 40%);">+ mmu_disable();</span><br><span style="color: hsl(120, 100%, 40%);">+ mmu_restore_context(&pre_qclib_mmu_context);</span><br><span style="color: hsl(120, 100%, 40%);">+ mmu_enable();</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ qcs405_mmu_dram_config_c();</span><br><span style="color: hsl(120, 100%, 40%);">+ return;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+fail:</span><br><span style="color: hsl(120, 100%, 40%);">+ die("Couldn't run QCLib.\n");</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/29967">change 29967</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/c/coreboot/+/29967"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: I534af71163d034ea04420dda6a94ce31b08c8a07 </div>
<div style="display:none"> Gerrit-Change-Number: 29967 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: nsekar@codeaurora.org </div>
<div style="display:none"> Gerrit-Reviewer: Julius Werner <jwerner@chromium.org> </div>
<div style="display:none"> Gerrit-Reviewer: Martin Roth <martinroth@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: nsekar@codeaurora.org </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>