<p>Patrick Georgi <strong>merged</strong> this change.</p><p><a href="https://review.coreboot.org/c/coreboot/+/29841">View Change</a></p><div style="white-space:pre-wrap">Approvals:
build bot (Jenkins): Verified
Patrick Georgi: Looks good to me, approved
</div><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sb/intel/common: Fix style issue in spi.c<br><br>Change-Id: I6b9e0e0c643f9b47cfe8bdfffbe247f477ace685<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>Reviewed-on: https://review.coreboot.org/c/29841<br>Tested-by: build bot (Jenkins) <no-reply@coreboot.org><br>Reviewed-by: Patrick Georgi <pgeorgi@google.com><br>---<br>M src/southbridge/intel/common/spi.c<br>1 file changed, 54 insertions(+), 52 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c</span><br><span>index 0592379..fe3bf2a 100644</span><br><span>--- a/src/southbridge/intel/common/spi.c</span><br><span>+++ b/src/southbridge/intel/common/spi.c</span><br><span>@@ -196,6 +196,7 @@</span><br><span> static u8 readb_(const void *addr)</span><br><span> {</span><br><span> u8 v = read8(addr);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> printk(BIOS_DEBUG, "read %2.2x from %4.4x\n",</span><br><span> v, ((unsigned) addr & 0xffff) - 0xf020);</span><br><span> return v;</span><br><span>@@ -204,6 +205,7 @@</span><br><span> static u16 readw_(const void *addr)</span><br><span> {</span><br><span> u16 v = read16(addr);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> printk(BIOS_DEBUG, "read %4.4x from %4.4x\n",</span><br><span> v, ((unsigned) addr & 0xffff) - 0xf020);</span><br><span> return v;</span><br><span>@@ -212,6 +214,7 @@</span><br><span> static u32 readl_(const void *addr)</span><br><span> {</span><br><span> u32 v = read32(addr);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> printk(BIOS_DEBUG, "read %8.8x from %4.4x\n",</span><br><span> v, ((unsigned) addr & 0xffff) - 0xf020);</span><br><span> return v;</span><br><span>@@ -347,7 +350,7 @@</span><br><span> if (cntlr->hsfs & HSFS_FDV) {</span><br><span> writel_(4, &ich9_spi->fdoc);</span><br><span> cntlr->flmap0 = readl_(&ich9_spi->fdod);</span><br><span style="color: hsl(0, 100%, 40%);">- writel_ (0x1000, &ich9_spi->fdoc);</span><br><span style="color: hsl(120, 100%, 40%);">+ writel_(0x1000, &ich9_spi->fdoc);</span><br><span> cntlr->flcomp = readl_(&ich9_spi->fdod);</span><br><span> }</span><br><span> }</span><br><span>@@ -439,43 +442,43 @@</span><br><span> optypes = (optypes & 0xfffc) | (trans->type & 0x3);</span><br><span> writew_(optypes, cntlr->optype);</span><br><span> return 0;</span><br><span style="color: hsl(0, 100%, 40%);">- } else {</span><br><span style="color: hsl(0, 100%, 40%);">- /* The lock is on. See if what we need is on the menu. */</span><br><span style="color: hsl(0, 100%, 40%);">- uint8_t optype;</span><br><span style="color: hsl(0, 100%, 40%);">- uint16_t opcode_index;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Write Enable is handled as atomic prefix */</span><br><span style="color: hsl(0, 100%, 40%);">- if (trans->opcode == SPI_OPCODE_WREN)</span><br><span style="color: hsl(0, 100%, 40%);">- return 0;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- read_reg(cntlr->opmenu, opmenu, sizeof(opmenu));</span><br><span style="color: hsl(0, 100%, 40%);">- for (opcode_index = 0; opcode_index < cntlr->menubytes;</span><br><span style="color: hsl(0, 100%, 40%);">- opcode_index++) {</span><br><span style="color: hsl(0, 100%, 40%);">- if (opmenu[opcode_index] == trans->opcode)</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (opcode_index == cntlr->menubytes) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "ICH SPI: Opcode %x not found\n",</span><br><span style="color: hsl(0, 100%, 40%);">- trans->opcode);</span><br><span style="color: hsl(0, 100%, 40%);">- return -1;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- optypes = readw_(cntlr->optype);</span><br><span style="color: hsl(0, 100%, 40%);">- optype = (optypes >> (opcode_index * 2)) & 0x3;</span><br><span style="color: hsl(0, 100%, 40%);">- if (trans->type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS &&</span><br><span style="color: hsl(0, 100%, 40%);">- optype == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS &&</span><br><span style="color: hsl(0, 100%, 40%);">- trans->bytesout >= 3) {</span><br><span style="color: hsl(0, 100%, 40%);">- /* We guessed wrong earlier. Fix it up. */</span><br><span style="color: hsl(0, 100%, 40%);">- trans->type = optype;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- if (optype != trans->type) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "ICH SPI: Transaction doesn't fit type %d\n",</span><br><span style="color: hsl(0, 100%, 40%);">- optype);</span><br><span style="color: hsl(0, 100%, 40%);">- return -1;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- return opcode_index;</span><br><span> }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* The lock is on. See if what we need is on the menu. */</span><br><span style="color: hsl(120, 100%, 40%);">+ uint8_t optype;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint16_t opcode_index;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Write Enable is handled as atomic prefix */</span><br><span style="color: hsl(120, 100%, 40%);">+ if (trans->opcode == SPI_OPCODE_WREN)</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ read_reg(cntlr->opmenu, opmenu, sizeof(opmenu));</span><br><span style="color: hsl(120, 100%, 40%);">+ for (opcode_index = 0; opcode_index < cntlr->menubytes;</span><br><span style="color: hsl(120, 100%, 40%);">+ opcode_index++) {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (opmenu[opcode_index] == trans->opcode)</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (opcode_index == cntlr->menubytes) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "ICH SPI: Opcode %x not found\n",</span><br><span style="color: hsl(120, 100%, 40%);">+ trans->opcode);</span><br><span style="color: hsl(120, 100%, 40%);">+ return -1;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ optypes = readw_(cntlr->optype);</span><br><span style="color: hsl(120, 100%, 40%);">+ optype = (optypes >> (opcode_index * 2)) & 0x3;</span><br><span style="color: hsl(120, 100%, 40%);">+ if (trans->type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS &&</span><br><span style="color: hsl(120, 100%, 40%);">+ optype == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS &&</span><br><span style="color: hsl(120, 100%, 40%);">+ trans->bytesout >= 3) {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* We guessed wrong earlier. Fix it up. */</span><br><span style="color: hsl(120, 100%, 40%);">+ trans->type = optype;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ if (optype != trans->type) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "ICH SPI: Transaction doesn't fit type %d\n",</span><br><span style="color: hsl(120, 100%, 40%);">+ optype);</span><br><span style="color: hsl(120, 100%, 40%);">+ return -1;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ return opcode_index;</span><br><span> }</span><br><span> </span><br><span> static int spi_setup_offset(spi_transaction *trans)</span><br><span>@@ -526,7 +529,7 @@</span><br><span> return -1;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int spi_is_multichip (void)</span><br><span style="color: hsl(120, 100%, 40%);">+static int spi_is_multichip(void)</span><br><span> {</span><br><span> ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr);</span><br><span> if (!(cntlr->hsfs & HSFS_FDV))</span><br><span>@@ -689,6 +692,7 @@</span><br><span> {</span><br><span> ich_spi_controller *cntlr = car_get_var_ptr(&g_cntlr);</span><br><span> uint32_t addr_old = readl_(&cntlr->ich9_spi->faddr) & ~0x01FFFFFF;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> writel_((addr & 0x01FFFFFF) | addr_old, &cntlr->ich9_spi->faddr);</span><br><span> }</span><br><span> </span><br><span>@@ -773,8 +777,7 @@</span><br><span> hsfc |= (0x3 << HSFC_FCYCLE_OFF); /* set erase operation */</span><br><span> hsfc |= HSFC_FGO; /* start */</span><br><span> writew_(hsfc, &cntlr->ich9_spi->hsfc);</span><br><span style="color: hsl(0, 100%, 40%);">- if (ich_hwseq_wait_for_cycle_complete(timeout, len))</span><br><span style="color: hsl(0, 100%, 40%);">- {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (ich_hwseq_wait_for_cycle_complete(timeout, len)) {</span><br><span> printk(BIOS_ERR, "SF: Erase failed at %x\n", offset - erase_size);</span><br><span> ret = -1;</span><br><span> goto out;</span><br><span>@@ -811,7 +814,7 @@</span><br><span> uint8_t block_len;</span><br><span> </span><br><span> if (addr + len > flash->size) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk (BIOS_ERR,</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_ERR,</span><br><span> "Attempt to read %x-%x which is out of chip\n",</span><br><span> (unsigned) addr,</span><br><span> (unsigned) addr+(unsigned) len);</span><br><span>@@ -882,7 +885,7 @@</span><br><span> uint32_t start = addr;</span><br><span> </span><br><span> if (addr + len > flash->size) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk (BIOS_ERR,</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_ERR,</span><br><span> "Attempt to write 0x%x-0x%x which is out of chip\n",</span><br><span> (unsigned)addr, (unsigned) (addr+len));</span><br><span> return -1;</span><br><span>@@ -908,9 +911,8 @@</span><br><span> hsfc |= HSFC_FGO; /* start */</span><br><span> writew_(hsfc, &cntlr->ich9_spi->hsfc);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- if (ich_hwseq_wait_for_cycle_complete(timeout, block_len))</span><br><span style="color: hsl(0, 100%, 40%);">- {</span><br><span style="color: hsl(0, 100%, 40%);">- printk (BIOS_ERR, "SF: write failure at %x\n",</span><br><span style="color: hsl(120, 100%, 40%);">+ if (ich_hwseq_wait_for_cycle_complete(timeout, block_len)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_ERR, "SF: write failure at %x\n",</span><br><span> addr);</span><br><span> return -1;</span><br><span> }</span><br><span>@@ -944,9 +946,8 @@</span><br><span> memcpy(&flash->spi, spi, sizeof(*spi));</span><br><span> flash->name = "Opaque HW-sequencing";</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- ich_hwseq_set_addr (0);</span><br><span style="color: hsl(0, 100%, 40%);">- switch ((cntlr->hsfs >> 3) & 3)</span><br><span style="color: hsl(0, 100%, 40%);">- {</span><br><span style="color: hsl(120, 100%, 40%);">+ ich_hwseq_set_addr(0);</span><br><span style="color: hsl(120, 100%, 40%);">+ switch ((cntlr->hsfs >> 3) & 3) {</span><br><span> case 0:</span><br><span> flash->sector_size = 256;</span><br><span> break;</span><br><span>@@ -967,7 +968,7 @@</span><br><span> </span><br><span> if ((cntlr->hsfs & HSFS_FDV) && ((cntlr->flmap0 >> 8) & 3))</span><br><span> flash->size += 1 << (19 + ((cntlr->flcomp >> 3) & 7));</span><br><span style="color: hsl(0, 100%, 40%);">- printk (BIOS_DEBUG, "flash size 0x%x bytes\n", flash->size);</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "flash size 0x%x bytes\n", flash->size);</span><br><span> </span><br><span> return 0;</span><br><span> }</span><br><span>@@ -978,19 +979,20 @@</span><br><span> return spi_flash_vector_helper(slave, vectors, count, spi_ctrlr_xfer);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#define SPI_FPR_SHIFT 12</span><br><span style="color: hsl(120, 100%, 40%);">+#define SPI_FPR_SHIFT 12</span><br><span> #define ICH7_SPI_FPR_MASK 0xfff</span><br><span> #define ICH9_SPI_FPR_MASK 0x1fff</span><br><span style="color: hsl(0, 100%, 40%);">-#define SPI_FPR_BASE_SHIFT 0</span><br><span style="color: hsl(120, 100%, 40%);">+#define SPI_FPR_BASE_SHIFT 0</span><br><span> #define ICH7_SPI_FPR_LIMIT_SHIFT 12</span><br><span> #define ICH9_SPI_FPR_LIMIT_SHIFT 16</span><br><span> #define ICH9_SPI_FPR_RPE (1 << 15) /* Read Protect */</span><br><span style="color: hsl(0, 100%, 40%);">-#define SPI_FPR_WPE (1 << 31) /* Write Protect */</span><br><span style="color: hsl(120, 100%, 40%);">+#define SPI_FPR_WPE (1 << 31) /* Write Protect */</span><br><span> </span><br><span> static u32 spi_fpr(u32 base, u32 limit)</span><br><span> {</span><br><span> u32 ret;</span><br><span> u32 mask, limit_shift;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> if (IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX)) {</span><br><span> mask = ICH7_SPI_FPR_MASK;</span><br><span> limit_shift = ICH7_SPI_FPR_LIMIT_SHIFT;</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/29841">change 29841</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: I6b9e0e0c643f9b47cfe8bdfffbe247f477ace685 </div>
<div style="display:none"> Gerrit-Change-Number: 29841 </div>
<div style="display:none"> Gerrit-PatchSet: 3 </div>
<div style="display:none"> Gerrit-Owner: HAOUAS Elyes <ehaouas@noos.fr> </div>
<div style="display:none"> Gerrit-Reviewer: HAOUAS Elyes <ehaouas@noos.fr> </div>
<div style="display:none"> Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>
<div style="display:none"> Gerrit-MessageType: merged </div>