<p>Nico Huber has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/c/coreboot/+/29903">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/apl: Enable graphics with libgfxinit<br><br>As usual, it just works.<br><br>Change-Id: I7b111f1cdac4d18f2fc3089f57aebf3ad1739e5d<br>Signed-off-by: Nico Huber <nico.huber@secunet.com><br>---<br>M src/drivers/intel/gma/Kconfig<br>M src/soc/intel/apollolake/graphics.c<br>2 files changed, 27 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/29903/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/drivers/intel/gma/Kconfig b/src/drivers/intel/gma/Kconfig</span><br><span>index 10ccf71..a5c8495 100644</span><br><span>--- a/src/drivers/intel/gma/Kconfig</span><br><span>+++ b/src/drivers/intel/gma/Kconfig</span><br><span>@@ -68,13 +68,14 @@</span><br><span> depends on NORTHBRIDGE_INTEL_GM45 || NORTHBRIDGE_INTEL_X4X \</span><br><span> || NORTHBRIDGE_INTEL_NEHALEM || NORTHBRIDGE_INTEL_SANDYBRIDGE \</span><br><span> || NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_HASWELL \</span><br><span style="color: hsl(0, 100%, 40%);">- || SOC_INTEL_BROADWELL || SOC_INTEL_SKYLAKE</span><br><span style="color: hsl(120, 100%, 40%);">+ || SOC_INTEL_BROADWELL || SOC_INTEL_SKYLAKE || SOC_INTEL_APOLLOLAKE</span><br><span> depends on MAINBOARD_HAS_LIBGFXINIT</span><br><span> </span><br><span> if GFX_GMA</span><br><span> </span><br><span> config GFX_GMA_CPU</span><br><span> string</span><br><span style="color: hsl(120, 100%, 40%);">+ default "Broxton" if SOC_INTEL_APOLLOLAKE</span><br><span> default "Skylake" if SOC_INTEL_SKYLAKE</span><br><span> default "Broadwell" if SOC_INTEL_BROADWELL</span><br><span> default "Haswell" if NORTHBRIDGE_INTEL_HASWELL</span><br><span>diff --git a/src/soc/intel/apollolake/graphics.c b/src/soc/intel/apollolake/graphics.c</span><br><span>index 4857788..37cdda4 100644</span><br><span>--- a/src/soc/intel/apollolake/graphics.c</span><br><span>+++ b/src/soc/intel/apollolake/graphics.c</span><br><span>@@ -15,19 +15,44 @@</span><br><span> * GNU General Public License for more details.</span><br><span> */</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#include <stdint.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/acpi.h></span><br><span> #include <arch/acpigen.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <bootmode.h></span><br><span> #include <console/console.h></span><br><span> #include <fsp/util.h></span><br><span> #include <device/device.h></span><br><span> #include <device/pci.h></span><br><span> #include <intelblocks/graphics.h></span><br><span> #include <drivers/intel/gma/opregion.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <drivers/intel/gma/libgfxinit.h></span><br><span> </span><br><span> uintptr_t fsp_soc_get_igd_bar(void)</span><br><span> {</span><br><span> return graphics_get_memory_base();</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+void graphics_soc_init(struct device *const dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ if (IS_ENABLED(CONFIG_RUN_FSP_GOP))</span><br><span style="color: hsl(120, 100%, 40%);">+ return;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t reg32 = pci_read_config32(dev, PCI_COMMAND);</span><br><span style="color: hsl(120, 100%, 40%);">+ reg32 |= PCI_COMMAND_MASTER;</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config32(dev, PCI_COMMAND, reg32);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (!acpi_is_wakeup_s3() && display_init_required()) {</span><br><span style="color: hsl(120, 100%, 40%);">+ int lightup_ok;</span><br><span style="color: hsl(120, 100%, 40%);">+ gma_gfxinit(&lightup_ok);</span><br><span style="color: hsl(120, 100%, 40%);">+ gfx_set_init_done(lightup_ok);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Initialize PCI device, load/execute BIOS Option ROM */</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_dev_init(dev);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> uintptr_t graphics_soc_write_acpi_opregion(struct device *device,</span><br><span> uintptr_t current, struct acpi_rsdp *rsdp)</span><br><span> {</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/29903">change 29903</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/c/coreboot/+/29903"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: I7b111f1cdac4d18f2fc3089f57aebf3ad1739e5d </div>
<div style="display:none"> Gerrit-Change-Number: 29903 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Nico Huber <nico.h@gmx.de> </div>
<div style="display:none"> Gerrit-Reviewer: Nico Huber <nico.h@gmx.de> </div>
<div style="display:none"> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>