<p>Furquan Shaikh has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/c/coreboot/+/29780">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/google/octopus: Configure all debug header lines as NC<br><br>This change configures all the pads going to debug header as not<br>connected.<br><br>BUG=b:111569213<br>BRANCH=None<br>TEST=None<br><br>Change-Id: Ie3ffdbf6ad9b1682deaada91b5c225b4c8dd035b<br>Signed-off-by: Furquan Shaikh <furquan@google.com><br>---<br>M src/mainboard/google/octopus/variants/baseboard/gpio.c<br>1 file changed, 43 insertions(+), 43 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/29780/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c</span><br><span>index 8af11bf..c8b36ef 100644</span><br><span>--- a/src/mainboard/google/octopus/variants/baseboard/gpio.c</span><br><span>+++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c</span><br><span>@@ -25,50 +25,50 @@</span><br><span> */</span><br><span> static const struct pad_config gpio_table[] = {</span><br><span> /* NORTHWEST COMMUNITY GPIOS */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_0, NONE, DEEP, NF1), /* TCK */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_1, DN_20K, DEEP, NF1), /* TRST_B */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_2, NONE, DEEP, NF1), /* TMS */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_3, NONE, DEEP, NF1), /* TDI */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_4, NONE, DEEP, NF1), /* TDO */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_0, DN_20K), /* TCK -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_1, DN_20K), /* TRST_B -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_2, UP_20K), /* TMS -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_3, UP_20K), /* TDI -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_4, UP_20K), /* TDO -- debug header NC */</span><br><span> PAD_NC(GPIO_5, UP_20K), /* JTAGX -- unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_6, NONE, DEEP, NF1), /* CX_PREQ_B */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_7, NONE, DEEP, NF1), /* CX_PRDY_B */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_8, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_CLK_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_9, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA0_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_10, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA1_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_11, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA2_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_12, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA3_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_13, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA4_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_14, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA5_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_15, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA6_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_16, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA7_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_17, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* DBG_PTI_CLK_1 */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_18, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* DBG_PTI_DATA_8 */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_19, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* DBG_PTI_DATA_9 */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_20, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* DBG_PTI_DATA_10 */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_6, UP_20K), /* CX_PREQ_B -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_7, UP_20K), /* CX_PRDY_B -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_8, DN_20K), /* TRACE_0_CLK_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_9, DN_20K), /* TRACE_0_DATA0_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_10, DN_20K), /* TRACE_0_DATA1_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_11, DN_20K), /* TRACE_0_DATA2_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_12, DN_20K), /* TRACE_0_DATA3_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_13, DN_20K), /* TRACE_0_DATA4_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_14, DN_20K), /* TRACE_0_DATA5_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_15, DN_20K), /* TRACE_0_DATA6_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_16, DN_20K), /* TRACE_0_DATA7_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_17, UP_20K), /* DBG_PTI_CLK_1 -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_18, UP_20K), /* DBG_PTI_DATA_8 -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_19, UP_20K), /* DBG_PTI_DATA_9 -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_20, UP_20K), /* DBG_PTI_DATA_10 -- debug header NC */</span><br><span> PAD_CFG_NF(GPIO_21, UP_20K, DEEP, NF2), /* CNV_MFUART2_RXD */</span><br><span> PAD_CFG_NF_IOSSTATE(GPIO_22, UP_20K, DEEP, NF2, TxDRxE), /* CNV_MFUART2_TXD */</span><br><span> PAD_CFG_NF(GPIO_23, UP_20K, DEEP, NF2), /* CNV_GNSS_PABLANKIt */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_24, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_1_DATA6_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_25, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_1_DATA7_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_26, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_2_CLK_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_27, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_2_DATA0_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_28, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_2_DATA1_VNN 0*/</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_29, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_2_DATA2_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_30, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_2_DATA3_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_31, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_2_DATA4_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_32, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_2_DATA5_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_33, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_2_DATA6_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_34, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_2_DATA7_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_35, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_3_CLK_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_36, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_3_DATA0_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_37, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_3_DATA1_VNN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_38, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_3_DATA2_VNN */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_24,UP_20K), /* TRACE_1_DATA6_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_25,UP_20K), /* TRACE_1_DATA7_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_26, DN_20K), /* TRACE_2_CLK_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_27, DN_20K), /* TRACE_2_DATA0_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_28, DN_20K), /* TRACE_2_DATA1_VNN 0-- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_29, DN_20K), /* TRACE_2_DATA2_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_30, DN_20K), /* TRACE_2_DATA3_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_31, DN_20K), /* TRACE_2_DATA4_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_32, DN_20K), /* TRACE_2_DATA5_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_33, DN_20K), /* TRACE_2_DATA6_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_34, DN_20K), /* TRACE_2_DATA7_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_35, UP_20K), /* TRACE_3_CLK_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_36, UP_20K), /* TRACE_3_DATA0_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_37, UP_20K), /* TRACE_3_DATA1_VNN -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_38, UP_20K), /* TRACE_3_DATA2_VNN -- debug header NC */</span><br><span> PAD_NC(GPIO_39, UP_20K), /* TRACE_3_DATA3_VNN -- unused */</span><br><span> PAD_NC(GPIO_40, UP_20K), /* TRACE_3_DATA4_VNN -- unused */</span><br><span> PAD_NC(GPIO_41, DN_20K), /* TRACE_3_DATA5_VNN -- unused */</span><br><span> PAD_NC(GPIO_42, DN_20K), /* GP_INTD_DSI_TE1 -- unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_43, DN_20K, DEEP, NF1, HIZCRx0, DISPUPD), /* GP_INTD_DSI_TE2 */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_43, DN_20K), /* GP_INTD_DSI_TE2 -- debug header NC */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_44, UP_20K, DEEP, NF1, TxDRxE, ENPU), /* USB_OC0_B */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_45, UP_20K, DEEP, NF1, TxDRxE, ENPU), /* USB_OC1_B */</span><br><span> PAD_NC(GPIO_46, DN_20K), /* DSI_I2C_SDA -- unused */</span><br><span>@@ -83,12 +83,12 @@</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_53, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_I2C1_SCL */</span><br><span> PAD_NC(GPIO_54, UP_20K), /* LPSS_I2C2_SDA -- unused */</span><br><span> PAD_NC(GPIO_55, UP_20K), /* LPSS_I2C2_SCL -- unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_56, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_I2C3_SDA */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_57, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_I2C2_SCL */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_NC(GPIO_58, UP_20K), /* LPSS_I2C4_SDA - unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_NC(GPIO_59, UP_20K), /* LPSS_I2C4_SCL - unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_60, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART0_RXD */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_61, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART0_TXD */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_56, UP_20K), /* LPSS_I2C3_SDA -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_57, UP_20K), /* LPSS_I2C2_SCL -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_58, UP_20K), /* LPSS_I2C4_SDA -- unused */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_59, UP_20K), /* LPSS_I2C4_SCL -- unused */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_60, UP_20K), /* LPSS_UART0_RXD -- debug header NC */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_61, UP_20K), /* LPSS_UART0_TXD -- debug header NC */</span><br><span> PAD_NC(GPIO_62, UP_20K), /* UART0-RTS_B -- unused */</span><br><span> PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD), /* H1_PCH_INT_ODL */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_64, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART2_RXD */</span><br><span>@@ -118,7 +118,7 @@</span><br><span> /* LPSS */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_79, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* H1_SLAVE_SPI_CLK_R */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_80, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* H1_SLAVE_SPI_CS_L_R */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPIO_HI_Z(GPIO_81, UP_20K, DEEP, HIZCRx0, DISPUPD), /* GPIO_81_DEBUG (Boot halt) -- MIPI60 DEBUG */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_NC(GPIO_81, DN_20K), /* GPIO_81_DEBUG -- debug header NC */</span><br><span> PAD_CFG_NF(GPIO_82, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MISO */</span><br><span> PAD_CFG_NF(GPIO_83, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MOSI_R */</span><br><span> PAD_NC(GPIO_84, DN_20K), /* LPSS_SPI_2_CLK - unused */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/29780">change 29780</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: Ie3ffdbf6ad9b1682deaada91b5c225b4c8dd035b </div>
<div style="display:none"> Gerrit-Change-Number: 29780 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Furquan Shaikh <furquan@google.com> </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>