<p><a href="https://review.coreboot.org/29662">View Change</a></p><p>2 comments:</p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/29662/5/src/soc/intel/braswell/bootblock/cache_as_ram_cbootblock.S">File src/soc/intel/braswell/bootblock/cache_as_ram_cbootblock.S:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/29662/5/src/soc/intel/braswell/bootblock/cache_as_ram_cbootblock.S@21">Patch Set #5, Line 21:</a> <code style="font-family:monospace,monospace">#include <device/pci_def.h></code></p><p><blockquote style="border-left: 1px solid #aaa; margin: 10px 0; padding: 0 10px;">that looks like a copy of drivers/intel/fsp1_1/cache_as_ram.inc. […]</blockquote></p><p style="white-space: pre-wrap; word-wrap: break-word;">Specific support (provide timestamp, bootblock_pre_c_entry label) for C bootblock is required.</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/29662/2/src/soc/intel/braswell/romstage/car_stage.S">File src/soc/intel/braswell/romstage/car_stage.S:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/29662/2/src/soc/intel/braswell/romstage/car_stage.S@23">Patch Set #2, Line 23:</a> <code style="font-family:monospace,monospace"></code></p><p><blockquote style="border-left: 1px solid #aaa; margin: 10px 0; padding: 0 10px;">What I meant is 2. Replace all occurence of romstage_c_entry on braswell with car_stage_c_entry. […]</blockquote></p><p style="white-space: pre-wrap; word-wrap: break-word;">Replacing with car_stage_c_entry() results into a build error on the Intel Quark platforms which have this function in SoC and uses FSP1.1</p></li></ul></li></ul><p>To view, visit <a href="https://review.coreboot.org/29662">change 29662</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/29662"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: comment </div>
<div style="display:none"> Gerrit-Change-Id: Iab48ad72f1514c93f20d70db5ef4fd8fa2383e8c </div>
<div style="display:none"> Gerrit-Change-Number: 29662 </div>
<div style="display:none"> Gerrit-PatchSet: 5 </div>
<div style="display:none"> Gerrit-Owner: Frans Hendriks <fhendriks@eltan.com> </div>
<div style="display:none"> Gerrit-Reviewer: Frans Hendriks <fhendriks@eltan.com> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>
<div style="display:none"> Gerrit-CC: Patrick Rudolph <siro@das-labor.org> </div>
<div style="display:none"> Gerrit-Comment-Date: Mon, 19 Nov 2018 14:38:21 +0000 </div>
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