<p>Nico Huber has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29680">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">Kconfig: Unify power-after-failure options<br><br>The newest and most useful incarnation was hiding in soc/intel/common/.<br>We move it into the Mainboard menu and extend it with various flags to<br>be selected to control the default and which options are visible. Also<br>add a new `int` config MAINBOARD_POWER_FAILURE_STATE that moves the<br>boolean to int conversion into Kconfig:<br>  0 - S5<br>  1 - S1<br>  2 - previous state<br><br>This patch focuses on the Kconfig code. The C code could be unified as<br>well, e.g. starting with a common enum and safe wrapper around the<br>get_option() call.<br><br>TEST=Did what-jenkins-does with and without this commit and compared<br>     binaries. Nothing changed for the default configurations.<br><br>Change-Id: I61259f864c8a8cfc7099cc2699059f972fa056c0<br>Signed-off-by: Nico Huber <nico.h@gmx.de><br>---<br>M src/mainboard/Kconfig<br>M src/mainboard/asus/kcma-d8/Kconfig<br>M src/mainboard/asus/kfsn4-dre/Kconfig<br>M src/mainboard/asus/kgpe-d16/Kconfig<br>M src/mainboard/msi/ms9652_fam10/Kconfig<br>M src/mainboard/samsung/lumpy/Kconfig<br>M src/mainboard/samsung/stumpy/Kconfig<br>M src/soc/intel/broadwell/Kconfig<br>M src/soc/intel/broadwell/lpc.c<br>M src/soc/intel/broadwell/smihandler.c<br>M src/soc/intel/common/block/include/intelblocks/pmclib.h<br>M src/soc/intel/common/block/pmc/Kconfig<br>M src/soc/intel/common/block/pmc/pmclib.c<br>M src/southbridge/amd/agesa/hudson/sm.c<br>M src/southbridge/amd/amd8111/Kconfig<br>M src/southbridge/amd/amd8111/acpi.c<br>M src/southbridge/amd/pi/hudson/sm.c<br>M src/southbridge/amd/sb700/Kconfig<br>M src/southbridge/amd/sb700/sm.c<br>M src/southbridge/amd/sb800/sm.c<br>M src/southbridge/intel/bd82x6x/lpc.c<br>M src/southbridge/intel/common/Kconfig<br>M src/southbridge/intel/common/pmutil.h<br>M src/southbridge/intel/common/smihandler.c<br>M src/southbridge/intel/fsp_bd82x6x/Kconfig<br>M src/southbridge/intel/fsp_bd82x6x/lpc.c<br>M src/southbridge/intel/fsp_bd82x6x/pch.h<br>M src/southbridge/intel/fsp_bd82x6x/smihandler.c<br>M src/southbridge/intel/fsp_i89xx/Kconfig<br>M src/southbridge/intel/fsp_i89xx/lpc.c<br>M src/southbridge/intel/fsp_i89xx/pch.h<br>M src/southbridge/intel/fsp_i89xx/smihandler.c<br>M src/southbridge/intel/fsp_rangeley/soc.h<br>M src/southbridge/intel/i82801dx/Kconfig<br>M src/southbridge/intel/i82801dx/i82801dx.h<br>M src/southbridge/intel/i82801dx/lpc.c<br>M src/southbridge/intel/i82801dx/smihandler.c<br>M src/southbridge/intel/i82801gx/Kconfig<br>M src/southbridge/intel/i82801gx/i82801gx.h<br>M src/southbridge/intel/i82801gx/lpc.c<br>M src/southbridge/intel/i82801gx/smihandler.c<br>M src/southbridge/intel/i82801ix/i82801ix.h<br>M src/southbridge/intel/i82801ix/lpc.c<br>M src/southbridge/intel/i82801jx/Kconfig<br>M src/southbridge/intel/i82801jx/i82801jx.h<br>M src/southbridge/intel/i82801jx/lpc.c<br>M src/southbridge/intel/ibexpeak/Kconfig<br>M src/southbridge/intel/ibexpeak/lpc.c<br>M src/southbridge/intel/ibexpeak/pch.h<br>M src/southbridge/intel/ibexpeak/smihandler.c<br>M src/southbridge/intel/lynxpoint/Kconfig<br>M src/southbridge/intel/lynxpoint/lpc.c<br>M src/southbridge/intel/lynxpoint/pch.h<br>M src/southbridge/intel/lynxpoint/smihandler.c<br>M src/southbridge/nvidia/ck804/Kconfig<br>M src/southbridge/nvidia/ck804/lpc.c<br>M src/southbridge/nvidia/mcp55/Kconfig<br>M src/southbridge/nvidia/mcp55/lpc.c<br>M src/superio/nuvoton/nct5572d/Kconfig<br>M src/superio/nuvoton/nct5572d/superio.c<br>M src/superio/winbond/w83667hg-a/Kconfig<br>M src/superio/winbond/w83667hg-a/superio.c<br>62 files changed, 145 insertions(+), 171 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/29680/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/Kconfig b/src/mainboard/Kconfig</span><br><span>index 04dca4a..cd488f2 100644</span><br><span>--- a/src/mainboard/Kconfig</span><br><span>+++ b/src/mainboard/Kconfig</span><br><span>@@ -180,3 +180,59 @@</span><br><span> config ENABLE_POWER_BUTTON</span><br><span>   def_bool y if !POWER_BUTTON_IS_OPTIONAL && POWER_BUTTON_FORCE_ENABLE</span><br><span>         def_bool n if !POWER_BUTTON_IS_OPTIONAL && POWER_BUTTON_FORCE_DISABLE</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+        bool</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+if HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+   bool</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config POWER_STATE_DEFAULT_ON_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+   bool</span><br><span style="color: hsl(120, 100%, 40%);">+  help</span><br><span style="color: hsl(120, 100%, 40%);">+    Selected by mainboards that want to override a "default off"</span><br><span style="color: hsl(120, 100%, 40%);">+        that was set at chip level.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ bool</span><br><span style="color: hsl(120, 100%, 40%);">+  help</span><br><span style="color: hsl(120, 100%, 40%);">+    Selected by mainboards or chips that want a "default off" behaviour.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+choice</span><br><span style="color: hsl(120, 100%, 40%);">+    prompt "System Power State after Failure"</span><br><span style="color: hsl(120, 100%, 40%);">+   default POWER_STATE_OFF_AFTER_FAILURE \</span><br><span style="color: hsl(120, 100%, 40%);">+               if !POWER_STATE_DEFAULT_ON_AFTER_FAILURE && \</span><br><span style="color: hsl(120, 100%, 40%);">+            POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+      default POWER_STATE_ON_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config POWER_STATE_OFF_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+  bool "S5 Soft Off"</span><br><span style="color: hsl(120, 100%, 40%);">+  help</span><br><span style="color: hsl(120, 100%, 40%);">+    Choose this option if you want to put system into</span><br><span style="color: hsl(120, 100%, 40%);">+     S5 after reapplying power after failure.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config POWER_STATE_ON_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+     bool "S0 Full On"</span><br><span style="color: hsl(120, 100%, 40%);">+   help</span><br><span style="color: hsl(120, 100%, 40%);">+    Choose this option if you want to keep system in</span><br><span style="color: hsl(120, 100%, 40%);">+      S0 after reapplying power after failure.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+       bool "Keep Previous State"</span><br><span style="color: hsl(120, 100%, 40%);">+  depends on HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+    help</span><br><span style="color: hsl(120, 100%, 40%);">+    Choose this option if you want to keep system in the</span><br><span style="color: hsl(120, 100%, 40%);">+          same power state as before failure after reapplying</span><br><span style="color: hsl(120, 100%, 40%);">+   power.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+endchoice</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config MAINBOARD_POWER_FAILURE_STATE</span><br><span style="color: hsl(120, 100%, 40%);">+ int</span><br><span style="color: hsl(120, 100%, 40%);">+   default 2 if POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+       default 1 if POWER_STATE_ON_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+     default 0</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+endif # HAVE_POWER_STATE_AFTER_FAILURE</span><br><span>diff --git a/src/mainboard/asus/kcma-d8/Kconfig b/src/mainboard/asus/kcma-d8/Kconfig</span><br><span>index f20cf21..712755e 100644</span><br><span>--- a/src/mainboard/asus/kcma-d8/Kconfig</span><br><span>+++ b/src/mainboard/asus/kcma-d8/Kconfig</span><br><span>@@ -32,6 +32,7 @@</span><br><span>         select DRIVERS_ASPEED_AST2050</span><br><span>        select MAINBOARD_FORCE_NATIVE_VGA_INIT</span><br><span>       select MAINBOARD_HAS_NATIVE_VGA_INIT</span><br><span style="color: hsl(120, 100%, 40%);">+  select POWER_STATE_DEFAULT_ON_AFTER_FAILURE</span><br><span> </span><br><span> config MAINBOARD_DIR</span><br><span>      string</span><br><span>@@ -90,10 +91,6 @@</span><br><span>  bool</span><br><span>         default y</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">- bool</span><br><span style="color: hsl(0, 100%, 40%);">-    default y</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> config MAX_REBOOT_CNT</span><br><span>   int</span><br><span>  default 10</span><br><span>diff --git a/src/mainboard/asus/kfsn4-dre/Kconfig b/src/mainboard/asus/kfsn4-dre/Kconfig</span><br><span>index 55bd5c3..1597d1c 100644</span><br><span>--- a/src/mainboard/asus/kfsn4-dre/Kconfig</span><br><span>+++ b/src/mainboard/asus/kfsn4-dre/Kconfig</span><br><span>@@ -19,6 +19,7 @@</span><br><span>  select ENABLE_APIC_EXT_ID</span><br><span>    select DRIVERS_I2C_W83793</span><br><span>    select DRIVERS_XGI_Z9S</span><br><span style="color: hsl(120, 100%, 40%);">+        select POWER_STATE_DEFAULT_ON_AFTER_FAILURE</span><br><span> </span><br><span> config MAINBOARD_DIR</span><br><span>      string</span><br><span>@@ -80,10 +81,6 @@</span><br><span>  bool</span><br><span>         default y</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">- bool</span><br><span style="color: hsl(0, 100%, 40%);">-    default y</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> config MAX_REBOOT_CNT</span><br><span>   int</span><br><span>  default 10</span><br><span>diff --git a/src/mainboard/asus/kgpe-d16/Kconfig b/src/mainboard/asus/kgpe-d16/Kconfig</span><br><span>index 8028849..b21f8ad 100644</span><br><span>--- a/src/mainboard/asus/kgpe-d16/Kconfig</span><br><span>+++ b/src/mainboard/asus/kgpe-d16/Kconfig</span><br><span>@@ -33,6 +33,7 @@</span><br><span>      select DRIVERS_ASPEED_AST2050</span><br><span>        select MAINBOARD_FORCE_NATIVE_VGA_INIT</span><br><span>       select MAINBOARD_HAS_NATIVE_VGA_INIT</span><br><span style="color: hsl(120, 100%, 40%);">+  select POWER_STATE_DEFAULT_ON_AFTER_FAILURE</span><br><span> </span><br><span> config MAINBOARD_DIR</span><br><span>      string</span><br><span>@@ -95,10 +96,6 @@</span><br><span>  string</span><br><span>       default "1a03,2000"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-     bool</span><br><span style="color: hsl(0, 100%, 40%);">-    default y</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> config MAX_REBOOT_CNT</span><br><span>   int</span><br><span>  default 10</span><br><span>diff --git a/src/mainboard/msi/ms9652_fam10/Kconfig b/src/mainboard/msi/ms9652_fam10/Kconfig</span><br><span>index 080fc58..6cf8606 100644</span><br><span>--- a/src/mainboard/msi/ms9652_fam10/Kconfig</span><br><span>+++ b/src/mainboard/msi/ms9652_fam10/Kconfig</span><br><span>@@ -20,6 +20,7 @@</span><br><span>  select LIFT_BSP_APIC_ID</span><br><span>      select IOAPIC</span><br><span>        select SMP</span><br><span style="color: hsl(120, 100%, 40%);">+    select POWER_STATE_DEFAULT_ON_AFTER_FAILURE</span><br><span> </span><br><span> config MAINBOARD_DIR</span><br><span>      string</span><br><span>@@ -59,10 +60,6 @@</span><br><span>  int</span><br><span>  default 9</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">- bool</span><br><span style="color: hsl(0, 100%, 40%);">-    default y</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> config USBDEBUG</span><br><span>         bool</span><br><span>         default n</span><br><span>diff --git a/src/mainboard/samsung/lumpy/Kconfig b/src/mainboard/samsung/lumpy/Kconfig</span><br><span>index 9cb0e5f..6829ecc 100644</span><br><span>--- a/src/mainboard/samsung/lumpy/Kconfig</span><br><span>+++ b/src/mainboard/samsung/lumpy/Kconfig</span><br><span>@@ -44,10 +44,6 @@</span><br><span>      string</span><br><span>       default "pci8086,0106.rom"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-      bool</span><br><span style="color: hsl(0, 100%, 40%);">-    default n</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> if EARLY_PCI_BRIDGE</span><br><span> </span><br><span> config EARLY_PCI_BRIDGE_DEVICE</span><br><span>diff --git a/src/mainboard/samsung/stumpy/Kconfig b/src/mainboard/samsung/stumpy/Kconfig</span><br><span>index f0ac4f7..49210bc 100644</span><br><span>--- a/src/mainboard/samsung/stumpy/Kconfig</span><br><span>+++ b/src/mainboard/samsung/stumpy/Kconfig</span><br><span>@@ -42,8 +42,4 @@</span><br><span>      string</span><br><span>       default "pci8086,0106.rom"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-      bool</span><br><span style="color: hsl(0, 100%, 40%);">-    default n</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> endif # BOARD_SAMSUNG_STUMPY</span><br><span>diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig</span><br><span>index 18ec51f..3f06d4a 100644</span><br><span>--- a/src/soc/intel/broadwell/Kconfig</span><br><span>+++ b/src/soc/intel/broadwell/Kconfig</span><br><span>@@ -40,6 +40,9 @@</span><br><span>       select HAVE_SPI_CONSOLE_SUPPORT</span><br><span>      select CPU_INTEL_COMMON</span><br><span>      select INTEL_GMA_ACPI</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+        select POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span> </span><br><span> config PCIEXP_ASPM</span><br><span>       bool</span><br><span>diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c</span><br><span>index 87aaf6b..762198b1 100644</span><br><span>--- a/src/soc/intel/broadwell/lpc.c</span><br><span>+++ b/src/soc/intel/broadwell/lpc.c</span><br><span>@@ -152,7 +152,7 @@</span><br><span>         const char *state;</span><br><span>   /* Get the chip configuration */</span><br><span>     config_t *config = dev->chip_info;</span><br><span style="color: hsl(0, 100%, 40%);">-   int pwr_on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+      int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span> </span><br><span>       /* Which state do we want to goto after g3 (power restored)?</span><br><span>          * 0 == S0 Full On</span><br><span>diff --git a/src/soc/intel/broadwell/smihandler.c b/src/soc/intel/broadwell/smihandler.c</span><br><span>index 24f6a3d..1ba2bdd 100644</span><br><span>--- a/src/soc/intel/broadwell/smihandler.c</span><br><span>+++ b/src/soc/intel/broadwell/smihandler.c</span><br><span>@@ -156,7 +156,7 @@</span><br><span>        u8 reg8;</span><br><span>     u32 reg32;</span><br><span>   u8 slp_typ;</span><br><span style="color: hsl(0, 100%, 40%);">-     u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+        u8 s5pwr = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span> </span><br><span>         /* save and recover RTC port values */</span><br><span>       u8 tmp70, tmp72;</span><br><span>diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h</span><br><span>index 9b21010..4569525 100644</span><br><span>--- a/src/soc/intel/common/block/include/intelblocks/pmclib.h</span><br><span>+++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h</span><br><span>@@ -213,6 +213,7 @@</span><br><span>  * 0 == S5 Soft Off</span><br><span>  * 1 == S0 Full On</span><br><span>  * 2 == Keep Previous State</span><br><span style="color: hsl(120, 100%, 40%);">+ * Keep in sync with `config MAINBOARD_POWER_FAILURE_STATE`.</span><br><span>  */</span><br><span> enum {</span><br><span>   MAINBOARD_POWER_STATE_OFF,</span><br><span>diff --git a/src/soc/intel/common/block/pmc/Kconfig b/src/soc/intel/common/block/pmc/Kconfig</span><br><span>index 2f08408..244f59c 100644</span><br><span>--- a/src/soc/intel/common/block/pmc/Kconfig</span><br><span>+++ b/src/soc/intel/common/block/pmc/Kconfig</span><br><span>@@ -2,35 +2,12 @@</span><br><span>  depends on SOC_INTEL_COMMON_BLOCK_GPIO</span><br><span>       depends on ACPI_INTEL_HARDWARE_SLEEP_VALUES</span><br><span>  bool</span><br><span style="color: hsl(120, 100%, 40%);">+  select HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span>       help</span><br><span>           Intel Processor common code for Power Management controller(PMC)</span><br><span>     subsystem</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-choice</span><br><span style="color: hsl(0, 100%, 40%);">-   prompt "System Power State after Failure"</span><br><span style="color: hsl(0, 100%, 40%);">-     default POWER_STATE_ON_AFTER_FAILURE</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-config POWER_STATE_OFF_AFTER_FAILURE</span><br><span style="color: hsl(0, 100%, 40%);">-        bool "S5 Soft Off"</span><br><span style="color: hsl(0, 100%, 40%);">-    help</span><br><span style="color: hsl(0, 100%, 40%);">-      Choose this option if you want to keep system into</span><br><span style="color: hsl(0, 100%, 40%);">-      S5 after reapplying power after failure</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-config POWER_STATE_ON_AFTER_FAILURE</span><br><span style="color: hsl(0, 100%, 40%);">-    bool "S0 Full On"</span><br><span style="color: hsl(0, 100%, 40%);">-     help</span><br><span style="color: hsl(0, 100%, 40%);">-      Choose this option if you want to keep system into</span><br><span style="color: hsl(0, 100%, 40%);">-      S0 after reapplying power after failure</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-config POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(0, 100%, 40%);">-      bool "Keep Previous State"</span><br><span style="color: hsl(0, 100%, 40%);">-    help</span><br><span style="color: hsl(0, 100%, 40%);">-      Choose this option if you want to keep system into</span><br><span style="color: hsl(0, 100%, 40%);">-      same power state as before failure even after reapplying</span><br><span style="color: hsl(0, 100%, 40%);">-        power</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-endchoice</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> config PMC_INVALID_READ_AFTER_WRITE</span><br><span>      bool</span><br><span>         default n</span><br><span>diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c</span><br><span>index ef4384d..dcc7cc9 100644</span><br><span>--- a/src/soc/intel/common/block/pmc/pmclib.c</span><br><span>+++ b/src/soc/intel/common/block/pmc/pmclib.c</span><br><span>@@ -587,10 +587,5 @@</span><br><span>  */</span><br><span> int pmc_get_mainboard_power_failure_state_choice(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE))</span><br><span style="color: hsl(0, 100%, 40%);">-              return MAINBOARD_POWER_STATE_PREVIOUS;</span><br><span style="color: hsl(0, 100%, 40%);">-  else if (IS_ENABLED(CONFIG_POWER_STATE_ON_AFTER_FAILURE))</span><br><span style="color: hsl(0, 100%, 40%);">-               return MAINBOARD_POWER_STATE_ON;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-        return MAINBOARD_POWER_STATE_OFF;</span><br><span style="color: hsl(120, 100%, 40%);">+     return CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span> }</span><br><span>diff --git a/src/southbridge/amd/agesa/hudson/sm.c b/src/southbridge/amd/agesa/hudson/sm.c</span><br><span>index 08ec59f..3250585 100644</span><br><span>--- a/src/southbridge/amd/agesa/hudson/sm.c</span><br><span>+++ b/src/southbridge/amd/agesa/hudson/sm.c</span><br><span>@@ -31,10 +31,6 @@</span><br><span> #define MAINBOARD_POWER_OFF 0</span><br><span> #define MAINBOARD_POWER_ON 1</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> #define BIT0       (1 << 0)</span><br><span> #define BIT1  (1 << 1)</span><br><span> #define BIT2  (1 << 2)</span><br><span>diff --git a/src/southbridge/amd/amd8111/Kconfig b/src/southbridge/amd/amd8111/Kconfig</span><br><span>index 1436d8c..9764c95 100644</span><br><span>--- a/src/southbridge/amd/amd8111/Kconfig</span><br><span>+++ b/src/southbridge/amd/amd8111/Kconfig</span><br><span>@@ -16,6 +16,8 @@</span><br><span> config SOUTHBRIDGE_AMD_AMD8111</span><br><span>        bool</span><br><span>         select IOAPIC</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ select POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span> </span><br><span> config BOOTBLOCK_SOUTHBRIDGE_INIT</span><br><span>        string</span><br><span>diff --git a/src/southbridge/amd/amd8111/acpi.c b/src/southbridge/amd/amd8111/acpi.c</span><br><span>index 8dc2007..5216a10 100644</span><br><span>--- a/src/southbridge/amd/amd8111/acpi.c</span><br><span>+++ b/src/southbridge/amd/amd8111/acpi.c</span><br><span>@@ -29,11 +29,6 @@</span><br><span> #define SLOW_CPU_OFF 0</span><br><span> #define SLOW_CPU__ON 1</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> static int lsmbus_recv_byte(struct device *dev)</span><br><span> {</span><br><span>        unsigned int device;</span><br><span>@@ -148,7 +143,7 @@</span><br><span>   pci_write_config8(dev, 0x41, byte | (1<<6)|(1<<5));</span><br><span> </span><br><span>  /* power on after power fail */</span><br><span style="color: hsl(0, 100%, 40%);">- on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+      on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>   get_option(&on, "power_on_after_fail");</span><br><span>        byte = pci_read_config8(dev, PREVIOUS_POWER_STATE);</span><br><span>  byte &= ~0x40;</span><br><span>diff --git a/src/southbridge/amd/pi/hudson/sm.c b/src/southbridge/amd/pi/hudson/sm.c</span><br><span>index 3625f8a..5c809d6 100644</span><br><span>--- a/src/southbridge/amd/pi/hudson/sm.c</span><br><span>+++ b/src/southbridge/amd/pi/hudson/sm.c</span><br><span>@@ -31,10 +31,6 @@</span><br><span> #define MAINBOARD_POWER_OFF 0</span><br><span> #define MAINBOARD_POWER_ON 1</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /*</span><br><span> * HUDSON enables all USB controllers by default in SMBUS Control.</span><br><span> * HUDSON enables SATA by default in SMBUS Control.</span><br><span>diff --git a/src/southbridge/amd/sb700/Kconfig b/src/southbridge/amd/sb700/Kconfig</span><br><span>index 6d62e67..78332cf 100644</span><br><span>--- a/src/southbridge/amd/sb700/Kconfig</span><br><span>+++ b/src/southbridge/amd/sb700/Kconfig</span><br><span>@@ -23,6 +23,9 @@</span><br><span>         select IOAPIC</span><br><span>        select HAVE_USBDEBUG_OPTIONS</span><br><span>         select SMBUS_HAS_AUX_CHANNELS</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+        select POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span> </span><br><span> config SOUTHBRIDGE_AMD_SB700_33MHZ_SPI</span><br><span>   bool "Enable high speed SPI clock"</span><br><span>diff --git a/src/southbridge/amd/sb700/sm.c b/src/southbridge/amd/sb700/sm.c</span><br><span>index 64c6db3..4c3992d 100644</span><br><span>--- a/src/southbridge/amd/sb700/sm.c</span><br><span>+++ b/src/southbridge/amd/sb700/sm.c</span><br><span>@@ -44,10 +44,6 @@</span><br><span>       POWER_MODE_LAST = 2,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL POWER_MODE_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> static const char *power_mode_names[] = {</span><br><span>  [POWER_MODE_OFF] = "off",</span><br><span>  [POWER_MODE_ON] = "on",</span><br><span>@@ -152,11 +148,11 @@</span><br><span>    pm_iowrite(0x53, byte);</span><br><span> </span><br><span>  /* power after power fail */</span><br><span style="color: hsl(0, 100%, 40%);">-    power_state = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+     power_state = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>  get_option(&power_state, "power_on_after_fail");</span><br><span>       if (power_state > 2) {</span><br><span>            printk(BIOS_WARNING, "Invalid power_on_after_fail setting, using default\n");</span><br><span style="color: hsl(0, 100%, 40%);">-         power_state = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+             power_state = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>  }</span><br><span>    byte = pm_ioread(0x74);</span><br><span>      byte &= ~0x03;</span><br><span>diff --git a/src/southbridge/amd/sb800/sm.c b/src/southbridge/amd/sb800/sm.c</span><br><span>index fdb6283..1d2daed8 100644</span><br><span>--- a/src/southbridge/amd/sb800/sm.c</span><br><span>+++ b/src/southbridge/amd/sb800/sm.c</span><br><span>@@ -32,10 +32,6 @@</span><br><span> #define MAINBOARD_POWER_OFF 0</span><br><span> #define MAINBOARD_POWER_ON 1</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> #define BIT0 (1 << 0)</span><br><span> #define BIT1  (1 << 1)</span><br><span> #define BIT2  (1 << 2)</span><br><span>diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c</span><br><span>index 7ae538e..bee82b9 100644</span><br><span>--- a/src/southbridge/intel/bd82x6x/lpc.c</span><br><span>+++ b/src/southbridge/intel/bd82x6x/lpc.c</span><br><span>@@ -181,7 +181,7 @@</span><br><span>        /* Get the chip configuration */</span><br><span>     config_t *config = dev->chip_info;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-       int pwr_on=CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+        int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>   int nmi_option;</span><br><span> </span><br><span>  /* Which state do we want to goto after g3 (power restored)?</span><br><span>diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig</span><br><span>index 957faa5..951aecb 100644</span><br><span>--- a/src/southbridge/intel/common/Kconfig</span><br><span>+++ b/src/southbridge/intel/common/Kconfig</span><br><span>@@ -29,6 +29,9 @@</span><br><span> </span><br><span> config SOUTHBRIDGE_INTEL_COMMON_SMM</span><br><span>     def_bool n</span><br><span style="color: hsl(120, 100%, 40%);">+    select HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+        select POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span> </span><br><span> config SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT</span><br><span>        bool</span><br><span>diff --git a/src/southbridge/intel/common/pmutil.h b/src/southbridge/intel/common/pmutil.h</span><br><span>index c578982..8b71627 100644</span><br><span>--- a/src/southbridge/intel/common/pmutil.h</span><br><span>+++ b/src/southbridge/intel/common/pmutil.h</span><br><span>@@ -35,10 +35,6 @@</span><br><span> #define MAINBOARD_POWER_ON        1</span><br><span> #define MAINBOARD_POWER_KEEP       2</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> #define PM1_STS           0x00</span><br><span> #define   WAK_STS       (1 << 15)</span><br><span> #define   PCIEXPWAK_STS      (1 << 14)</span><br><span>diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c</span><br><span>index 0ad400c..3d51257 100644</span><br><span>--- a/src/southbridge/intel/common/smihandler.c</span><br><span>+++ b/src/southbridge/intel/common/smihandler.c</span><br><span>@@ -112,7 +112,7 @@</span><br><span>       u8 reg8;</span><br><span>     u32 reg32;</span><br><span>   u8 slp_typ;</span><br><span style="color: hsl(0, 100%, 40%);">-     u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+        u8 s5pwr = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span> </span><br><span>         // save and recover RTC port values</span><br><span>  u8 tmp70, tmp72;</span><br><span>diff --git a/src/southbridge/intel/fsp_bd82x6x/Kconfig b/src/southbridge/intel/fsp_bd82x6x/Kconfig</span><br><span>index 52810ab..7445012 100644</span><br><span>--- a/src/southbridge/intel/fsp_bd82x6x/Kconfig</span><br><span>+++ b/src/southbridge/intel/fsp_bd82x6x/Kconfig</span><br><span>@@ -33,6 +33,9 @@</span><br><span>        select SOUTHBRIDGE_INTEL_COMMON_SMBUS</span><br><span>        select SOUTHBRIDGE_INTEL_COMMON_SPI</span><br><span>  select HAVE_INTEL_CHIPSET_LOCKDOWN</span><br><span style="color: hsl(120, 100%, 40%);">+    select HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+        select POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span> </span><br><span> config EHCI_BAR</span><br><span>  hex</span><br><span>diff --git a/src/southbridge/intel/fsp_bd82x6x/lpc.c b/src/southbridge/intel/fsp_bd82x6x/lpc.c</span><br><span>index bc9e06b..fa664ad 100644</span><br><span>--- a/src/southbridge/intel/fsp_bd82x6x/lpc.c</span><br><span>+++ b/src/southbridge/intel/fsp_bd82x6x/lpc.c</span><br><span>@@ -192,7 +192,7 @@</span><br><span>   /* Get the chip configuration */</span><br><span>     config_t *config = dev->chip_info;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-       int pwr_on=CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+        int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>   int nmi_option;</span><br><span> </span><br><span>  /* Which state do we want to goto after g3 (power restored)?</span><br><span>diff --git a/src/southbridge/intel/fsp_bd82x6x/pch.h b/src/southbridge/intel/fsp_bd82x6x/pch.h</span><br><span>index 1f1c18a..bfcb9e9 100644</span><br><span>--- a/src/southbridge/intel/fsp_bd82x6x/pch.h</span><br><span>+++ b/src/southbridge/intel/fsp_bd82x6x/pch.h</span><br><span>@@ -96,10 +96,6 @@</span><br><span> #define MAINBOARD_POWER_ON        1</span><br><span> #define MAINBOARD_POWER_KEEP       2</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /* PCI Configuration Space (D30:F0): PCI2PCI */</span><br><span> #define PSTS   0x06</span><br><span> #define SMLT    0x1b</span><br><span>diff --git a/src/southbridge/intel/fsp_bd82x6x/smihandler.c b/src/southbridge/intel/fsp_bd82x6x/smihandler.c</span><br><span>index dedc4be..156c3ec 100644</span><br><span>--- a/src/southbridge/intel/fsp_bd82x6x/smihandler.c</span><br><span>+++ b/src/southbridge/intel/fsp_bd82x6x/smihandler.c</span><br><span>@@ -306,7 +306,7 @@</span><br><span>      u8 reg8;</span><br><span>     u32 reg32;</span><br><span>   u8 slp_typ;</span><br><span style="color: hsl(0, 100%, 40%);">-     u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+        u8 s5pwr = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span> </span><br><span>         // save and recover RTC port values</span><br><span>  u8 tmp70, tmp72;</span><br><span>diff --git a/src/southbridge/intel/fsp_i89xx/Kconfig b/src/southbridge/intel/fsp_i89xx/Kconfig</span><br><span>index 0bc9586..d570068 100644</span><br><span>--- a/src/southbridge/intel/fsp_i89xx/Kconfig</span><br><span>+++ b/src/southbridge/intel/fsp_i89xx/Kconfig</span><br><span>@@ -33,6 +33,9 @@</span><br><span>        select SOUTHBRIDGE_INTEL_COMMON</span><br><span>      select SOUTHBRIDGE_INTEL_COMMON_SMBUS</span><br><span>        select SOUTHBRIDGE_INTEL_COMMON_SPI</span><br><span style="color: hsl(120, 100%, 40%);">+   select HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+        select POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span> </span><br><span> config EHCI_BAR</span><br><span>  hex</span><br><span>diff --git a/src/southbridge/intel/fsp_i89xx/lpc.c b/src/southbridge/intel/fsp_i89xx/lpc.c</span><br><span>index 8019b02..d079328 100644</span><br><span>--- a/src/southbridge/intel/fsp_i89xx/lpc.c</span><br><span>+++ b/src/southbridge/intel/fsp_i89xx/lpc.c</span><br><span>@@ -192,7 +192,7 @@</span><br><span>   /* Get the chip configuration */</span><br><span>     config_t *config = dev->chip_info;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-       int pwr_on=CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+        int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>   int nmi_option;</span><br><span> </span><br><span>  /* Which state do we want to goto after g3 (power restored)?</span><br><span>diff --git a/src/southbridge/intel/fsp_i89xx/pch.h b/src/southbridge/intel/fsp_i89xx/pch.h</span><br><span>index 3382cbd..7b96708 100644</span><br><span>--- a/src/southbridge/intel/fsp_i89xx/pch.h</span><br><span>+++ b/src/southbridge/intel/fsp_i89xx/pch.h</span><br><span>@@ -93,10 +93,6 @@</span><br><span> #define MAINBOARD_POWER_ON        1</span><br><span> #define MAINBOARD_POWER_KEEP       2</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> #define PCH_EHCI1_DEV             PCI_DEV(0, 0x1d, 0)</span><br><span> #define PCH_ME_DEV               PCI_DEV(0, 0x16, 0)</span><br><span> #define PCH_PCIE_DEV_SLOT        28</span><br><span>diff --git a/src/southbridge/intel/fsp_i89xx/smihandler.c b/src/southbridge/intel/fsp_i89xx/smihandler.c</span><br><span>index e22faad..81fdb43 100644</span><br><span>--- a/src/southbridge/intel/fsp_i89xx/smihandler.c</span><br><span>+++ b/src/southbridge/intel/fsp_i89xx/smihandler.c</span><br><span>@@ -305,7 +305,7 @@</span><br><span>        u8 reg8;</span><br><span>     u32 reg32;</span><br><span>   u8 slp_typ;</span><br><span style="color: hsl(0, 100%, 40%);">-     u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+        u8 s5pwr = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span> </span><br><span>         // save and recover RTC port values</span><br><span>  u8 tmp70, tmp72;</span><br><span>diff --git a/src/southbridge/intel/fsp_rangeley/soc.h b/src/southbridge/intel/fsp_rangeley/soc.h</span><br><span>index ffadee4..9d86407 100644</span><br><span>--- a/src/southbridge/intel/fsp_rangeley/soc.h</span><br><span>+++ b/src/southbridge/intel/fsp_rangeley/soc.h</span><br><span>@@ -80,10 +80,6 @@</span><br><span> #define MAINBOARD_POWER_ON        1</span><br><span> #define MAINBOARD_POWER_KEEP       2</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> #define SOC_EHCI1_DEV             PCI_DEV(0, 0x1d, 0)</span><br><span> #define PCIE_DEV_SLOT0   1</span><br><span> #define PCIE_DEV_SLOT1     2</span><br><span>diff --git a/src/southbridge/intel/i82801dx/Kconfig b/src/southbridge/intel/i82801dx/Kconfig</span><br><span>index 827f6bb..f4357b8 100644</span><br><span>--- a/src/southbridge/intel/i82801dx/Kconfig</span><br><span>+++ b/src/southbridge/intel/i82801dx/Kconfig</span><br><span>@@ -22,6 +22,9 @@</span><br><span>   select HAVE_USBDEBUG</span><br><span>         select SOUTHBRIDGE_INTEL_COMMON</span><br><span>      select SOUTHBRIDGE_INTEL_COMMON_SMBUS</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+        select POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span> </span><br><span> if SOUTHBRIDGE_INTEL_I82801DX</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h</span><br><span>index 8c7da55..678d5d7 100644</span><br><span>--- a/src/southbridge/intel/i82801dx/i82801dx.h</span><br><span>+++ b/src/southbridge/intel/i82801dx/i82801dx.h</span><br><span>@@ -45,10 +45,6 @@</span><br><span> #define MAINBOARD_POWER_ON       1</span><br><span> #define MAINBOARD_POWER_KEEP       2</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /*</span><br><span>  * 000 = Non-combined. P0 is primary master. P1 is secondary master.</span><br><span>  * 001 = Non-combined. P0 is secondary master. P1 is primary master.</span><br><span>diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c</span><br><span>index 925251d..3c74e98 100644</span><br><span>--- a/src/southbridge/intel/i82801dx/lpc.c</span><br><span>+++ b/src/southbridge/intel/i82801dx/lpc.c</span><br><span>@@ -103,7 +103,7 @@</span><br><span>  u32 reg32;</span><br><span>   const char *state;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-  int pwr_on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+      int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>   int nmi_option;</span><br><span> </span><br><span>  /* Which state do we want to goto after g3 (power restored)?</span><br><span>diff --git a/src/southbridge/intel/i82801dx/smihandler.c b/src/southbridge/intel/i82801dx/smihandler.c</span><br><span>index b2b4662..e7a9589 100644</span><br><span>--- a/src/southbridge/intel/i82801dx/smihandler.c</span><br><span>+++ b/src/southbridge/intel/i82801dx/smihandler.c</span><br><span>@@ -276,7 +276,7 @@</span><br><span>   * CMOS or even better from GNVS. Right now it's hard</span><br><span>     * coded at compile time.</span><br><span>     */</span><br><span style="color: hsl(0, 100%, 40%);">-     u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+        u8 s5pwr = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span> </span><br><span>         /* First, disable further SMIs */</span><br><span>    reg8 = inb(pmbase + SMI_EN);</span><br><span>diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig</span><br><span>index 28d42ff..69cb2e7 100644</span><br><span>--- a/src/southbridge/intel/i82801gx/Kconfig</span><br><span>+++ b/src/southbridge/intel/i82801gx/Kconfig</span><br><span>@@ -28,6 +28,9 @@</span><br><span>        select HAVE_INTEL_CHIPSET_LOCKDOWN</span><br><span>   select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ</span><br><span>    select INTEL_HAS_TOP_SWAP</span><br><span style="color: hsl(120, 100%, 40%);">+     select HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+        select POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span> </span><br><span> if SOUTHBRIDGE_INTEL_I82801GX</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h</span><br><span>index d14a809..828f1a9 100644</span><br><span>--- a/src/southbridge/intel/i82801gx/i82801gx.h</span><br><span>+++ b/src/southbridge/intel/i82801gx/i82801gx.h</span><br><span>@@ -59,10 +59,6 @@</span><br><span> #define MAINBOARD_POWER_ON       1</span><br><span> #define MAINBOARD_POWER_KEEP       2</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /* PCI Configuration Space (D30:F0): PCI2PCI */</span><br><span> #define PSTS   0x06</span><br><span> #define SMLT    0x1b</span><br><span>diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c</span><br><span>index 7dcec50..13ea221 100644</span><br><span>--- a/src/southbridge/intel/i82801gx/lpc.c</span><br><span>+++ b/src/southbridge/intel/i82801gx/lpc.c</span><br><span>@@ -172,7 +172,7 @@</span><br><span>      /* Get the chip configuration */</span><br><span>     config_t *config = dev->chip_info;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-       int pwr_on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+      int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>   int nmi_option;</span><br><span> </span><br><span>  /* Which state do we want to goto after g3 (power restored)?</span><br><span>diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c</span><br><span>index 3f537c0..92c6384 100644</span><br><span>--- a/src/southbridge/intel/i82801gx/smihandler.c</span><br><span>+++ b/src/southbridge/intel/i82801gx/smihandler.c</span><br><span>@@ -357,7 +357,7 @@</span><br><span>  u8 reg8;</span><br><span>     u32 reg32;</span><br><span>   u8 slp_typ;</span><br><span style="color: hsl(0, 100%, 40%);">-     u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+        u8 s5pwr = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span> </span><br><span>         // save and recover RTC port values</span><br><span>  u8 tmp70, tmp72;</span><br><span>diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h</span><br><span>index aed1999..f094ed8 100644</span><br><span>--- a/src/southbridge/intel/i82801ix/i82801ix.h</span><br><span>+++ b/src/southbridge/intel/i82801ix/i82801ix.h</span><br><span>@@ -85,11 +85,6 @@</span><br><span> #define MAINBOARD_POWER_ON    1</span><br><span> #define MAINBOARD_POWER_KEEP       2</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /* D31:F0 LPC bridge */</span><br><span> #define D31F0_PMBASE           0x40</span><br><span> #define D31F0_ACPI_CNTL         0x44</span><br><span>diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c</span><br><span>index a69b879..05fbcdc 100644</span><br><span>--- a/src/southbridge/intel/i82801ix/lpc.c</span><br><span>+++ b/src/southbridge/intel/i82801ix/lpc.c</span><br><span>@@ -170,7 +170,7 @@</span><br><span>      /* Get the chip configuration */</span><br><span>     config_t *config = dev->chip_info;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-       int pwr_on=CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+        int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>   int nmi_option;</span><br><span> </span><br><span>  /* BIOS must program... */</span><br><span>diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig</span><br><span>index 4308e29..4b523b7 100644</span><br><span>--- a/src/southbridge/intel/i82801jx/Kconfig</span><br><span>+++ b/src/southbridge/intel/i82801jx/Kconfig</span><br><span>@@ -29,6 +29,9 @@</span><br><span>  select INTEL_DESCRIPTOR_MODE_CAPABLE</span><br><span>         select COMMON_FADT</span><br><span>   select ACPI_INTEL_HARDWARE_SLEEP_VALUES</span><br><span style="color: hsl(120, 100%, 40%);">+       select HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+        select POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span> </span><br><span> if SOUTHBRIDGE_INTEL_I82801JX</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/i82801jx/i82801jx.h b/src/southbridge/intel/i82801jx/i82801jx.h</span><br><span>index 3c09746..4813dd8 100644</span><br><span>--- a/src/southbridge/intel/i82801jx/i82801jx.h</span><br><span>+++ b/src/southbridge/intel/i82801jx/i82801jx.h</span><br><span>@@ -76,11 +76,6 @@</span><br><span> #define MAINBOARD_POWER_ON       1</span><br><span> #define MAINBOARD_POWER_KEEP       2</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /* D31:F0 LPC bridge */</span><br><span> #define D31F0_PMBASE           0x40</span><br><span> #define PMBASE          D31F0_PMBASE</span><br><span>diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c</span><br><span>index ba79e73..250ce08 100644</span><br><span>--- a/src/southbridge/intel/i82801jx/lpc.c</span><br><span>+++ b/src/southbridge/intel/i82801jx/lpc.c</span><br><span>@@ -172,7 +172,7 @@</span><br><span>      /* Get the chip configuration */</span><br><span>     config_t *config = dev->chip_info;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-       int pwr_on=CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+        int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>   int nmi_option;</span><br><span> </span><br><span>  /* BIOS must program... */</span><br><span>diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig</span><br><span>index fe6526d..796e165 100644</span><br><span>--- a/src/southbridge/intel/ibexpeak/Kconfig</span><br><span>+++ b/src/southbridge/intel/ibexpeak/Kconfig</span><br><span>@@ -37,6 +37,9 @@</span><br><span>  select INTEL_DESCRIPTOR_MODE_CAPABLE</span><br><span>         select SOUTHBRIDGE_INTEL_COMMON_GPIO</span><br><span>         select HAVE_INTEL_CHIPSET_LOCKDOWN</span><br><span style="color: hsl(120, 100%, 40%);">+    select HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+        select POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span> </span><br><span> config EHCI_BAR</span><br><span>  hex</span><br><span>diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c</span><br><span>index e5cbc59..a6d1435 100644</span><br><span>--- a/src/southbridge/intel/ibexpeak/lpc.c</span><br><span>+++ b/src/southbridge/intel/ibexpeak/lpc.c</span><br><span>@@ -174,7 +174,7 @@</span><br><span>       /* Get the chip configuration */</span><br><span>     config_t *config = dev->chip_info;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-       int pwr_on=CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+        int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>   int nmi_option;</span><br><span> </span><br><span>  /* Which state do we want to goto after g3 (power restored)?</span><br><span>diff --git a/src/southbridge/intel/ibexpeak/pch.h b/src/southbridge/intel/ibexpeak/pch.h</span><br><span>index 55478b9..3938662 100644</span><br><span>--- a/src/southbridge/intel/ibexpeak/pch.h</span><br><span>+++ b/src/southbridge/intel/ibexpeak/pch.h</span><br><span>@@ -86,10 +86,6 @@</span><br><span> #define MAINBOARD_POWER_ON    1</span><br><span> #define MAINBOARD_POWER_KEEP       2</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /* PCI Configuration Space (D30:F0): PCI2PCI */</span><br><span> #define PSTS   0x06</span><br><span> #define SMLT    0x1b</span><br><span>diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c</span><br><span>index b70273c..125b90a 100644</span><br><span>--- a/src/southbridge/intel/ibexpeak/smihandler.c</span><br><span>+++ b/src/southbridge/intel/ibexpeak/smihandler.c</span><br><span>@@ -403,7 +403,7 @@</span><br><span>  u8 reg8;</span><br><span>     u32 reg32;</span><br><span>   u8 slp_typ;</span><br><span style="color: hsl(0, 100%, 40%);">-     u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+        u8 s5pwr = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span> </span><br><span>         // save and recover RTC port values</span><br><span>  u8 tmp70, tmp72;</span><br><span>diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig</span><br><span>index 5b06c4b..92582e5 100644</span><br><span>--- a/src/southbridge/intel/lynxpoint/Kconfig</span><br><span>+++ b/src/southbridge/intel/lynxpoint/Kconfig</span><br><span>@@ -37,6 +37,9 @@</span><br><span>        select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ</span><br><span>    select HAVE_INTEL_CHIPSET_LOCKDOWN</span><br><span>   select COMMON_FADT</span><br><span style="color: hsl(120, 100%, 40%);">+    select HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+        select POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span> </span><br><span> config INTEL_LYNXPOINT_LP</span><br><span>        bool</span><br><span>diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c</span><br><span>index ca850c0..181a982 100644</span><br><span>--- a/src/southbridge/intel/lynxpoint/lpc.c</span><br><span>+++ b/src/southbridge/intel/lynxpoint/lpc.c</span><br><span>@@ -189,7 +189,7 @@</span><br><span>  /* Get the chip configuration */</span><br><span>     config_t *config = dev->chip_info;</span><br><span>        u16 pmbase = get_pmbase();</span><br><span style="color: hsl(0, 100%, 40%);">-      int pwr_on=CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+        int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>   int nmi_option;</span><br><span> </span><br><span>  /* Which state do we want to goto after g3 (power restored)?</span><br><span>diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h</span><br><span>index a02be81..36ef704 100644</span><br><span>--- a/src/southbridge/intel/lynxpoint/pch.h</span><br><span>+++ b/src/southbridge/intel/lynxpoint/pch.h</span><br><span>@@ -210,10 +210,6 @@</span><br><span> #define MAINBOARD_POWER_ON      1</span><br><span> #define MAINBOARD_POWER_KEEP       2</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /* PCI Configuration Space (D30:F0): PCI2PCI */</span><br><span> #define PSTS   0x06</span><br><span> #define SMLT    0x1b</span><br><span>diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c</span><br><span>index 87848c2..21da3ab 100644</span><br><span>--- a/src/southbridge/intel/lynxpoint/smihandler.c</span><br><span>+++ b/src/southbridge/intel/lynxpoint/smihandler.c</span><br><span>@@ -107,7 +107,7 @@</span><br><span>      u8 reg8;</span><br><span>     u32 reg32;</span><br><span>   u8 slp_typ;</span><br><span style="color: hsl(0, 100%, 40%);">-     u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+        u8 s5pwr = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>     u16 pmbase = get_pmbase();</span><br><span> </span><br><span>       // save and recover RTC port values</span><br><span>diff --git a/src/southbridge/nvidia/ck804/Kconfig b/src/southbridge/nvidia/ck804/Kconfig</span><br><span>index 338357e..08f213c 100644</span><br><span>--- a/src/southbridge/nvidia/ck804/Kconfig</span><br><span>+++ b/src/southbridge/nvidia/ck804/Kconfig</span><br><span>@@ -2,6 +2,8 @@</span><br><span>   bool</span><br><span>         select HAVE_USBDEBUG</span><br><span>         select IOAPIC</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ select POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span> </span><br><span> if SOUTHBRIDGE_NVIDIA_CK804</span><br><span> </span><br><span>diff --git a/src/southbridge/nvidia/ck804/lpc.c b/src/southbridge/nvidia/ck804/lpc.c</span><br><span>index 2c7519b..fe915ee 100644</span><br><span>--- a/src/southbridge/nvidia/ck804/lpc.c</span><br><span>+++ b/src/southbridge/nvidia/ck804/lpc.c</span><br><span>@@ -47,10 +47,6 @@</span><br><span> #define SLOW_CPU_OFF 0</span><br><span> #define SLOW_CPU__ON 1</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> static void lpc_common_init(struct device *dev)</span><br><span> {</span><br><span>   u32 dword;</span><br><span>@@ -114,7 +110,7 @@</span><br><span>     printk(BIOS_INFO, "%s: pm_base = %x\n", __func__, pm_base);</span><br><span> </span><br><span>    /* Power after power fail */</span><br><span style="color: hsl(0, 100%, 40%);">-    on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+      on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>   get_option(&on, "power_on_after_fail");</span><br><span>        byte = pci_read_config8(dev, PREVIOUS_POWER_STATE);</span><br><span>  byte &= ~0x45;</span><br><span>diff --git a/src/southbridge/nvidia/mcp55/Kconfig b/src/southbridge/nvidia/mcp55/Kconfig</span><br><span>index bb1b7df..66dbc99 100644</span><br><span>--- a/src/southbridge/nvidia/mcp55/Kconfig</span><br><span>+++ b/src/southbridge/nvidia/mcp55/Kconfig</span><br><span>@@ -2,6 +2,8 @@</span><br><span>    bool</span><br><span>         select HAVE_USBDEBUG</span><br><span>         select IOAPIC</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ select POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span> </span><br><span> if SOUTHBRIDGE_NVIDIA_MCP55</span><br><span> </span><br><span>diff --git a/src/southbridge/nvidia/mcp55/lpc.c b/src/southbridge/nvidia/mcp55/lpc.c</span><br><span>index 3ac6464..7e0fc89 100644</span><br><span>--- a/src/southbridge/nvidia/mcp55/lpc.c</span><br><span>+++ b/src/southbridge/nvidia/mcp55/lpc.c</span><br><span>@@ -48,10 +48,6 @@</span><br><span> #define SLOW_CPU_OFF           0</span><br><span> #define SLOW_CPU__ON               1</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> static void lpc_common_init(struct device *dev, int master)</span><br><span> {</span><br><span>       u8 byte;</span><br><span>@@ -93,7 +89,7 @@</span><br><span>         /* power after power fail */</span><br><span> </span><br><span> #if 1</span><br><span style="color: hsl(0, 100%, 40%);">-       on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+      on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>   get_option(&on, "power_on_after_fail");</span><br><span>        byte = pci_read_config8(dev, PREVIOUS_POWER_STATE);</span><br><span>  byte &= ~0x40;</span><br><span>diff --git a/src/superio/nuvoton/nct5572d/Kconfig b/src/superio/nuvoton/nct5572d/Kconfig</span><br><span>index b666174..0a29f97 100644</span><br><span>--- a/src/superio/nuvoton/nct5572d/Kconfig</span><br><span>+++ b/src/superio/nuvoton/nct5572d/Kconfig</span><br><span>@@ -16,3 +16,6 @@</span><br><span> config SUPERIO_NUVOTON_NCT5572D</span><br><span>       bool</span><br><span>         select SUPERIO_NUVOTON_COMMON_ROMSTAGE</span><br><span style="color: hsl(120, 100%, 40%);">+        select HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+        select POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span>diff --git a/src/superio/nuvoton/nct5572d/superio.c b/src/superio/nuvoton/nct5572d/superio.c</span><br><span>index 10542d5..2026704 100644</span><br><span>--- a/src/superio/nuvoton/nct5572d/superio.c</span><br><span>+++ b/src/superio/nuvoton/nct5572d/superio.c</span><br><span>@@ -28,12 +28,9 @@</span><br><span> </span><br><span> #include "nct5572d.h"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#define MAINBOARD_POWER_OFF 0</span><br><span style="color: hsl(0, 100%, 40%);">-#define MAINBOARD_POWER_ON 1</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(120, 100%, 40%);">+#define MAINBOARD_POWER_OFF    0</span><br><span style="color: hsl(120, 100%, 40%);">+#define MAINBOARD_POWER_ON   1</span><br><span style="color: hsl(120, 100%, 40%);">+#define MAINBOARD_POWER_KEEP 2</span><br><span> </span><br><span> static void nct5572d_init(struct device *dev)</span><br><span> {</span><br><span>@@ -68,16 +65,16 @@</span><br><span>            break;</span><br><span>       case NCT5572D_ACPI:</span><br><span>          /* Set power state after power fail */</span><br><span style="color: hsl(0, 100%, 40%);">-          power_status = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+            power_status = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>                 get_option(&power_status, "power_on_after_fail");</span><br><span>              pnp_enter_conf_mode_8787(dev);</span><br><span>               pnp_set_logical_device(dev);</span><br><span>                 byte = pnp_read_config(dev, 0xe4);</span><br><span>           byte &= ~0x60;</span><br><span style="color: hsl(0, 100%, 40%);">-              if (power_status == 1)</span><br><span style="color: hsl(0, 100%, 40%);">-                  byte |= (0x1 << 5);    /* Force power on */</span><br><span style="color: hsl(0, 100%, 40%);">-               else if (power_status == 2)</span><br><span style="color: hsl(0, 100%, 40%);">-                     byte |= (0x2 << 5);    /* Use last power state */</span><br><span style="color: hsl(120, 100%, 40%);">+               if (power_status == MAINBOARD_POWER_ON)</span><br><span style="color: hsl(120, 100%, 40%);">+                       byte |= (0x1 << 5);</span><br><span style="color: hsl(120, 100%, 40%);">+             else if (power_status == MAINBOARD_POWER_KEEP)</span><br><span style="color: hsl(120, 100%, 40%);">+                        byte |= (0x2 << 5);</span><br><span>            pnp_write_config(dev, 0xe4, byte);</span><br><span>           pnp_exit_conf_mode_aa(dev);</span><br><span>          printk(BIOS_INFO, "set power %s after power fail\n", power_status ? "on" : "off");</span><br><span>diff --git a/src/superio/winbond/w83667hg-a/Kconfig b/src/superio/winbond/w83667hg-a/Kconfig</span><br><span>index 74b78c2..6274947 100644</span><br><span>--- a/src/superio/winbond/w83667hg-a/Kconfig</span><br><span>+++ b/src/superio/winbond/w83667hg-a/Kconfig</span><br><span>@@ -17,3 +17,6 @@</span><br><span> config SUPERIO_WINBOND_W83667HG_A</span><br><span>       bool</span><br><span>         select SUPERIO_WINBOND_COMMON_ROMSTAGE</span><br><span style="color: hsl(120, 100%, 40%);">+        select HAVE_POWER_STATE_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE</span><br><span style="color: hsl(120, 100%, 40%);">+        select POWER_STATE_DEFAULT_OFF_AFTER_FAILURE</span><br><span>diff --git a/src/superio/winbond/w83667hg-a/superio.c b/src/superio/winbond/w83667hg-a/superio.c</span><br><span>index ceb783d..eabbd67 100644</span><br><span>--- a/src/superio/winbond/w83667hg-a/superio.c</span><br><span>+++ b/src/superio/winbond/w83667hg-a/superio.c</span><br><span>@@ -28,12 +28,9 @@</span><br><span> </span><br><span> #include "w83667hg-a.h"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#define MAINBOARD_POWER_OFF 0</span><br><span style="color: hsl(0, 100%, 40%);">-#define MAINBOARD_POWER_ON 1</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(120, 100%, 40%);">+#define MAINBOARD_POWER_OFF  0</span><br><span style="color: hsl(120, 100%, 40%);">+#define MAINBOARD_POWER_ON   1</span><br><span style="color: hsl(120, 100%, 40%);">+#define MAINBOARD_POWER_KEEP 2</span><br><span> </span><br><span> static void w83667hg_a_init(struct device *dev)</span><br><span> {</span><br><span>@@ -68,16 +65,16 @@</span><br><span>          break;</span><br><span>       case W83667HG_A_ACPI:</span><br><span>                /* Set power state after power fail */</span><br><span style="color: hsl(0, 100%, 40%);">-          power_status = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;</span><br><span style="color: hsl(120, 100%, 40%);">+            power_status = CONFIG_MAINBOARD_POWER_FAILURE_STATE;</span><br><span>                 get_option(&power_status, "power_on_after_fail");</span><br><span>              pnp_enter_conf_mode_8787(dev);</span><br><span>               pnp_set_logical_device(dev);</span><br><span>                 byte = pnp_read_config(dev, 0xe4);</span><br><span>           byte &= ~0x60;</span><br><span style="color: hsl(0, 100%, 40%);">-              if (power_status == 1)</span><br><span style="color: hsl(0, 100%, 40%);">-                  byte |= (0x1 << 5);    /* Force power on */</span><br><span style="color: hsl(0, 100%, 40%);">-               else if (power_status == 2)</span><br><span style="color: hsl(0, 100%, 40%);">-                     byte |= (0x2 << 5);    /* Use last power state */</span><br><span style="color: hsl(120, 100%, 40%);">+               if (power_status == MAINBOARD_POWER_ON)</span><br><span style="color: hsl(120, 100%, 40%);">+                       byte |= (0x1 << 5);</span><br><span style="color: hsl(120, 100%, 40%);">+             else if (power_status == MAINBOARD_POWER_KEEP)</span><br><span style="color: hsl(120, 100%, 40%);">+                        byte |= (0x2 << 5);</span><br><span>            pnp_write_config(dev, 0xe4, byte);</span><br><span>           pnp_exit_conf_mode_aa(dev);</span><br><span>          printk(BIOS_INFO, "set power %s after power fail\n", power_status ? "on" : "off");</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29680">change 29680</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.co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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I61259f864c8a8cfc7099cc2699059f972fa056c0 </div>
<div style="display:none"> Gerrit-Change-Number: 29680 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Nico Huber <nico.h@gmx.de> </div>