<p>Nico Huber has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29669">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">cpu/intel/sandybridge: Add `hyper_threading` option<br><br>More and more people request an option to disable HT. To implement that<br>we have to toggle a bit in a `soft reset` register in the PCH that can<br>override certain default settings of the CPU when it comes out of reset.<br><br>The `soft reset` register is already used for other settings. So we have<br>to take care that all settings are gathered before we issue the reset.<br><br>Note, the current code using `soft reset` for flex ratio selection seems<br>incomplete.<br><br>Change-Id: I2b73e32ff5af8ea64a47e8aa706e27648aaf0993<br>Signed-off-by: Nico Huber <nico.h@gmx.de><br>---<br>M src/cpu/intel/model_206ax/bootblock.c<br>M src/mainboard/lenovo/t430/cmos.layout<br>M src/southbridge/intel/bd82x6x/pch.h<br>3 files changed, 46 insertions(+), 19 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/29669/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/cpu/intel/model_206ax/bootblock.c b/src/cpu/intel/model_206ax/bootblock.c</span><br><span>index 670b097..929c6dc 100644</span><br><span>--- a/src/cpu/intel/model_206ax/bootblock.c</span><br><span>+++ b/src/cpu/intel/model_206ax/bootblock.c</span><br><span>@@ -19,6 +19,8 @@</span><br><span> #include <cpu/x86/msr.h></span><br><span> #include <cpu/x86/mtrr.h></span><br><span> #include <arch/io.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <option_table.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <pc80/mc146818rtc.h></span><br><span> #include <halt.h></span><br><span> </span><br><span> #include <cpu/intel/microcode/microcode.c></span><br><span>@@ -61,34 +63,29 @@</span><br><span> wrmsr(MTRR_DEF_TYPE_MSR, msr);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void set_flex_ratio_to_tdp_nominal(void)</span><br><span style="color: hsl(120, 100%, 40%);">+static u32 set_flex_ratio_to_tdp_nominal(u32 soft_reset)</span><br><span> {</span><br><span> msr_t flex_ratio, msr;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 soft_reset;</span><br><span> u8 nominal_ratio;</span><br><span> </span><br><span> /* Minimum CPU revision for configurable TDP support */</span><br><span> if (cpuid_eax(1) < IVB_CONFIG_TDP_MIN_CPUID)</span><br><span style="color: hsl(0, 100%, 40%);">- return;</span><br><span style="color: hsl(120, 100%, 40%);">+ return soft_reset;</span><br><span> </span><br><span> /* Check for Flex Ratio support */</span><br><span> flex_ratio = rdmsr(MSR_FLEX_RATIO);</span><br><span> if (!(flex_ratio.lo & FLEX_RATIO_EN))</span><br><span style="color: hsl(0, 100%, 40%);">- return;</span><br><span style="color: hsl(120, 100%, 40%);">+ return soft_reset;</span><br><span> </span><br><span> /* Check for >0 configurable TDPs */</span><br><span> msr = rdmsr(MSR_PLATFORM_INFO);</span><br><span> if (((msr.hi >> 1) & 3) == 0)</span><br><span style="color: hsl(0, 100%, 40%);">- return;</span><br><span style="color: hsl(120, 100%, 40%);">+ return soft_reset;</span><br><span> </span><br><span> /* Use nominal TDP ratio for flex ratio */</span><br><span> msr = rdmsr(MSR_CONFIG_TDP_NOMINAL);</span><br><span> nominal_ratio = msr.lo & 0xff;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* See if flex ratio is already set to nominal TDP ratio */</span><br><span style="color: hsl(0, 100%, 40%);">- if (((flex_ratio.lo >> 8) & 0xff) == nominal_ratio)</span><br><span style="color: hsl(0, 100%, 40%);">- return;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /* Set flex ratio to nominal TDP ratio */</span><br><span> flex_ratio.lo &= ~0xff00;</span><br><span> flex_ratio.lo |= nominal_ratio << 8;</span><br><span>@@ -97,24 +94,52 @@</span><br><span> </span><br><span> /* Set flex ratio in soft reset data register bits 11:6.</span><br><span> * RCBA region is enabled in southbridge bootblock */</span><br><span style="color: hsl(0, 100%, 40%);">- soft_reset = RCBA32(SOFT_RESET_DATA);</span><br><span> soft_reset &= ~(0x3f << 6);</span><br><span> soft_reset |= (nominal_ratio & 0x3f) << 6;</span><br><span style="color: hsl(0, 100%, 40%);">- RCBA32(SOFT_RESET_DATA) = soft_reset;</span><br><span style="color: hsl(120, 100%, 40%);">+ return soft_reset;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Set soft reset control to use register value */</span><br><span style="color: hsl(120, 100%, 40%);">+static u32 set_hyperthreading_option(u32 soft_reset)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ int ht_requested;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ ht_requested = read_option(hyper_threading, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ soft_reset &= ~1;</span><br><span style="color: hsl(120, 100%, 40%);">+ soft_reset |= !ht_requested; /* Bit 0 is ht disable */</span><br><span style="color: hsl(120, 100%, 40%);">+ return soft_reset;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void soft_reset_settings(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ int need_reset;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 soft_reset;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ soft_reset = RCBA32(SOFT_RESET_DATA);</span><br><span style="color: hsl(120, 100%, 40%);">+ soft_reset = set_flex_ratio_to_tdp_nominal(soft_reset);</span><br><span style="color: hsl(120, 100%, 40%);">+ soft_reset = set_hyperthreading_option(soft_reset);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Check if we didn't already request these settings */</span><br><span style="color: hsl(120, 100%, 40%);">+ need_reset = !(RCBA32(SOFT_RESET_CTRL) & 1) ||</span><br><span style="color: hsl(120, 100%, 40%);">+ RCBA32(SOFT_RESET_DATA) != soft_reset;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Set current requests */</span><br><span style="color: hsl(120, 100%, 40%);">+ RCBA32(SOFT_RESET_DATA) = soft_reset;</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Use them instead of defaults */</span><br><span> RCBA32_OR(SOFT_RESET_CTRL, 1);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Issue warm reset, will be "CPU only" due to soft reset data */</span><br><span style="color: hsl(0, 100%, 40%);">- outb(0x0, 0xcf9);</span><br><span style="color: hsl(0, 100%, 40%);">- outb(0x6, 0xcf9);</span><br><span style="color: hsl(0, 100%, 40%);">- halt();</span><br><span style="color: hsl(120, 100%, 40%);">+ if (need_reset) {</span><br><span style="color: hsl(120, 100%, 40%);">+ outb(0x2, 0xcf9);</span><br><span style="color: hsl(120, 100%, 40%);">+ outb(0x6, 0xcf9);</span><br><span style="color: hsl(120, 100%, 40%);">+ halt();</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ RCBA32_OR(SOFT_RESET_LOCK, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> }</span><br><span> </span><br><span> static void bootblock_cpu_init(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- /* Set flex ratio and reset if needed */</span><br><span style="color: hsl(0, 100%, 40%);">- set_flex_ratio_to_tdp_nominal();</span><br><span style="color: hsl(120, 100%, 40%);">+ soft_reset_settings();</span><br><span> enable_rom_caching();</span><br><span> intel_update_microcode_from_cbfs();</span><br><span> }</span><br><span>diff --git a/src/mainboard/lenovo/t430/cmos.layout b/src/mainboard/lenovo/t430/cmos.layout</span><br><span>index 1b50e7f..9517482 100644</span><br><span>--- a/src/mainboard/lenovo/t430/cmos.layout</span><br><span>+++ b/src/mainboard/lenovo/t430/cmos.layout</span><br><span>@@ -72,7 +72,8 @@</span><br><span> 422 2 e 10 backlight</span><br><span> </span><br><span> # coreboot config options: cpu</span><br><span style="color: hsl(0, 100%, 40%);">-#424 8 r 0 unused</span><br><span style="color: hsl(120, 100%, 40%);">+424 1 e 1 hyper_threading</span><br><span style="color: hsl(120, 100%, 40%);">+#425 7 r 0 unused</span><br><span> </span><br><span> # coreboot config options: northbridge</span><br><span> 432 3 e 11 gfx_uma_size</span><br><span>diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h</span><br><span>index bb0d5c4..7aab77a 100644</span><br><span>--- a/src/southbridge/intel/bd82x6x/pch.h</span><br><span>+++ b/src/southbridge/intel/bd82x6x/pch.h</span><br><span>@@ -391,6 +391,7 @@</span><br><span> #define D22IR 0x315c /* 16bit */</span><br><span> #define D20IR 0x3160 /* 16bit */</span><br><span> #define OIC 0x31fe /* 16bit */</span><br><span style="color: hsl(120, 100%, 40%);">+#define SOFT_RESET_LOCK 0x38f0</span><br><span> #define SOFT_RESET_CTRL 0x38f4</span><br><span> #define SOFT_RESET_DATA 0x38f8</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29669">change 29669</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I2b73e32ff5af8ea64a47e8aa706e27648aaf0993 </div>
<div style="display:none"> Gerrit-Change-Number: 29669 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Nico Huber <nico.h@gmx.de> </div>