<p>Nico Huber has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29684">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/common: Bring DISPLAY_MTRRS into the light<br><br>Initially, I wanted to move only the Kconfig DISPLAY_MTRRS into the<br>"Debug" menu. It turned out, though, that the code looks rather generic<br>and while it's not perfect, I see nothing to be ashamed of. No need to<br>hide it in soc/intel/.<br><br>If somebody wants to review the code if it's 100% generic, we could<br>even get rid of HAVE_DISPLAY_MTRRS.<br><br>Change-Id: Ibd0a64121bd6e4ab5d7fd835f3ac25d3f5011f24<br>Signed-off-by: Nico Huber <nico.h@gmx.de><br>---<br>M Documentation/Intel/Board/Galileo_checklist.html<br>M Documentation/Intel/SoC/soc.html<br>M src/Kconfig<br>M src/arch/x86/postcar.c<br>M src/cpu/x86/mtrr/Makefile.inc<br>A src/cpu/x86/mtrr/debug.c<br>M src/cpu/x86/mtrr/earlymtrr.c<br>M src/drivers/intel/fsp1_1/after_raminit.S<br>M src/drivers/intel/fsp1_1/car.c<br>M src/drivers/intel/fsp1_1/include/fsp/ramstage.h<br>M src/drivers/intel/fsp1_1/include/fsp/romstage.h<br>M src/drivers/intel/fsp1_1/stack.c<br>M src/drivers/intel/fsp2_0/debug.c<br>M src/drivers/intel/fsp2_0/notify.c<br>M src/include/cpu/x86/mtrr.h<br>M src/soc/intel/common/Kconfig<br>M src/soc/intel/common/Makefile.inc<br>D src/soc/intel/common/util.c<br>D src/soc/intel/common/util.h<br>M src/soc/intel/quark/Makefile.inc<br>M src/soc/intel/quark/bootblock/bootblock.c<br>M src/soc/intel/quark/include/soc/ramstage.h<br>M src/soc/intel/quark/romstage/mtrr.c<br>M src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_complete.dat<br>M src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat<br>M src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_complete.dat<br>M src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_optional.dat<br>27 files changed, 247 insertions(+), 313 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/29684/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/Documentation/Intel/Board/Galileo_checklist.html b/Documentation/Intel/Board/Galileo_checklist.html</span><br><span>index 3fc04b1..397f570 100644</span><br><span>--- a/Documentation/Intel/Board/Galileo_checklist.html</span><br><span>+++ b/Documentation/Intel/Board/Galileo_checklist.html</span><br><span>@@ -79,8 +79,6 @@</span><br><span> <tr bgcolor=#ffc0c0><td>Required</td><td>smm_region_size</td></tr></span><br><span> <tr bgcolor=#c0ffc0><td>Required</td><td>soc_after_ram_init</td></tr></span><br><span> <tr bgcolor=#c0ffc0><td>Required</td><td>soc_display_memory_init_params</td></tr></span><br><span style="color: hsl(0, 100%, 40%);">-<tr bgcolor=#c0ffc0><td>Required</td><td>soc_display_mtrrs</td></tr></span><br><span style="color: hsl(0, 100%, 40%);">-<tr bgcolor=#c0ffc0><td>Required</td><td>soc_get_variable_mtrr_count</td></tr></span><br><span> <tr bgcolor=#c0ffc0><td>Required</td><td>soc_memory_init_params</td></tr></span><br><span> <tr bgcolor=#ffffc0><td>Optional</td><td>soc_pre_ram_init</td></tr></span><br><span> <tr bgcolor=#ffffc0><td>Optional</td><td>southbridge_smi_handler</td></tr></span><br><span>diff --git a/Documentation/Intel/SoC/soc.html b/Documentation/Intel/SoC/soc.html</span><br><span>index 29b819e..fff536b 100644</span><br><span>--- a/Documentation/Intel/SoC/soc.html</span><br><span>+++ b/Documentation/Intel/SoC/soc.html</span><br><span>@@ -234,8 +234,6 @@</span><br><span> <a target="_blank" href="https://review.coreboot.org/gitweb?p=coreboot.git;a=blob;f=src/drivers/intel/fsp1_1/cache_as_ram.inc">src/drivers/intel/fsp1_1/cache_as_ram.inc</a></span><br><span> </li></span><br><span> <li>Add "select SOC_INTEL_COMMON" to enable the use of the files from src/soc/intel/common</span><br><span style="color: hsl(0, 100%, 40%);">- specifically building</span><br><span style="color: hsl(0, 100%, 40%);">- <a target="_blank" href="https://review.coreboot.org/gitweb?p=coreboot.git;a=blob;f=src/soc/intel/common/util.c">util.c</a></span><br><span> </li></span><br><span> </ol></span><br><span> </li></span><br><span>diff --git a/src/Kconfig b/src/Kconfig</span><br><span>index ce584f5..b14fa32 100644</span><br><span>--- a/src/Kconfig</span><br><span>+++ b/src/Kconfig</span><br><span>@@ -700,6 +700,13 @@</span><br><span> bool "Output verbose GPIO debug messages"</span><br><span> depends on HAVE_DEBUG_GPIO</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+config HAVE_DISPLAY_MTRRS</span><br><span style="color: hsl(120, 100%, 40%);">+ bool</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config DISPLAY_MTRRS</span><br><span style="color: hsl(120, 100%, 40%);">+ bool "Display intermediate MTRR settings"</span><br><span style="color: hsl(120, 100%, 40%);">+ depends on HAVE_DISPLAY_MTRRS</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> config DEBUG_CBFS</span><br><span> bool "Output verbose CBFS debug messages"</span><br><span> default n</span><br><span>diff --git a/src/arch/x86/postcar.c b/src/arch/x86/postcar.c</span><br><span>index 295276b..ea05824 100644</span><br><span>--- a/src/arch/x86/postcar.c</span><br><span>+++ b/src/arch/x86/postcar.c</span><br><span>@@ -16,9 +16,9 @@</span><br><span> #include <arch/cpu.h></span><br><span> #include <cbmem.h></span><br><span> #include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/x86/mtrr.h></span><br><span> #include <main_decl.h></span><br><span> #include <program_loading.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/intel/common/util.h></span><br><span> </span><br><span> /*</span><br><span> * Systems without a native coreboot cache-as-ram teardown may implement</span><br><span>@@ -35,9 +35,7 @@</span><br><span> /* Recover cbmem so infrastruture using it is functional. */</span><br><span> cbmem_initialize();</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Display the MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrrs();</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrrs();</span><br><span> </span><br><span> /* Load and run ramstage. */</span><br><span> run_ramstage();</span><br><span>diff --git a/src/cpu/x86/mtrr/Makefile.inc b/src/cpu/x86/mtrr/Makefile.inc</span><br><span>index e6e9c50..caa6e9c 100644</span><br><span>--- a/src/cpu/x86/mtrr/Makefile.inc</span><br><span>+++ b/src/cpu/x86/mtrr/Makefile.inc</span><br><span>@@ -1,3 +1,9 @@</span><br><span style="color: hsl(0, 100%, 40%);">-ramstage-y += mtrr.c</span><br><span style="color: hsl(0, 100%, 40%);">-romstage-y += earlymtrr.c</span><br><span style="color: hsl(0, 100%, 40%);">-bootblock-y += earlymtrr.c</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-y += mtrr.c</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-y += earlymtrr.c</span><br><span style="color: hsl(120, 100%, 40%);">+bootblock-y += earlymtrr.c</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+bootblock-y += debug.c</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-y += debug.c</span><br><span style="color: hsl(120, 100%, 40%);">+postcar-y += debug.c</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-y += debug.c</span><br><span>diff --git a/src/cpu/x86/mtrr/debug.c b/src/cpu/x86/mtrr/debug.c</span><br><span>new file mode 100644</span><br><span>index 0000000..c562d84</span><br><span>--- /dev/null</span><br><span>+++ b/src/cpu/x86/mtrr/debug.c</span><br><span>@@ -0,0 +1,202 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2015-2016 Intel Corporation.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/cpu.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/x86/mtrr.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <stdint.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static const char *display_mtrr_type(uint32_t type)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (type) {</span><br><span style="color: hsl(120, 100%, 40%);">+ default: return "reserved";</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0: return "UC";</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1: return "WC";</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4: return "WT";</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5: return "WP";</span><br><span style="color: hsl(120, 100%, 40%);">+ case 6: return "WB";</span><br><span style="color: hsl(120, 100%, 40%);">+ case 7: return "UC-";</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void display_mtrr_fixed_types(uint64_t msr,</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t starting_address, uint32_t memory_size)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t base_address;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t index;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t next_address;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t next_type;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t type;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ type = msr & MTRR_DEF_TYPE_MASK;</span><br><span style="color: hsl(120, 100%, 40%);">+ base_address = starting_address;</span><br><span style="color: hsl(120, 100%, 40%);">+ next_address = base_address;</span><br><span style="color: hsl(120, 100%, 40%);">+ for (index = 0; index < 64; index += 8) {</span><br><span style="color: hsl(120, 100%, 40%);">+ next_address = starting_address + (memory_size *</span><br><span style="color: hsl(120, 100%, 40%);">+ ((index >> 3) + 1));</span><br><span style="color: hsl(120, 100%, 40%);">+ next_type = (msr >> index) & MTRR_DEF_TYPE_MASK;</span><br><span style="color: hsl(120, 100%, 40%);">+ if (next_type != type) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, " 0x%08x - 0x%08x: %s\n",</span><br><span style="color: hsl(120, 100%, 40%);">+ base_address, next_address - 1,</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrr_type(type));</span><br><span style="color: hsl(120, 100%, 40%);">+ base_address = next_address;</span><br><span style="color: hsl(120, 100%, 40%);">+ type = next_type;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ if (base_address != next_address)</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, " 0x%08x - 0x%08x: %s\n",</span><br><span style="color: hsl(120, 100%, 40%);">+ base_address, next_address - 1,</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrr_type(type));</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void display_4k_mtrr(uint32_t msr_reg, uint32_t starting_address,</span><br><span style="color: hsl(120, 100%, 40%);">+ const char *name)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ union {</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t u64;</span><br><span style="color: hsl(120, 100%, 40%);">+ msr_t s;</span><br><span style="color: hsl(120, 100%, 40%);">+ } msr;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ msr.s = rdmsr(msr_reg);</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "0x%016llx: %s\n", msr.u64, name);</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrr_fixed_types(msr.u64, starting_address, 0x1000);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void display_16k_mtrr(uint32_t msr_reg, uint32_t starting_address,</span><br><span style="color: hsl(120, 100%, 40%);">+ const char *name)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ union {</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t u64;</span><br><span style="color: hsl(120, 100%, 40%);">+ msr_t s;</span><br><span style="color: hsl(120, 100%, 40%);">+ } msr;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ msr.s = rdmsr(msr_reg);</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "0x%016llx: %s\n", msr.u64, name);</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrr_fixed_types(msr.u64, starting_address, 0x4000);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void display_64k_mtrr(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ union {</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t u64;</span><br><span style="color: hsl(120, 100%, 40%);">+ msr_t s;</span><br><span style="color: hsl(120, 100%, 40%);">+ } msr;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ msr.s = rdmsr(MTRR_FIX_64K_00000);</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "0x%016llx: IA32_MTRR_FIX64K_00000\n", msr.u64);</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrr_fixed_types(msr.u64, 0, 0x10000);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void display_mtrrcap(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ msr_t msr;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ msr = rdmsr(MTRR_CAP_MSR);</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG,</span><br><span style="color: hsl(120, 100%, 40%);">+ "0x%08x%08x: IA32_MTRRCAP: %s%s%s%u variable MTRRs\n",</span><br><span style="color: hsl(120, 100%, 40%);">+ msr.hi, msr.lo,</span><br><span style="color: hsl(120, 100%, 40%);">+ (msr.lo & MTRR_CAP_SMRR) ? "SMRR, " : "",</span><br><span style="color: hsl(120, 100%, 40%);">+ (msr.lo & MTRR_CAP_WC) ? "WC, " : "",</span><br><span style="color: hsl(120, 100%, 40%);">+ (msr.lo & MTRR_CAP_FIX) ? "FIX, " : "",</span><br><span style="color: hsl(120, 100%, 40%);">+ msr.lo & MTRR_CAP_VCNT);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void display_mtrr_def_type(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ union {</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t u64;</span><br><span style="color: hsl(120, 100%, 40%);">+ msr_t s;</span><br><span style="color: hsl(120, 100%, 40%);">+ } msr;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ msr.s = rdmsr(MTRR_DEF_TYPE_MSR);</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "0x%016llx: IA32_MTRR_DEF_TYPE:%s%s %s\n",</span><br><span style="color: hsl(120, 100%, 40%);">+ msr.u64,</span><br><span style="color: hsl(120, 100%, 40%);">+ (msr.u64 & MTRR_DEF_TYPE_EN) ? " E," : "",</span><br><span style="color: hsl(120, 100%, 40%);">+ (msr.u64 & MTRR_DEF_TYPE_FIX_EN) ? " FE," : "",</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrr_type((uint32_t)(msr.u64 &</span><br><span style="color: hsl(120, 100%, 40%);">+ MTRR_DEF_TYPE_MASK)));</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void display_variable_mtrr(int index, uint64_t address_mask)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ const uint32_t msr_reg = MTRR_PHYS_BASE(index);</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t base_address;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t length;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t mask;</span><br><span style="color: hsl(120, 100%, 40%);">+ union {</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t u64;</span><br><span style="color: hsl(120, 100%, 40%);">+ msr_t s;</span><br><span style="color: hsl(120, 100%, 40%);">+ } msr_a;</span><br><span style="color: hsl(120, 100%, 40%);">+ union {</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t u64;</span><br><span style="color: hsl(120, 100%, 40%);">+ msr_t s;</span><br><span style="color: hsl(120, 100%, 40%);">+ } msr_m;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ msr_a.s = rdmsr(msr_reg);</span><br><span style="color: hsl(120, 100%, 40%);">+ msr_m.s = rdmsr(msr_reg + 1);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (msr_m.u64 & MTRR_PHYS_MASK_VALID) {</span><br><span style="color: hsl(120, 100%, 40%);">+ base_address = (msr_a.u64 & 0xfffffffffffff000ULL)</span><br><span style="color: hsl(120, 100%, 40%);">+ & address_mask;</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG,</span><br><span style="color: hsl(120, 100%, 40%);">+ "0x%016llx: PHYBASE%d: Address = 0x%016llx, %s\n",</span><br><span style="color: hsl(120, 100%, 40%);">+ msr_a.u64, index, base_address,</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrr_type(msr_a.u64 & MTRR_DEF_TYPE_MASK));</span><br><span style="color: hsl(120, 100%, 40%);">+ mask = (msr_m.u64 & 0xfffffffffffff000ULL) & address_mask;</span><br><span style="color: hsl(120, 100%, 40%);">+ length = (~mask & address_mask) + 1;</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG,</span><br><span style="color: hsl(120, 100%, 40%);">+ "0x%016llx: PHYMASK%d: Length = 0x%016llx, Valid\n",</span><br><span style="color: hsl(120, 100%, 40%);">+ msr_m.u64, index, length);</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "0x%016llx: PHYBASE%d\n", msr_a.u64, index);</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "0x%016llx: PHYMASK%d: Disabled\n",</span><br><span style="color: hsl(120, 100%, 40%);">+ msr_m.u64, index);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void _display_mtrrs(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t address_bits;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t address_mask;</span><br><span style="color: hsl(120, 100%, 40%);">+ int i;</span><br><span style="color: hsl(120, 100%, 40%);">+ int variable_mtrrs;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Display the fixed MTRRs */</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrrcap();</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrr_def_type();</span><br><span style="color: hsl(120, 100%, 40%);">+ display_64k_mtrr();</span><br><span style="color: hsl(120, 100%, 40%);">+ display_16k_mtrr(MTRR_FIX_16K_80000, 0x80000, "IA32_MTRR_FIX16K_80000");</span><br><span style="color: hsl(120, 100%, 40%);">+ display_16k_mtrr(MTRR_FIX_16K_A0000, 0xa0000, "IA32_MTRR_FIX16K_A0000");</span><br><span style="color: hsl(120, 100%, 40%);">+ display_4k_mtrr(MTRR_FIX_4K_C0000, 0xc0000, "IA32_MTRR_FIX4K_C0000");</span><br><span style="color: hsl(120, 100%, 40%);">+ display_4k_mtrr(MTRR_FIX_4K_C8000, 0xc8000, "IA32_MTRR_FIX4K_C8000");</span><br><span style="color: hsl(120, 100%, 40%);">+ display_4k_mtrr(MTRR_FIX_4K_D0000, 0xd0000, "IA32_MTRR_FIX4K_D0000");</span><br><span style="color: hsl(120, 100%, 40%);">+ display_4k_mtrr(MTRR_FIX_4K_D8000, 0xd8000, "IA32_MTRR_FIX4K_D8000");</span><br><span style="color: hsl(120, 100%, 40%);">+ display_4k_mtrr(MTRR_FIX_4K_E0000, 0xe0000, "IA32_MTRR_FIX4K_E0000");</span><br><span style="color: hsl(120, 100%, 40%);">+ display_4k_mtrr(MTRR_FIX_4K_E8000, 0xe8000, "IA32_MTRR_FIX4K_E8000");</span><br><span style="color: hsl(120, 100%, 40%);">+ display_4k_mtrr(MTRR_FIX_4K_F0000, 0xf0000, "IA32_MTRR_FIX4K_F0000");</span><br><span style="color: hsl(120, 100%, 40%);">+ display_4k_mtrr(MTRR_FIX_4K_F8000, 0xf8000, "IA32_MTRR_FIX4K_F8000");</span><br><span style="color: hsl(120, 100%, 40%);">+ address_bits = cpu_phys_address_size();</span><br><span style="color: hsl(120, 100%, 40%);">+ address_mask = (1ULL << address_bits) - 1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Display the variable MTRRs */</span><br><span style="color: hsl(120, 100%, 40%);">+ variable_mtrrs = get_var_mtrr_count();</span><br><span style="color: hsl(120, 100%, 40%);">+ for (i = 0; i < variable_mtrrs; i++)</span><br><span style="color: hsl(120, 100%, 40%);">+ display_variable_mtrr(i, address_mask);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+asmlinkage void display_mtrrs(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))</span><br><span style="color: hsl(120, 100%, 40%);">+ _display_mtrrs();</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c</span><br><span>index 4ee54a3..02ad85f 100644</span><br><span>--- a/src/cpu/x86/mtrr/earlymtrr.c</span><br><span>+++ b/src/cpu/x86/mtrr/earlymtrr.c</span><br><span>@@ -20,13 +20,11 @@</span><br><span> */</span><br><span> int get_free_var_mtrr(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- msr_t msr, maskm;</span><br><span style="color: hsl(120, 100%, 40%);">+ msr_t maskm;</span><br><span> int vcnt;</span><br><span> int i;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Read MTRRCap and get vcnt - variable memory type ranges. */</span><br><span style="color: hsl(0, 100%, 40%);">- msr = rdmsr(MTRR_CAP_MSR);</span><br><span style="color: hsl(0, 100%, 40%);">- vcnt = msr.lo & 0xff;</span><br><span style="color: hsl(120, 100%, 40%);">+ vcnt = get_var_mtrr_count();</span><br><span> </span><br><span> /* Identify the first var mtrr which is not valid. */</span><br><span> for (i = 0; i < vcnt; i++) {</span><br><span>diff --git a/src/drivers/intel/fsp1_1/after_raminit.S b/src/drivers/intel/fsp1_1/after_raminit.S</span><br><span>index cd56ea8..cdc8e93 100644</span><br><span>--- a/src/drivers/intel/fsp1_1/after_raminit.S</span><br><span>+++ b/src/drivers/intel/fsp1_1/after_raminit.S</span><br><span>@@ -66,7 +66,7 @@</span><br><span> 1:</span><br><span> #endif</span><br><span> /* Display the MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- call soc_display_mtrrs</span><br><span style="color: hsl(120, 100%, 40%);">+ call display_mtrrs</span><br><span> </span><br><span> /*</span><br><span> * The stack contents are initialized in src/soc/intel/common/stack.c</span><br><span>diff --git a/src/drivers/intel/fsp1_1/car.c b/src/drivers/intel/fsp1_1/car.c</span><br><span>index 4016ba1..13161d6 100644</span><br><span>--- a/src/drivers/intel/fsp1_1/car.c</span><br><span>+++ b/src/drivers/intel/fsp1_1/car.c</span><br><span>@@ -15,10 +15,10 @@</span><br><span> </span><br><span> #include <arch/early_variables.h></span><br><span> #include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/x86/mtrr.h></span><br><span> #include <fsp/car.h></span><br><span> #include <fsp/util.h></span><br><span> #include <program_loading.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/intel/common/util.h></span><br><span> #include <timestamp.h></span><br><span> </span><br><span> FSP_INFO_HEADER *fih_car CAR_GLOBAL;</span><br><span>@@ -95,7 +95,7 @@</span><br><span> {</span><br><span> timestamp_add_now(TS_FSP_TEMP_RAM_EXIT_END);</span><br><span> printk(BIOS_DEBUG, "FspTempRamExit returned successfully\n");</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrrs();</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrrs();</span><br><span> </span><br><span> after_cache_as_ram_stage();</span><br><span> }</span><br><span>diff --git a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h</span><br><span>index a9f6a8d..13769b3 100644</span><br><span>--- a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h</span><br><span>+++ b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h</span><br><span>@@ -18,7 +18,6 @@</span><br><span> #define _INTEL_COMMON_RAMSTAGE_H_</span><br><span> </span><br><span> #include <fsp/util.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/intel/common/util.h></span><br><span> #include <stdint.h></span><br><span> </span><br><span> /*</span><br><span>diff --git a/src/drivers/intel/fsp1_1/include/fsp/romstage.h b/src/drivers/intel/fsp1_1/include/fsp/romstage.h</span><br><span>index d79be70..e266bee 100644</span><br><span>--- a/src/drivers/intel/fsp1_1/include/fsp/romstage.h</span><br><span>+++ b/src/drivers/intel/fsp1_1/include/fsp/romstage.h</span><br><span>@@ -22,7 +22,6 @@</span><br><span> #include <memory_info.h></span><br><span> #include <fsp/car.h></span><br><span> #include <fsp/util.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/intel/common/util.h></span><br><span> #include <soc/intel/common/mma.h></span><br><span> #include <soc/pei_wrapper.h></span><br><span> #include <soc/pm.h> /* chip_power_state */</span><br><span>diff --git a/src/drivers/intel/fsp1_1/stack.c b/src/drivers/intel/fsp1_1/stack.c</span><br><span>index 06c0e63..eb2a637 100644</span><br><span>--- a/src/drivers/intel/fsp1_1/stack.c</span><br><span>+++ b/src/drivers/intel/fsp1_1/stack.c</span><br><span>@@ -38,12 +38,12 @@</span><br><span> uint32_t *slot;</span><br><span> </span><br><span> /* Display the MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrrs();</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrrs();</span><br><span> </span><br><span> /* Top of stack needs to be aligned to a 8-byte boundary. */</span><br><span> slot = (void *)romstage_ram_stack_top();</span><br><span> num_mtrrs = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- max_mtrrs = soc_get_variable_mtrr_count(NULL);</span><br><span style="color: hsl(120, 100%, 40%);">+ max_mtrrs = get_var_mtrr_count();</span><br><span> </span><br><span> /*</span><br><span> * The upper bits of the MTRR mask need to set according to the number</span><br><span>diff --git a/src/drivers/intel/fsp2_0/debug.c b/src/drivers/intel/fsp2_0/debug.c</span><br><span>index 8f4dc1e..d098772 100644</span><br><span>--- a/src/drivers/intel/fsp2_0/debug.c</span><br><span>+++ b/src/drivers/intel/fsp2_0/debug.c</span><br><span>@@ -11,8 +11,8 @@</span><br><span> </span><br><span> #include <console/console.h></span><br><span> #include <console/streams.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/x86/mtrr.h></span><br><span> #include <fsp/util.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/intel/common/util.h></span><br><span> </span><br><span> asmlinkage size_t fsp_write_line(uint8_t *buffer, size_t number_of_bytes)</span><br><span> {</span><br><span>@@ -28,9 +28,7 @@</span><br><span> const FSPM_UPD *fspm_old_upd,</span><br><span> const FSPM_UPD *fspm_new_upd)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- /* Display the MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrrs();</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrrs();</span><br><span> </span><br><span> /* Display the UPD values */</span><br><span> if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))</span><br><span>@@ -62,9 +60,7 @@</span><br><span> if (IS_ENABLED(CONFIG_VERIFY_HOBS))</span><br><span> fsp_verify_memory_init_hobs();</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Display the MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrrs();</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrrs();</span><br><span> }</span><br><span> </span><br><span> /*-----------</span><br><span>@@ -75,9 +71,7 @@</span><br><span> const FSPS_UPD *fsps_old_upd,</span><br><span> const FSPS_UPD *fsps_new_upd)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- /* Display the MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrrs();</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrrs();</span><br><span> </span><br><span> /* Display the UPD values */</span><br><span> if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))</span><br><span>@@ -99,9 +93,7 @@</span><br><span> if (IS_ENABLED(CONFIG_DISPLAY_HOBS))</span><br><span> fsp_display_hobs();</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Display the MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrrs();</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrrs();</span><br><span> }</span><br><span> </span><br><span> /*-----------</span><br><span>@@ -129,7 +121,5 @@</span><br><span> if (IS_ENABLED(CONFIG_DISPLAY_HOBS))</span><br><span> fsp_display_hobs();</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Display the MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrrs();</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrrs();</span><br><span> }</span><br><span>diff --git a/src/drivers/intel/fsp2_0/notify.c b/src/drivers/intel/fsp2_0/notify.c</span><br><span>index c3a2804..a5c7ef0 100644</span><br><span>--- a/src/drivers/intel/fsp2_0/notify.c</span><br><span>+++ b/src/drivers/intel/fsp2_0/notify.c</span><br><span>@@ -12,8 +12,8 @@</span><br><span> </span><br><span> #include <bootstate.h></span><br><span> #include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/x86/mtrr.h></span><br><span> #include <fsp/util.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/intel/common/util.h></span><br><span> #include <string.h></span><br><span> #include <timestamp.h></span><br><span> </span><br><span>@@ -70,9 +70,7 @@</span><br><span> {</span><br><span> enum fsp_notify_phase phase = (uint32_t)arg;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Display the MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrrs();</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrrs();</span><br><span> </span><br><span> fsp_notify(phase);</span><br><span> if (phase == READY_TO_BOOT)</span><br><span>diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h</span><br><span>index 1f704ac..eb7d78d 100644</span><br><span>--- a/src/include/cpu/x86/mtrr.h</span><br><span>+++ b/src/include/cpu/x86/mtrr.h</span><br><span>@@ -99,10 +99,17 @@</span><br><span> * This function needs to be called after the first MTRR solution is derived. */</span><br><span> void mtrr_use_temp_range(uintptr_t begin, size_t size, int type);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+static inline int get_var_mtrr_count(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ return rdmsr(MTRR_CAP_MSR).lo & MTRR_CAP_VCNT;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> void set_var_mtrr(unsigned int reg, unsigned int base, unsigned int size,</span><br><span> unsigned int type);</span><br><span> int get_free_var_mtrr(void);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+asmlinkage void display_mtrrs(void);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /*</span><br><span> * Set the MTRRs using the data on the stack from setup_stack_and_mtrrs.</span><br><span> * Return a new top_of_stack value which removes the setup_stack_and_mtrrs data.</span><br><span>diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig</span><br><span>index 27d3f59..b5caf40 100644</span><br><span>--- a/src/soc/intel/common/Kconfig</span><br><span>+++ b/src/soc/intel/common/Kconfig</span><br><span>@@ -1,5 +1,6 @@</span><br><span> config SOC_INTEL_COMMON</span><br><span> bool</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_DISPLAY_MTRRS</span><br><span> help</span><br><span> common code for Intel SOCs</span><br><span> </span><br><span>@@ -14,10 +15,6 @@</span><br><span> comment "Intel SoC Common coreboot stages"</span><br><span> source "src/soc/intel/common/basecode/Kconfig"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config DISPLAY_MTRRS</span><br><span style="color: hsl(0, 100%, 40%);">- bool "MTRRs: Display the MTRR settings"</span><br><span style="color: hsl(0, 100%, 40%);">- default n</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> config DISPLAY_SMM_MEMORY_MAP</span><br><span> bool "SMM: Display the SMM memory map"</span><br><span> default n</span><br><span>diff --git a/src/soc/intel/common/Makefile.inc b/src/soc/intel/common/Makefile.inc</span><br><span>index 11a4575..22d350c 100644</span><br><span>--- a/src/soc/intel/common/Makefile.inc</span><br><span>+++ b/src/soc/intel/common/Makefile.inc</span><br><span>@@ -4,23 +4,18 @@</span><br><span> subdirs-y += block/</span><br><span> subdirs-y += pch/</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-bootblock-y += util.c</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> verstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c</span><br><span> </span><br><span> bootblock-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c</span><br><span> </span><br><span> romstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c</span><br><span style="color: hsl(0, 100%, 40%);">-romstage-y += util.c</span><br><span> romstage-$(CONFIG_MMA) += mma.c</span><br><span> romstage-y += smbios.c</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-postcar-y += util.c</span><br><span> postcar-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c</span><br><span> </span><br><span> ramstage-y += hda_verb.c</span><br><span> ramstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c</span><br><span style="color: hsl(0, 100%, 40%);">-ramstage-y += util.c</span><br><span> ramstage-$(CONFIG_MMA) += mma.c</span><br><span> ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c</span><br><span> ramstage-y += vbt.c</span><br><span>diff --git a/src/soc/intel/common/util.c b/src/soc/intel/common/util.c</span><br><span>deleted file mode 100644</span><br><span>index fadef60..0000000</span><br><span>--- a/src/soc/intel/common/util.c</span><br><span>+++ /dev/null</span><br><span>@@ -1,224 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2015-2016 Intel Corporation.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#include <console/console.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/mtrr.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/intel/common/util.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <stddef.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-uint32_t soc_get_variable_mtrr_count(uint64_t *msr)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- union {</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t u64;</span><br><span style="color: hsl(0, 100%, 40%);">- msr_t s;</span><br><span style="color: hsl(0, 100%, 40%);">- } mtrrcap;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- mtrrcap.s = rdmsr(MTRR_CAP_MSR);</span><br><span style="color: hsl(0, 100%, 40%);">- if (msr != NULL)</span><br><span style="color: hsl(0, 100%, 40%);">- *msr = mtrrcap.u64;</span><br><span style="color: hsl(0, 100%, 40%);">- return mtrrcap.u64 & MTRR_CAP_VCNT;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static const char *soc_display_mtrr_type(uint32_t type)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- switch (type) {</span><br><span style="color: hsl(0, 100%, 40%);">- default: return "reserved";</span><br><span style="color: hsl(0, 100%, 40%);">- case 0: return "UC";</span><br><span style="color: hsl(0, 100%, 40%);">- case 1: return "WC";</span><br><span style="color: hsl(0, 100%, 40%);">- case 4: return "WT";</span><br><span style="color: hsl(0, 100%, 40%);">- case 5: return "WP";</span><br><span style="color: hsl(0, 100%, 40%);">- case 6: return "WB";</span><br><span style="color: hsl(0, 100%, 40%);">- case 7: return "UC-";</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static void soc_display_mtrr_fixed_types(uint64_t msr,</span><br><span style="color: hsl(0, 100%, 40%);">- uint32_t starting_address, uint32_t memory_size)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- uint32_t base_address;</span><br><span style="color: hsl(0, 100%, 40%);">- uint32_t index;</span><br><span style="color: hsl(0, 100%, 40%);">- uint32_t next_address;</span><br><span style="color: hsl(0, 100%, 40%);">- uint32_t next_type;</span><br><span style="color: hsl(0, 100%, 40%);">- uint32_t type;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- type = msr & MTRR_DEF_TYPE_MASK;</span><br><span style="color: hsl(0, 100%, 40%);">- base_address = starting_address;</span><br><span style="color: hsl(0, 100%, 40%);">- next_address = base_address;</span><br><span style="color: hsl(0, 100%, 40%);">- for (index = 0; index < 64; index += 8) {</span><br><span style="color: hsl(0, 100%, 40%);">- next_address = starting_address + (memory_size *</span><br><span style="color: hsl(0, 100%, 40%);">- ((index >> 3) + 1));</span><br><span style="color: hsl(0, 100%, 40%);">- next_type = (msr >> index) & MTRR_DEF_TYPE_MASK;</span><br><span style="color: hsl(0, 100%, 40%);">- if (next_type != type) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, " 0x%08x - 0x%08x: %s\n",</span><br><span style="color: hsl(0, 100%, 40%);">- base_address, next_address - 1,</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrr_type(type));</span><br><span style="color: hsl(0, 100%, 40%);">- base_address = next_address;</span><br><span style="color: hsl(0, 100%, 40%);">- type = next_type;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- if (base_address != next_address)</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, " 0x%08x - 0x%08x: %s\n",</span><br><span style="color: hsl(0, 100%, 40%);">- base_address, next_address - 1,</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrr_type(type));</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static void soc_display_4k_mtrr(uint32_t msr_reg, uint32_t starting_address,</span><br><span style="color: hsl(0, 100%, 40%);">- const char *name)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- union {</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t u64;</span><br><span style="color: hsl(0, 100%, 40%);">- msr_t s;</span><br><span style="color: hsl(0, 100%, 40%);">- } msr;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- msr.s = rdmsr(msr_reg);</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "0x%016llx: %s\n", msr.u64, name);</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrr_fixed_types(msr.u64, starting_address, 0x1000);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static void soc_display_16k_mtrr(uint32_t msr_reg, uint32_t starting_address,</span><br><span style="color: hsl(0, 100%, 40%);">- const char *name)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- union {</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t u64;</span><br><span style="color: hsl(0, 100%, 40%);">- msr_t s;</span><br><span style="color: hsl(0, 100%, 40%);">- } msr;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- msr.s = rdmsr(msr_reg);</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "0x%016llx: %s\n", msr.u64, name);</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrr_fixed_types(msr.u64, starting_address, 0x4000);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static void soc_display_64k_mtrr(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- union {</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t u64;</span><br><span style="color: hsl(0, 100%, 40%);">- msr_t s;</span><br><span style="color: hsl(0, 100%, 40%);">- } msr;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- msr.s = rdmsr(MTRR_FIX_64K_00000);</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "0x%016llx: IA32_MTRR_FIX64K_00000\n", msr.u64);</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrr_fixed_types(msr.u64, 0, 0x10000);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static uint32_t soc_display_mtrrcap(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t msr;</span><br><span style="color: hsl(0, 100%, 40%);">- uint32_t variable_mtrrs;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- variable_mtrrs = soc_get_variable_mtrr_count(&msr);</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG,</span><br><span style="color: hsl(0, 100%, 40%);">- "0x%016llx: IA32_MTRRCAP: %s%s%s%d variable MTRRs\n",</span><br><span style="color: hsl(0, 100%, 40%);">- msr,</span><br><span style="color: hsl(0, 100%, 40%);">- (msr & MTRR_CAP_SMRR) ? "SMRR, " : "",</span><br><span style="color: hsl(0, 100%, 40%);">- (msr & MTRR_CAP_WC) ? "WC, " : "",</span><br><span style="color: hsl(0, 100%, 40%);">- (msr & MTRR_CAP_FIX) ? "FIX, " : "",</span><br><span style="color: hsl(0, 100%, 40%);">- variable_mtrrs);</span><br><span style="color: hsl(0, 100%, 40%);">- return variable_mtrrs;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static void soc_display_mtrr_def_type(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- union {</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t u64;</span><br><span style="color: hsl(0, 100%, 40%);">- msr_t s;</span><br><span style="color: hsl(0, 100%, 40%);">- } msr;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- msr.s = rdmsr(MTRR_DEF_TYPE_MSR);</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "0x%016llx: IA32_MTRR_DEF_TYPE:%s%s %s\n",</span><br><span style="color: hsl(0, 100%, 40%);">- msr.u64,</span><br><span style="color: hsl(0, 100%, 40%);">- (msr.u64 & MTRR_DEF_TYPE_EN) ? " E," : "",</span><br><span style="color: hsl(0, 100%, 40%);">- (msr.u64 & MTRR_DEF_TYPE_FIX_EN) ? " FE," : "",</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrr_type((uint32_t)(msr.u64 &</span><br><span style="color: hsl(0, 100%, 40%);">- MTRR_DEF_TYPE_MASK)));</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static void soc_display_variable_mtrr(uint32_t msr_reg, int index,</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t address_mask)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t base_address;</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t length;</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t mask;</span><br><span style="color: hsl(0, 100%, 40%);">- union {</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t u64;</span><br><span style="color: hsl(0, 100%, 40%);">- msr_t s;</span><br><span style="color: hsl(0, 100%, 40%);">- } msr_a;</span><br><span style="color: hsl(0, 100%, 40%);">- union {</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t u64;</span><br><span style="color: hsl(0, 100%, 40%);">- msr_t s;</span><br><span style="color: hsl(0, 100%, 40%);">- } msr_m;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- msr_a.s = rdmsr(msr_reg);</span><br><span style="color: hsl(0, 100%, 40%);">- msr_m.s = rdmsr(msr_reg + 1);</span><br><span style="color: hsl(0, 100%, 40%);">- if (msr_m.u64 & MTRR_PHYS_MASK_VALID) {</span><br><span style="color: hsl(0, 100%, 40%);">- base_address = (msr_a.u64 & 0xfffffffffffff000ULL)</span><br><span style="color: hsl(0, 100%, 40%);">- & address_mask;</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG,</span><br><span style="color: hsl(0, 100%, 40%);">- "0x%016llx: PHYBASE%d: Address = 0x%016llx, %s\n",</span><br><span style="color: hsl(0, 100%, 40%);">- msr_a.u64, index, base_address,</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrr_type(msr_a.u64 & MTRR_DEF_TYPE_MASK));</span><br><span style="color: hsl(0, 100%, 40%);">- mask = (msr_m.u64 & 0xfffffffffffff000ULL) & address_mask;</span><br><span style="color: hsl(0, 100%, 40%);">- length = (~mask & address_mask) + 1;</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG,</span><br><span style="color: hsl(0, 100%, 40%);">- "0x%016llx: PHYMASK%d: Length = 0x%016llx, Valid\n",</span><br><span style="color: hsl(0, 100%, 40%);">- msr_m.u64, index, length);</span><br><span style="color: hsl(0, 100%, 40%);">- } else {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "0x%016llx: PHYBASE%d\n", msr_a.u64, index);</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "0x%016llx: PHYMASK%d: Disabled\n",</span><br><span style="color: hsl(0, 100%, 40%);">- msr_m.u64, index);</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-asmlinkage void soc_display_mtrrs(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_DISPLAY_MTRRS)) {</span><br><span style="color: hsl(0, 100%, 40%);">- uint32_t address_bits;</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t address_mask;</span><br><span style="color: hsl(0, 100%, 40%);">- int i;</span><br><span style="color: hsl(0, 100%, 40%);">- int variable_mtrrs;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Display the fixed MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- variable_mtrrs = soc_display_mtrrcap();</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrr_def_type();</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_64k_mtrr();</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_16k_mtrr(MTRR_FIX_16K_80000, 0x80000,</span><br><span style="color: hsl(0, 100%, 40%);">- "IA32_MTRR_FIX16K_80000");</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_16k_mtrr(MTRR_FIX_16K_A0000, 0xa0000,</span><br><span style="color: hsl(0, 100%, 40%);">- "IA32_MTRR_FIX16K_A0000");</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_4k_mtrr(MTRR_FIX_4K_C0000, 0xc0000,</span><br><span style="color: hsl(0, 100%, 40%);">- "IA32_MTRR_FIX4K_C0000");</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_4k_mtrr(MTRR_FIX_4K_C8000, 0xc8000,</span><br><span style="color: hsl(0, 100%, 40%);">- "IA32_MTRR_FIX4K_C8000");</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_4k_mtrr(MTRR_FIX_4K_D0000, 0xd0000,</span><br><span style="color: hsl(0, 100%, 40%);">- "IA32_MTRR_FIX4K_D0000");</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_4k_mtrr(MTRR_FIX_4K_D8000, 0xd8000,</span><br><span style="color: hsl(0, 100%, 40%);">- "IA32_MTRR_FIX4K_D8000");</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_4k_mtrr(MTRR_FIX_4K_E0000, 0xe0000,</span><br><span style="color: hsl(0, 100%, 40%);">- "IA32_MTRR_FIX4K_E0000");</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_4k_mtrr(MTRR_FIX_4K_E8000, 0xe8000,</span><br><span style="color: hsl(0, 100%, 40%);">- "IA32_MTRR_FIX4K_E8000");</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_4k_mtrr(MTRR_FIX_4K_F0000, 0xf0000,</span><br><span style="color: hsl(0, 100%, 40%);">- "IA32_MTRR_FIX4K_F0000");</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_4k_mtrr(MTRR_FIX_4K_F8000, 0xf8000,</span><br><span style="color: hsl(0, 100%, 40%);">- "IA32_MTRR_FIX4K_F8000");</span><br><span style="color: hsl(0, 100%, 40%);">- address_bits = cpu_phys_address_size();</span><br><span style="color: hsl(0, 100%, 40%);">- address_mask = (1ULL << address_bits) - 1;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Display the variable MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- for (i = 0; i < variable_mtrrs; i++)</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_variable_mtrr(MTRR_PHYS_BASE(i), i,</span><br><span style="color: hsl(0, 100%, 40%);">- address_mask);</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/soc/intel/common/util.h b/src/soc/intel/common/util.h</span><br><span>deleted file mode 100644</span><br><span>index 854f2b0..0000000</span><br><span>--- a/src/soc/intel/common/util.h</span><br><span>+++ /dev/null</span><br><span>@@ -1,26 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2015 Intel Corporation.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef _INTEL_COMMON_UTIL_H_</span><br><span style="color: hsl(0, 100%, 40%);">-#define _INTEL_COMMON_UTIL_H_</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/msr.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <stdint.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-asmlinkage void soc_display_mtrrs(void);</span><br><span style="color: hsl(0, 100%, 40%);">-uint32_t soc_get_variable_mtrr_count(uint64_t *msr);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#endif /* _INTEL_COMMON_UTIL_H_ */</span><br><span>diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc</span><br><span>index 741f5d3..654f0a7 100644</span><br><span>--- a/src/soc/intel/quark/Makefile.inc</span><br><span>+++ b/src/soc/intel/quark/Makefile.inc</span><br><span>@@ -16,6 +16,7 @@</span><br><span> ifeq ($(CONFIG_SOC_INTEL_QUARK),y)</span><br><span> </span><br><span> subdirs-y += romstage</span><br><span style="color: hsl(120, 100%, 40%);">+subdirs-y += ../../../cpu/x86/mtrr</span><br><span> subdirs-y += ../../../cpu/x86/tsc</span><br><span> </span><br><span> bootblock-y += bootblock/esram_init.S</span><br><span>diff --git a/src/soc/intel/quark/bootblock/bootblock.c b/src/soc/intel/quark/bootblock/bootblock.c</span><br><span>index 38730ea..d3aa900 100644</span><br><span>--- a/src/soc/intel/quark/bootblock/bootblock.c</span><br><span>+++ b/src/soc/intel/quark/bootblock/bootblock.c</span><br><span>@@ -15,10 +15,10 @@</span><br><span> */</span><br><span> #include <bootblock_common.h></span><br><span> #include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/x86/mtrr.h></span><br><span> #include <device/pci_def.h></span><br><span> #include <program_loading.h></span><br><span> #include <soc/iomap.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/intel/common/util.h></span><br><span> #include <soc/pci_devs.h></span><br><span> #include <soc/reg_access.h></span><br><span> </span><br><span>@@ -112,8 +112,7 @@</span><br><span> if (IS_ENABLED(CONFIG_ENABLE_DEBUG_LED_SOC_INIT_ENTRY))</span><br><span> light_sd_led();</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Display the MTRRs */</span><br><span style="color: hsl(0, 100%, 40%);">- soc_display_mtrrs();</span><br><span style="color: hsl(120, 100%, 40%);">+ display_mtrrs();</span><br><span> }</span><br><span> </span><br><span> void platform_prog_run(struct prog *prog)</span><br><span>diff --git a/src/soc/intel/quark/include/soc/ramstage.h b/src/soc/intel/quark/include/soc/ramstage.h</span><br><span>index 4ad0fedc..821f43e 100644</span><br><span>--- a/src/soc/intel/quark/include/soc/ramstage.h</span><br><span>+++ b/src/soc/intel/quark/include/soc/ramstage.h</span><br><span>@@ -17,6 +17,7 @@</span><br><span> #ifndef _SOC_RAMSTAGE_H_</span><br><span> #define _SOC_RAMSTAGE_H_</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/cpu.h></span><br><span> #include <chip.h></span><br><span> #include <device/device.h></span><br><span> #if IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1)</span><br><span>diff --git a/src/soc/intel/quark/romstage/mtrr.c b/src/soc/intel/quark/romstage/mtrr.c</span><br><span>index 6f2f00c..47bfde4 100644</span><br><span>--- a/src/soc/intel/quark/romstage/mtrr.c</span><br><span>+++ b/src/soc/intel/quark/romstage/mtrr.c</span><br><span>@@ -16,7 +16,6 @@</span><br><span> </span><br><span> #include <cpu/x86/msr.h></span><br><span> #include <cpu/x86/mtrr.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/intel/common/util.h></span><br><span> #include <soc/pci_devs.h></span><br><span> #include <soc/reg_access.h></span><br><span> </span><br><span>diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_complete.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_complete.dat</span><br><span>index 267673a..3417212 100644</span><br><span>--- a/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_complete.dat</span><br><span>+++ b/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_complete.dat</span><br><span>@@ -40,8 +40,6 @@</span><br><span> smm_region_size</span><br><span> soc_after_ram_init</span><br><span> soc_display_memory_init_params</span><br><span style="color: hsl(0, 100%, 40%);">-soc_display_mtrrs</span><br><span style="color: hsl(0, 100%, 40%);">-soc_get_variable_mtrr_count</span><br><span> soc_memory_init_params</span><br><span> soc_pre_ram_init</span><br><span> southbridge_smi_handler</span><br><span>diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat</span><br><span>index 70f204d..0835190 100644</span><br><span>--- a/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat</span><br><span>+++ b/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat</span><br><span>@@ -23,8 +23,6 @@</span><br><span> save_chromeos_gpios</span><br><span> soc_after_ram_init</span><br><span> soc_display_memory_init_params</span><br><span style="color: hsl(0, 100%, 40%);">-soc_display_mtrrs</span><br><span style="color: hsl(0, 100%, 40%);">-soc_get_variable_mtrr_count</span><br><span> soc_memory_init_params</span><br><span> soc_pre_ram_init</span><br><span> southbridge_smi_handler</span><br><span>diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_complete.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_complete.dat</span><br><span>index 2124f0f..0910152 100644</span><br><span>--- a/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_complete.dat</span><br><span>+++ b/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_complete.dat</span><br><span>@@ -22,8 +22,6 @@</span><br><span> platform_prog_run</span><br><span> platform_segment_loaded</span><br><span> save_chromeos_gpios</span><br><span style="color: hsl(0, 100%, 40%);">-soc_display_mtrrs</span><br><span style="color: hsl(0, 100%, 40%);">-soc_get_variable_mtrr_count</span><br><span> stage_cache_add</span><br><span> stage_cache_load_stage</span><br><span> timestamp_get</span><br><span>diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_optional.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_optional.dat</span><br><span>index f589eaa..fe1f0d9 100644</span><br><span>--- a/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_optional.dat</span><br><span>+++ b/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_optional.dat</span><br><span>@@ -9,8 +9,6 @@</span><br><span> mainboard_post</span><br><span> platform_prog_run</span><br><span> platform_segment_loaded</span><br><span style="color: hsl(0, 100%, 40%);">-soc_display_mtrrs</span><br><span style="color: hsl(0, 100%, 40%);">-soc_get_variable_mtrr_count</span><br><span> stage_cache_add</span><br><span> stage_cache_load_stage</span><br><span> timestamp_get</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29684">change 29684</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/29684"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ibd0a64121bd6e4ab5d7fd835f3ac25d3f5011f24 </div>
<div style="display:none"> Gerrit-Change-Number: 29684 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Nico Huber <nico.h@gmx.de> </div>