<p>Nico Huber has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29678">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/.../Kconfig: Move GPIO debug option into debug menu<br><br>Rename DEBUG_SOC_COMMON_BLOCK_GPIO to DEBUG_GPIO and move it into the<br>Debugging menu.<br><br>Change-Id: I737d0ee7fb5423b6d16d611a144d43fd3f168a2c<br>Signed-off-by: Nico Huber <nico.h@gmx.de><br>---<br>M src/Kconfig<br>M src/soc/intel/common/block/gpio/Kconfig<br>M src/soc/intel/common/block/gpio/gpio.c<br>M src/soc/intel/denverton_ns/Kconfig<br>4 files changed, 11 insertions(+), 10 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/29678/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/Kconfig b/src/Kconfig</span><br><span>index 0b97125..ce584f5 100644</span><br><span>--- a/src/Kconfig</span><br><span>+++ b/src/Kconfig</span><br><span>@@ -693,6 +693,13 @@</span><br><span> help</span><br><span> If enabled, coreboot will call hlt() on a BUG() or failed ASSERT().</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+config HAVE_DEBUG_GPIO</span><br><span style="color: hsl(120, 100%, 40%);">+ bool</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config DEBUG_GPIO</span><br><span style="color: hsl(120, 100%, 40%);">+ bool "Output verbose GPIO debug messages"</span><br><span style="color: hsl(120, 100%, 40%);">+ depends on HAVE_DEBUG_GPIO</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> config DEBUG_CBFS</span><br><span> bool "Output verbose CBFS debug messages"</span><br><span> default n</span><br><span>diff --git a/src/soc/intel/common/block/gpio/Kconfig b/src/soc/intel/common/block/gpio/Kconfig</span><br><span>index 66cc182..bdbc323 100644</span><br><span>--- a/src/soc/intel/common/block/gpio/Kconfig</span><br><span>+++ b/src/soc/intel/common/block/gpio/Kconfig</span><br><span>@@ -1,15 +1,9 @@</span><br><span> config SOC_INTEL_COMMON_BLOCK_GPIO</span><br><span> bool</span><br><span style="color: hsl(120, 100%, 40%);">+ select HAVE_DEBUG_GPIO</span><br><span> help</span><br><span> Intel Processor common GPIO support</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config DEBUG_SOC_COMMON_BLOCK_GPIO</span><br><span style="color: hsl(0, 100%, 40%);">- depends on SOC_INTEL_COMMON_BLOCK_GPIO</span><br><span style="color: hsl(0, 100%, 40%);">- bool "Output verbose GPIO debug messages"</span><br><span style="color: hsl(0, 100%, 40%);">- default n</span><br><span style="color: hsl(0, 100%, 40%);">- help</span><br><span style="color: hsl(0, 100%, 40%);">- This option enables GPIO debug messages</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> # Use to program Interrupt Polarity Control (IPCx) register</span><br><span> # Each bit represents IRQx Active High Polarity Disable configuration:</span><br><span> # when set to 1, the interrupt polarity associated with IRQx is inverted</span><br><span>diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c</span><br><span>index bd12477..9b6ca7e 100644</span><br><span>--- a/src/soc/intel/common/block/gpio/gpio.c</span><br><span>+++ b/src/soc/intel/common/block/gpio/gpio.c</span><br><span>@@ -265,7 +265,7 @@</span><br><span> soc_pad_conf &= mask[i];</span><br><span> soc_pad_conf |= pad_conf & ~mask[i];</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_DEBUG_SOC_COMMON_BLOCK_GPIO))</span><br><span style="color: hsl(120, 100%, 40%);">+ if (IS_ENABLED(CONFIG_DEBUG_GPIO))</span><br><span> printk(BIOS_DEBUG,</span><br><span> "gpio_padcfg [0x%02x, %02zd] DW%d [0x%08x : 0x%08x"</span><br><span> " : 0x%08x]\n",</span><br><span>@@ -533,7 +533,7 @@</span><br><span> MISCCFG_GPE0_DW1_MASK |</span><br><span> MISCCFG_GPE0_DW0_MASK);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_DEBUG_SOC_COMMON_BLOCK_GPIO))</span><br><span style="color: hsl(120, 100%, 40%);">+ if (IS_ENABLED(CONFIG_DEBUG_GPIO))</span><br><span> printk(BIOS_DEBUG, "misccfg_mask:%x misccfg_value:%x\n",</span><br><span> misccfg_mask, misccfg_value);</span><br><span> comm = soc_gpio_get_community(&gpio_communities);</span><br><span>diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig</span><br><span>index d9490cb..5b704b9 100644</span><br><span>--- a/src/soc/intel/denverton_ns/Kconfig</span><br><span>+++ b/src/soc/intel/denverton_ns/Kconfig</span><br><span>@@ -29,6 +29,7 @@</span><br><span> select BOOTBLOCK_CONSOLE</span><br><span> select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH</span><br><span> select BOOT_DEVICE_SUPPORTS_WRITES</span><br><span style="color: hsl(120, 100%, 40%);">+ select DEBUG_GPIO</span><br><span> select POSTCAR_CONSOLE</span><br><span> select SOC_INTEL_COMMON</span><br><span> select SOC_INTEL_COMMON_RESET</span><br><span>@@ -50,7 +51,6 @@</span><br><span> # select SOC_INTEL_COMMON_BLOCK_SA</span><br><span> select SOC_INTEL_COMMON_BLOCK_FAST_SPI</span><br><span> select SOC_INTEL_COMMON_BLOCK_GPIO</span><br><span style="color: hsl(0, 100%, 40%);">- select DEBUG_SOC_COMMON_BLOCK_GPIO</span><br><span> select SOC_INTEL_COMMON_BLOCK_PCR</span><br><span> select TSC_CONSTANT_RATE</span><br><span> select TSC_MONOTONIC_TIMER</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29678">change 29678</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I737d0ee7fb5423b6d16d611a144d43fd3f168a2c </div>
<div style="display:none"> Gerrit-Change-Number: 29678 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Nico Huber <nico.h@gmx.de> </div>