<p>Frans Hendriks has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29660">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">drivers/intel/fsp1_1: Add post console init functions for C bootblock<br><br>The console post init functions are not executed in C_ENVIRONMENT_BOOTBLOCK<br>mode.<br>Add car_XXXX_post_console_init functions to romstage_c_entry().<br><br>BUG=NA<br>TEST=Portwell PQ7-M107<br><br>Change-Id: I12e613147e5203022cd453693a115fca002ce480<br>Signed-off-by: Frans Hendriks <fhendriks@eltan.com><br>---<br>M src/drivers/intel/fsp1_1/car.c<br>1 file changed, 10 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/29660/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/drivers/intel/fsp1_1/car.c b/src/drivers/intel/fsp1_1/car.c</span><br><span>index 4016ba1..4569454 100644</span><br><span>--- a/src/drivers/intel/fsp1_1/car.c</span><br><span>+++ b/src/drivers/intel/fsp1_1/car.c</span><br><span>@@ -2,6 +2,7 @@</span><br><span>  * This file is part of the coreboot project.</span><br><span>  *</span><br><span>  * Copyright 2015 Google Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright 2018 Eltan B.V.</span><br><span>  *</span><br><span>  * This program is free software; you can redistribute it and/or modify</span><br><span>  * it under the terms of the GNU General Public License as published by</span><br><span>@@ -67,7 +68,10 @@</span><br><span>       return cache_as_ram_stage_main(car_params->fih);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-/* Entry point taken when romstage is called after a separate verstage. */</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Entry point taken when romstage is called after a separate verstage or</span><br><span style="color: hsl(120, 100%, 40%);">+ * when the C_ENVIRONMENT_BOOTBLOCK is enabled</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span> asmlinkage void *romstage_c_entry(void)</span><br><span> {</span><br><span>   /* Need to locate the current FSP_INFO_HEADER. The cache-as-ram</span><br><span>@@ -77,6 +81,11 @@</span><br><span> </span><br><span>     console_init();</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+   if (IS_ENABLED(CONFIG_C_ENVIRONMENT_BOOTBLOCK)) {</span><br><span style="color: hsl(120, 100%, 40%);">+             car_soc_post_console_init();</span><br><span style="color: hsl(120, 100%, 40%);">+          car_mainboard_post_console_init();</span><br><span style="color: hsl(120, 100%, 40%);">+    }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>  if (prog_locate(&fsp)) {</span><br><span>                 fih = NULL;</span><br><span>          printk(BIOS_ERR, "Unable to locate %s\n", prog_name(&fsp));</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29660">change 29660</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/29660"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I12e613147e5203022cd453693a115fca002ce480 </div>
<div style="display:none"> Gerrit-Change-Number: 29660 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Frans Hendriks <fhendriks@eltan.com> </div>