<p>Duncan Laurie has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29552">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/cannonlake: Remove SmbusEnable<br><br>Remove the SmbusEnable config option from devicetree and instead<br>use the state of the PCI device to determine if it should be<br>enabled or disabled.<br><br>Change-Id: Id362009e4c8e91699d1ca9bb3c2614e21cfc462a<br>Signed-off-by: Duncan Laurie <dlaurie@google.com><br>---<br>M src/soc/intel/cannonlake/chip.h<br>M src/soc/intel/cannonlake/romstage/fsp_params.c<br>2 files changed, 5 insertions(+), 4 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/29552/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h</span><br><span>index 2deb35f..015133e 100644</span><br><span>--- a/src/soc/intel/cannonlake/chip.h</span><br><span>+++ b/src/soc/intel/cannonlake/chip.h</span><br><span>@@ -166,9 +166,6 @@</span><br><span>    * clksrc. */</span><br><span>        uint8_t PcieClkSrcClkReq[CONFIG_MAX_ROOT_PORTS];</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-    /* SMBus */</span><br><span style="color: hsl(0, 100%, 40%);">-     uint8_t SmbusEnable;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span>         /* eMMC and SD */</span><br><span>    uint8_t ScsEmmcHs400Enabled;</span><br><span>         /* Need to update DLL setting to get Emmc running at HS400 speed */</span><br><span>diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c</span><br><span>index 8506214..8f6fa2f 100644</span><br><span>--- a/src/soc/intel/cannonlake/romstage/fsp_params.c</span><br><span>+++ b/src/soc/intel/cannonlake/romstage/fsp_params.c</span><br><span>@@ -66,6 +66,7 @@</span><br><span> void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)</span><br><span> {</span><br><span>       const struct device *dev = dev_find_slot(0, PCH_DEVFN_LPC);</span><br><span style="color: hsl(120, 100%, 40%);">+   const struct device *smbus = dev_find_slot(0, PCH_DEVFN_SMBUS);</span><br><span>      assert(dev != NULL);</span><br><span>         const config_t *config = dev->chip_info;</span><br><span>  FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;</span><br><span>@@ -73,7 +74,10 @@</span><br><span>         soc_memory_init_params(m_cfg, config);</span><br><span> </span><br><span>   /* Enable SMBus controller based on config */</span><br><span style="color: hsl(0, 100%, 40%);">-   m_cfg->SmbusEnable = config->SmbusEnable;</span><br><span style="color: hsl(120, 100%, 40%);">+       if (!smbus)</span><br><span style="color: hsl(120, 100%, 40%);">+           m_cfg->SmbusEnable = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+    else</span><br><span style="color: hsl(120, 100%, 40%);">+          m_cfg->SmbusEnable = smbus->enabled;</span><br><span>   /* Set debug probe type */</span><br><span>   m_cfg->PlatformDebugConsent = config->DebugConsent;</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29552">change 29552</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/29552"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Id362009e4c8e91699d1ca9bb3c2614e21cfc462a </div>
<div style="display:none"> Gerrit-Change-Number: 29552 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Duncan Laurie <dlaurie@chromium.org> </div>