<p>Nick Vaccaro has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29538">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/google/poppy/variant/nocturne: configure SAR irqs to use PLTRST<br><br>GPIO's that use GPI_APIC setting with DEEP causes an IRQ storm after<br>S3 resume. GPIOs that fire IRQs via IOAPIC need to get their logic<br>reset over PLTRST to prevent IRQ strom after S3 resume and hence<br>configuring GPP_D9 and GPP_D10 to use PLTRST.<br><br>BUG=b:119202293<br>TEST=none<br><br>Change-Id: I98d71100f28fb9bae05db3fb7d9afcb3f81beb43<br>Signed-off-by: Nick Vaccaro <nvaccaro@google.com><br>---<br>M src/mainboard/google/poppy/variants/nocturne/gpio.c<br>1 file changed, 2 insertions(+), 2 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/29538/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/poppy/variants/nocturne/gpio.c b/src/mainboard/google/poppy/variants/nocturne/gpio.c</span><br><span>index 9aa7706..70b748b 100644</span><br><span>--- a/src/mainboard/google/poppy/variants/nocturne/gpio.c</span><br><span>+++ b/src/mainboard/google/poppy/variants/nocturne/gpio.c</span><br><span>@@ -180,9 +180,9 @@</span><br><span>  /* D8  : ISH_I2C1_SCL ==> NC */</span><br><span>   PAD_CFG_NC(GPP_D8),</span><br><span>  /* D9  : ISH_SPI_CS# ==> PCH_SR1_INT_L */</span><br><span style="color: hsl(0, 100%, 40%);">-    PAD_CFG_GPI_APIC(GPP_D9, NONE, DEEP),</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC(GPP_D9, NONE, PLTRST),</span><br><span>      /* D10 : ISH_SPI_CLK ==> PCH_SR0_INT_L */</span><br><span style="color: hsl(0, 100%, 40%);">-    PAD_CFG_GPI_APIC(GPP_D10, NONE, DEEP),</span><br><span style="color: hsl(120, 100%, 40%);">+        PAD_CFG_GPI_APIC(GPP_D10, NONE, PLTRST),</span><br><span>     /* D11 : ISH_SPI_MISO ==> NC */</span><br><span>   PAD_CFG_NC(GPP_D11),</span><br><span>         /* D12 : ISH_SPI_MOSI ==> NC */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29538">change 29538</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/29538"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I98d71100f28fb9bae05db3fb7d9afcb3f81beb43 </div>
<div style="display:none"> Gerrit-Change-Number: 29538 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Nick Vaccaro <nvaccaro@google.com> </div>