<p>Mario Scheithauer has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29528">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">siemens/mc_apl3: Set bus master bit for on-board PCI device<br><br>There is an on-board PCI device where bus master has to be enabled in<br>PCI configuration space. As there is no need for a complete PCI driver<br>for this device just set the bus master bit in mainboard_final().<br><br>Change-Id: I1ef4a7774d4ca75c230063debbc63d03486fed6f<br>Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com><br>---<br>M src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c<br>1 file changed, 10 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/29528/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c</span><br><span>index bfcf38e..f41fe73 100644</span><br><span>--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c</span><br><span>+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c</span><br><span>@@ -15,6 +15,7 @@</span><br><span> </span><br><span> #include <bootstate.h></span><br><span> #include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pci_def.h></span><br><span> #include <device/pci_ids.h></span><br><span> #include <device/pci_ops.h></span><br><span> #include <gpio.h></span><br><span>@@ -31,6 +32,7 @@</span><br><span> void variant_mainboard_final(void)</span><br><span> {</span><br><span>     struct device *dev = NULL;</span><br><span style="color: hsl(120, 100%, 40%);">+    uint16_t cmd = 0;</span><br><span> </span><br><span>        /* PIR6 register mapping for PCIe root ports</span><br><span>          * INTA#->PIRQD#, INTB#->PIRQA#, INTC#->PIRQB#, INTD#-> PIRQC#</span><br><span>@@ -52,6 +54,14 @@</span><br><span>       * offset 0x341C bit [3:0].</span><br><span>   */</span><br><span>  pcr_or32(PID_LPC, PCR_LPC_PRC, (PCR_LPC_CCE_EN | PCR_LPC_PCE_EN));</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+  /* Set Master Enable for on-board PCI device. */</span><br><span style="color: hsl(120, 100%, 40%);">+      dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403e, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+      if (dev) {</span><br><span style="color: hsl(120, 100%, 40%);">+            cmd = pci_read_config16(dev, PCI_COMMAND);</span><br><span style="color: hsl(120, 100%, 40%);">+            cmd |= PCI_COMMAND_MASTER;</span><br><span style="color: hsl(120, 100%, 40%);">+            pci_write_config16(dev, PCI_COMMAND, cmd);</span><br><span style="color: hsl(120, 100%, 40%);">+    }</span><br><span> }</span><br><span> </span><br><span> static void wait_for_legacy_dev(void *unused)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29528">change 29528</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/29528"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I1ef4a7774d4ca75c230063debbc63d03486fed6f </div>
<div style="display:none"> Gerrit-Change-Number: 29528 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Mario Scheithauer <mario.scheithauer@siemens.com> </div>