<p>Lijian Zhao has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29492">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/google/sarien: Program HD Audio SVID/SSID<br><br>Realtek Codec kernel driver requires PCH HD Audio controller to have<br>subvendor id and subsystem id matched with verb table. Program same<br>values to make it working.<br><br>BUG=N/A<br>TEST=Boot up on Sarien board and check with kernel driver dmesg to see<br>ALC3204 or ALC3254.<br><br>Change-Id: I3c08da2daf8539864ea3f9aa04ccf488e2844da5<br>Signed-off-by: Lijian Zhao <lijian.zhao@intel.com><br>---<br>M src/mainboard/google/sarien/ramstage.c<br>A src/mainboard/google/sarien/variants/arcada/include/variant/ssid.h<br>A src/mainboard/google/sarien/variants/sarien/include/variant/ssid.h<br>3 files changed, 64 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/29492/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/sarien/ramstage.c b/src/mainboard/google/sarien/ramstage.c</span><br><span>index c65104b..cb04fbd 100644</span><br><span>--- a/src/mainboard/google/sarien/ramstage.c</span><br><span>+++ b/src/mainboard/google/sarien/ramstage.c</span><br><span>@@ -16,6 +16,7 @@</span><br><span> #include <arch/acpi.h></span><br><span> #include <soc/ramstage.h></span><br><span> #include <variant/gpio.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <variant/ssid.h></span><br><span> #include <vendorcode/google/chromeos/chromeos.h></span><br><span> </span><br><span> void mainboard_silicon_init_params(FSP_S_CONFIG *params)</span><br><span>@@ -25,6 +26,11 @@</span><br><span> </span><br><span> gpio_table = variant_gpio_table(&num_gpios);</span><br><span> gpio_configure_pads(gpio_table, num_gpios);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Update PCH HDA SVID/SSID */</span><br><span style="color: hsl(120, 100%, 40%);">+ params->SiSsidTablePtr = (uint32_t)ssidtblptr;</span><br><span style="color: hsl(120, 100%, 40%);">+ params->SiNumberOfSsidTableEntry =</span><br><span style="color: hsl(120, 100%, 40%);">+ (sizeof(ssidtblptr) / sizeof(svid_ssid_init_entry));</span><br><span> }</span><br><span> </span><br><span> static void mainboard_enable(struct device *dev)</span><br><span>diff --git a/src/mainboard/google/sarien/variants/arcada/include/variant/ssid.h b/src/mainboard/google/sarien/variants/arcada/include/variant/ssid.h</span><br><span>new file mode 100644</span><br><span>index 0000000..66df0cc</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/sarien/variants/arcada/include/variant/ssid.h</span><br><span>@@ -0,0 +1,29 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright 2018 Intel Corp.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef VARIANT_SSID_H</span><br><span style="color: hsl(120, 100%, 40%);">+#define VARIANT_SSID_H</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pci_ids.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/intel/common/ssid.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define HDA_FUNC 3</span><br><span style="color: hsl(120, 100%, 40%);">+#define ALC_SSID 0x08b6</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+svid_ssid_init_entry ssidtblptr[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ {{{PCI_SUBSYSTEM_VENDOR_ID, HDA_FUNC, PCH_DEV_SLOT_LPC, 0, 0, 0, 0 }},</span><br><span style="color: hsl(120, 100%, 40%);">+ {PCI_VENDOR_ID_DELL, ALC_SSID}, 0 },</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span>diff --git a/src/mainboard/google/sarien/variants/sarien/include/variant/ssid.h b/src/mainboard/google/sarien/variants/sarien/include/variant/ssid.h</span><br><span>new file mode 100644</span><br><span>index 0000000..79bf1c3</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/sarien/variants/sarien/include/variant/ssid.h</span><br><span>@@ -0,0 +1,29 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright 2018 Intel Corp.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef VARIANT_SSID_H</span><br><span style="color: hsl(120, 100%, 40%);">+#define VARIANT_SSID_H</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pci_ids.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/intel/common/ssid.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define HDA_FUNC 3</span><br><span style="color: hsl(120, 100%, 40%);">+#define ALC_SSID 0x08b8</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+svid_ssid_init_entry ssidtblptr[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ {{{PCI_SUBSYSTEM_VENDOR_ID, HDA_FUNC, PCH_DEV_SLOT_LPC, 0, 0, 0, 0 }},</span><br><span style="color: hsl(120, 100%, 40%);">+ {PCI_VENDOR_ID_DELL, ALC_SSID}, 0 },</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29492">change 29492</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I3c08da2daf8539864ea3f9aa04ccf488e2844da5 </div>
<div style="display:none"> Gerrit-Change-Number: 29492 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com> </div>