<p>Patrick Rudolph has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29439">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">intel/nb/*/gma: Use new common PMBASE API<br><br>* Introduce common function to enable TCO SCI.<br>* Use new PMBASE functions to get rid of get_pmbase<br><br>Change-Id: I6b5977b10d1e38b45e09530e9dcabbd5f42facb2<br>Signed-off-by: Patrick Rudolph <siro@das-labor.org><br>---<br>M src/northbridge/intel/fsp_sandybridge/gma.c<br>M src/northbridge/intel/haswell/gma.c<br>M src/northbridge/intel/nehalem/gma.c<br>M src/northbridge/intel/sandybridge/gma.c<br>M src/southbridge/intel/common/pmutil.c<br>M src/southbridge/intel/common/pmutil.h<br>6 files changed, 34 insertions(+), 33 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/29439/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/intel/fsp_sandybridge/gma.c b/src/northbridge/intel/fsp_sandybridge/gma.c</span><br><span>index cba5869..801fa6f 100644</span><br><span>--- a/src/northbridge/intel/fsp_sandybridge/gma.c</span><br><span>+++ b/src/northbridge/intel/fsp_sandybridge/gma.c</span><br><span>@@ -22,6 +22,7 @@</span><br><span> #include <southbridge/intel/fsp_bd82x6x/nvs.h></span><br><span> #include <drivers/intel/gma/opregion.h></span><br><span> #include <drivers/intel/gma/intel_bios.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <southbridge/intel/common/pmbase.h></span><br><span> </span><br><span> #include <cbmem.h></span><br><span> </span><br><span>@@ -105,17 +106,11 @@</span><br><span> u16 reg16;</span><br><span> </span><br><span> /* clear DMISCI status */</span><br><span style="color: hsl(0, 100%, 40%);">- reg16 = inw(DEFAULT_PMBASE + TCO1_STS);</span><br><span style="color: hsl(0, 100%, 40%);">- reg16 &= DMISCI_STS;</span><br><span style="color: hsl(0, 100%, 40%);">- outw(DEFAULT_PMBASE + TCO1_STS, reg16);</span><br><span style="color: hsl(120, 100%, 40%);">+ reg16 = read_pmbase16(TCO1_STS);</span><br><span style="color: hsl(120, 100%, 40%);">+ reg16 &= ~DMISCI_STS;</span><br><span style="color: hsl(120, 100%, 40%);">+ write_pmbase16(TCO1_STS, reg16);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* clear acpi tco status */</span><br><span style="color: hsl(0, 100%, 40%);">- outl(DEFAULT_PMBASE + GPE0_STS, TCOSCI_STS);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* enable acpi tco scis */</span><br><span style="color: hsl(0, 100%, 40%);">- reg16 = inw(DEFAULT_PMBASE + GPE0_EN);</span><br><span style="color: hsl(0, 100%, 40%);">- reg16 |= TCOSCI_EN;</span><br><span style="color: hsl(0, 100%, 40%);">- outw(DEFAULT_PMBASE + GPE0_EN, reg16);</span><br><span style="color: hsl(120, 100%, 40%);">+ southbridge_enable_tco_sci();</span><br><span> }</span><br><span> </span><br><span> static void gma_init(struct device *dev)</span><br><span>diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c</span><br><span>index efc9fa3..2c05d0f 100644</span><br><span>--- a/src/northbridge/intel/haswell/gma.c</span><br><span>+++ b/src/northbridge/intel/haswell/gma.c</span><br><span>@@ -27,6 +27,7 @@</span><br><span> #include <cpu/intel/haswell/haswell.h></span><br><span> #include <drivers/intel/gma/opregion.h></span><br><span> #include <southbridge/intel/lynxpoint/nvs.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <southbridge/intel/common/pmbase.h></span><br><span> #include <stdlib.h></span><br><span> #include <string.h></span><br><span> </span><br><span>@@ -444,9 +445,9 @@</span><br><span> u16 reg16;</span><br><span> </span><br><span> /* clear DMISCI status */</span><br><span style="color: hsl(0, 100%, 40%);">- reg16 = inw(get_pmbase() + TCO1_STS);</span><br><span style="color: hsl(0, 100%, 40%);">- reg16 &= DMISCI_STS;</span><br><span style="color: hsl(0, 100%, 40%);">- outw(get_pmbase() + TCO1_STS, reg16);</span><br><span style="color: hsl(120, 100%, 40%);">+ reg16 = read_pmbase16(TCO1_STS);</span><br><span style="color: hsl(120, 100%, 40%);">+ reg16 &= ~DMISCI_STS;</span><br><span style="color: hsl(120, 100%, 40%);">+ write_pmbase16(TCO1_STS, reg16);</span><br><span> </span><br><span> /* clear and enable ACPI TCO SCI */</span><br><span> enable_tco_sci();</span><br><span>diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c</span><br><span>index b89215d..77467bc 100644</span><br><span>--- a/src/northbridge/intel/nehalem/gma.c</span><br><span>+++ b/src/northbridge/intel/nehalem/gma.c</span><br><span>@@ -30,6 +30,7 @@</span><br><span> #include <pc80/vga_io.h></span><br><span> #include <southbridge/intel/ibexpeak/nvs.h></span><br><span> #include <drivers/intel/gma/opregion.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <southbridge/intel/common/pmbase.h></span><br><span> #include <cbmem.h></span><br><span> </span><br><span> #include "chip.h"</span><br><span>@@ -577,17 +578,11 @@</span><br><span> u16 reg16;</span><br><span> </span><br><span> /* clear DMISCI status */</span><br><span style="color: hsl(0, 100%, 40%);">- reg16 = inw(DEFAULT_PMBASE + TCO1_STS);</span><br><span style="color: hsl(0, 100%, 40%);">- reg16 &= DMISCI_STS;</span><br><span style="color: hsl(0, 100%, 40%);">- outw(DEFAULT_PMBASE + TCO1_STS, reg16);</span><br><span style="color: hsl(120, 100%, 40%);">+ reg16 = read_pmbase16(TCO1_STS);</span><br><span style="color: hsl(120, 100%, 40%);">+ reg16 &= ~DMISCI_STS;</span><br><span style="color: hsl(120, 100%, 40%);">+ write_pmbase16(TCO1_STS, reg16);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* clear acpi tco status */</span><br><span style="color: hsl(0, 100%, 40%);">- outl(DEFAULT_PMBASE + GPE0_STS, TCOSCI_STS);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* enable acpi tco scis */</span><br><span style="color: hsl(0, 100%, 40%);">- reg16 = inw(DEFAULT_PMBASE + GPE0_EN);</span><br><span style="color: hsl(0, 100%, 40%);">- reg16 |= TCOSCI_EN;</span><br><span style="color: hsl(0, 100%, 40%);">- outw(DEFAULT_PMBASE + GPE0_EN, reg16);</span><br><span style="color: hsl(120, 100%, 40%);">+ southbridge_enable_tco_sci();</span><br><span> }</span><br><span> </span><br><span> static void gma_func0_init(struct device *dev)</span><br><span>diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c</span><br><span>index cd8f7b9..f54beb5 100644</span><br><span>--- a/src/northbridge/intel/sandybridge/gma.c</span><br><span>+++ b/src/northbridge/intel/sandybridge/gma.c</span><br><span>@@ -25,6 +25,7 @@</span><br><span> #include <drivers/intel/gma/libgfxinit.h></span><br><span> #include <southbridge/intel/bd82x6x/nvs.h></span><br><span> #include <drivers/intel/gma/opregion.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <southbridge/intel/common/pmbase.h></span><br><span> #include <cbmem.h></span><br><span> </span><br><span> #include "chip.h"</span><br><span>@@ -599,17 +600,11 @@</span><br><span> u16 reg16;</span><br><span> </span><br><span> /* clear DMISCI status */</span><br><span style="color: hsl(0, 100%, 40%);">- reg16 = inw(DEFAULT_PMBASE + TCO1_STS);</span><br><span style="color: hsl(0, 100%, 40%);">- reg16 &= DMISCI_STS;</span><br><span style="color: hsl(0, 100%, 40%);">- outw(DEFAULT_PMBASE + TCO1_STS, reg16);</span><br><span style="color: hsl(120, 100%, 40%);">+ reg16 = read_pmbase16(TCO1_STS);</span><br><span style="color: hsl(120, 100%, 40%);">+ reg16 &= ~DMISCI_STS;</span><br><span style="color: hsl(120, 100%, 40%);">+ write_pmbase16(TCO1_STS, reg16);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* clear acpi tco status */</span><br><span style="color: hsl(0, 100%, 40%);">- outl(DEFAULT_PMBASE + GPE0_STS, TCOSCI_STS);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* enable acpi tco scis */</span><br><span style="color: hsl(0, 100%, 40%);">- reg16 = inw(DEFAULT_PMBASE + GPE0_EN);</span><br><span style="color: hsl(0, 100%, 40%);">- reg16 |= TCOSCI_EN;</span><br><span style="color: hsl(0, 100%, 40%);">- outw(DEFAULT_PMBASE + GPE0_EN, reg16);</span><br><span style="color: hsl(120, 100%, 40%);">+ southbridge_enable_tco_sci();</span><br><span> }</span><br><span> </span><br><span> static void gma_func0_init(struct device *dev)</span><br><span>diff --git a/src/southbridge/intel/common/pmutil.c b/src/southbridge/intel/common/pmutil.c</span><br><span>index ac72eba..7d0aec6 100644</span><br><span>--- a/src/southbridge/intel/common/pmutil.c</span><br><span>+++ b/src/southbridge/intel/common/pmutil.c</span><br><span>@@ -197,6 +197,20 @@</span><br><span> printk(BIOS_DEBUG, "\n");</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/* Used by Intel GMA */</span><br><span style="color: hsl(120, 100%, 40%);">+void southbridge_enable_tco_sci(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ u16 reg16;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* clear acpi tco status */</span><br><span style="color: hsl(120, 100%, 40%);">+ write_pmbase32(GPE0_STS, TCOSCI_STS);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* enable acpi tco scis */</span><br><span style="color: hsl(120, 100%, 40%);">+ reg16 = read_pmbase16(GPE0_EN);</span><br><span style="color: hsl(120, 100%, 40%);">+ reg16 |= TCOSCI_EN;</span><br><span style="color: hsl(120, 100%, 40%);">+ write_pmbase16(GPE0_EN, reg16);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /**</span><br><span> * @brief Set the EOS bit</span><br><span> */</span><br><span>diff --git a/src/southbridge/intel/common/pmutil.h b/src/southbridge/intel/common/pmutil.h</span><br><span>index 26134d9..64a30e4 100644</span><br><span>--- a/src/southbridge/intel/common/pmutil.h</span><br><span>+++ b/src/southbridge/intel/common/pmutil.h</span><br><span>@@ -110,6 +110,7 @@</span><br><span> void dump_pm1_status(u16 pm1_sts);</span><br><span> void dump_tco_status(u32 tco_sts);</span><br><span> u32 reset_tco_status(void);</span><br><span style="color: hsl(120, 100%, 40%);">+void southbridge_enable_tco_sci(void);</span><br><span> void dump_gpe0_status(u64 gpe0_sts);</span><br><span> u64 reset_gpe0_status(void);</span><br><span> void dump_smi_status(u32 smi_sts);</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29439">change 29439</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I6b5977b10d1e38b45e09530e9dcabbd5f42facb2 </div>
<div style="display:none"> Gerrit-Change-Number: 29439 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Patrick Rudolph <siro@das-labor.org> </div>