<p>Patrick Rudolph has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29427">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sb/intel: Deduplicate vbnv_cmos_failed<br><br>Move all implementations to into common folder.<br>Allows all Intel based platforms to use VBOOT_VBNV_CMOS.<br><br>Change-Id: Ia494e6d418af6f907c648376674776c54d95ba71<br>Signed-off-by: Patrick Rudolph <siro@das-labor.org><br>---<br>M src/southbridge/intel/bd82x6x/early_pch_common.c<br>M src/southbridge/intel/bd82x6x/pch.h<br>M src/southbridge/intel/common/Makefile.inc<br>M src/southbridge/intel/common/pmutil.c<br>M src/southbridge/intel/common/pmutil.h<br>M src/southbridge/intel/lynxpoint/lpc.c<br>M src/southbridge/intel/lynxpoint/pch.h<br>M src/southbridge/intel/lynxpoint/pmutil.c<br>8 files changed, 28 insertions(+), 36 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/29427/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/southbridge/intel/bd82x6x/early_pch_common.c b/src/southbridge/intel/bd82x6x/early_pch_common.c</span><br><span>index f1ac4f0..6c1df29 100644</span><br><span>--- a/src/southbridge/intel/bd82x6x/early_pch_common.c</span><br><span>+++ b/src/southbridge/intel/bd82x6x/early_pch_common.c</span><br><span>@@ -23,7 +23,6 @@</span><br><span> #include <arch/acpi.h></span><br><span> #include <console/console.h></span><br><span> #include <rules.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <security/vboot/vbnv.h></span><br><span> </span><br><span> #if ENV_ROMSTAGE</span><br><span> uint64_t get_initial_timestamp(void)</span><br><span>@@ -63,17 +62,3 @@</span><br><span> }</span><br><span> #endif</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-int rtc_failure(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-#if defined(__SIMPLE_DEVICE__)</span><br><span style="color: hsl(0, 100%, 40%);">-    pci_devfn_t dev = PCI_DEV(0, 0x1f, 0);</span><br><span style="color: hsl(0, 100%, 40%);">-#else</span><br><span style="color: hsl(0, 100%, 40%);">-     struct device *dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0));</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-        return !!(pci_read_config8(dev, GEN_PMCON_3) & RTC_BATTERY_DEAD);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-int vbnv_cmos_failed(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-       return rtc_failure();</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h</span><br><span>index e234ca0..bb0d5c4 100644</span><br><span>--- a/src/southbridge/intel/bd82x6x/pch.h</span><br><span>+++ b/src/southbridge/intel/bd82x6x/pch.h</span><br><span>@@ -100,9 +100,6 @@</span><br><span> early_usb_init (const struct southbridge_usb_port *portmap);</span><br><span> </span><br><span> #endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* Return non-zero when RTC failure happened. */</span><br><span style="color: hsl(0, 100%, 40%);">-int rtc_failure(void);</span><br><span> #endif</span><br><span> </span><br><span> /* PM I/O Space */</span><br><span>diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc</span><br><span>index 249d249..c27d339 100644</span><br><span>--- a/src/southbridge/intel/common/Makefile.inc</span><br><span>+++ b/src/southbridge/intel/common/Makefile.inc</span><br><span>@@ -52,4 +52,5 @@</span><br><span> ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM) += pmutil.c smi.c</span><br><span> smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM) += pmutil.c smihandler.c</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+romstage-y += pmutil.c</span><br><span> endif</span><br><span>diff --git a/src/southbridge/intel/common/pmutil.c b/src/southbridge/intel/common/pmutil.c</span><br><span>index ac72eba..0cab015 100644</span><br><span>--- a/src/southbridge/intel/common/pmutil.c</span><br><span>+++ b/src/southbridge/intel/common/pmutil.c</span><br><span>@@ -19,11 +19,14 @@</span><br><span> #include <console/console.h></span><br><span> #include <cpu/x86/cache.h></span><br><span> #include <device/pci_def.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pci_ops.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pci_def.h></span><br><span> #include <cpu/x86/smm.h></span><br><span> #include <elog.h></span><br><span> #include <pc80/mc146818rtc.h></span><br><span> #include <southbridge/intel/common/pmbase.h></span><br><span> #include <southbridge/intel/common/gpio.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <security/vboot/vbnv.h></span><br><span> </span><br><span> #include "pmutil.h"</span><br><span> </span><br><span>@@ -234,3 +237,18 @@</span><br><span> </span><br><span>    return reg16;</span><br><span> }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+int rtc_failure(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+#if defined(__SIMPLE_DEVICE__)</span><br><span style="color: hsl(120, 100%, 40%);">+        pci_devfn_t dev = PCI_DEV(0, 31, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+#else</span><br><span style="color: hsl(120, 100%, 40%);">+   struct device *dev = dev_find_slot(0, PCI_DEVFN(31, 0));</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+      return !!(pci_read_config8(dev, GEN_PMCON_3) & RTC_BATTERY_DEAD);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+int vbnv_cmos_failed(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+     return rtc_failure();</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/southbridge/intel/common/pmutil.h b/src/southbridge/intel/common/pmutil.h</span><br><span>index 26134d9..af7bf97 100644</span><br><span>--- a/src/southbridge/intel/common/pmutil.h</span><br><span>+++ b/src/southbridge/intel/common/pmutil.h</span><br><span>@@ -104,6 +104,11 @@</span><br><span> #define   TCO_LOCK  (1 << 12)</span><br><span> #define TCO2_CNT     0x6a</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#define GEN_PMCON_3                   0xa4</span><br><span style="color: hsl(120, 100%, 40%);">+#define   RTC_BATTERY_DEAD                (1 << 2)</span><br><span style="color: hsl(120, 100%, 40%);">+#define   RTC_POWER_FAILED              (1 << 1)</span><br><span style="color: hsl(120, 100%, 40%);">+#define   SLEEP_AFTER_POWER_FAIL        (1 << 0)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> u16 get_pmbase(void);</span><br><span> </span><br><span> u16 reset_pm1_status(void);</span><br><span>@@ -127,4 +132,7 @@</span><br><span> void southbridge_smi_monitor(void);</span><br><span> em64t101_smm_state_save_area_t *smi_apmc_find_state_save(u8 cmd);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/* Return non-zero when RTC failure happened. */</span><br><span style="color: hsl(120, 100%, 40%);">+int rtc_failure(void);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #endif /*INTEL_COMMON_PMUTIL_H */</span><br><span>diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c</span><br><span>index 5b09fed..7289929 100644</span><br><span>--- a/src/southbridge/intel/lynxpoint/lpc.c</span><br><span>+++ b/src/southbridge/intel/lynxpoint/lpc.c</span><br><span>@@ -36,6 +36,7 @@</span><br><span> #include <arch/acpigen.h></span><br><span> #include <cbmem.h></span><br><span> #include <drivers/intel/gma/i915.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <southbridge/intel/common/pmutil.h></span><br><span> </span><br><span> #define NMI_OFF 0</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h</span><br><span>index 489b565..76b9299 100644</span><br><span>--- a/src/southbridge/intel/lynxpoint/pch.h</span><br><span>+++ b/src/southbridge/intel/lynxpoint/pch.h</span><br><span>@@ -172,9 +172,6 @@</span><br><span> void enable_gpe(u32 mask);</span><br><span> void disable_gpe(u32 mask);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-/* Return non-zero when RTC failure happened. */</span><br><span style="color: hsl(0, 100%, 40%);">-int rtc_failure(void);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> #if !defined(__PRE_RAM__) && !defined(__SMM__)</span><br><span> #include <device/device.h></span><br><span> #include <arch/acpi.h></span><br><span>diff --git a/src/southbridge/intel/lynxpoint/pmutil.c b/src/southbridge/intel/lynxpoint/pmutil.c</span><br><span>index e96d683..0916d2d 100644</span><br><span>--- a/src/southbridge/intel/lynxpoint/pmutil.c</span><br><span>+++ b/src/southbridge/intel/lynxpoint/pmutil.c</span><br><span>@@ -24,7 +24,6 @@</span><br><span> #include <device/pci.h></span><br><span> #include <device/pci_def.h></span><br><span> #include <console/console.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <security/vboot/vbnv.h></span><br><span> #include "pch.h"</span><br><span> </span><br><span> #if IS_ENABLED(CONFIG_INTEL_LYNXPOINT_LP)</span><br><span>@@ -555,17 +554,3 @@</span><br><span>   outl(gpe0_en, get_pmbase() + gpe0_reg);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-int rtc_failure(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-#if defined(__SIMPLE_DEVICE__)</span><br><span style="color: hsl(0, 100%, 40%);">-    pci_devfn_t dev = PCI_DEV(0, 31, 0);</span><br><span style="color: hsl(0, 100%, 40%);">-#else</span><br><span style="color: hsl(0, 100%, 40%);">-       struct device *dev = dev_find_slot(0, PCI_DEVFN(31, 0));</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-  return !!(pci_read_config8(dev, GEN_PMCON_3) & RTC_BATTERY_DEAD);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-int vbnv_cmos_failed(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-       return rtc_failure();</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29427">change 29427</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/29427"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ia494e6d418af6f907c648376674776c54d95ba71 </div>
<div style="display:none"> Gerrit-Change-Number: 29427 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Patrick Rudolph <siro@das-labor.org> </div>