<p>Frans Hendriks has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29392">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">src/soc/intel/braswell/include/soc/iomap.h: Correct IO_BASE_SIZE and ILB_BASE_SIZE<br><br>The sizes of IO_BASE and ILB_BASE areas a incorrect.<br>Correct IO_BASE_SIZE and ILB_BASE_SIZE values.<br><br>BUG=N/A<br>TEST=Intel CherryHill CRB<br><br>Change-Id: I23c3fd608598c5ec2271d393168ac4bf406772b4<br>Signed-off-by: Frans Hendriks <fhendriks@eltan.com><br>---<br>M src/soc/intel/braswell/include/soc/iomap.h<br>1 file changed, 3 insertions(+), 2 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/29392/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/braswell/include/soc/iomap.h b/src/soc/intel/braswell/include/soc/iomap.h</span><br><span>index c61983b..f49993e 100644</span><br><span>--- a/src/soc/intel/braswell/include/soc/iomap.h</span><br><span>+++ b/src/soc/intel/braswell/include/soc/iomap.h</span><br><span>@@ -3,6 +3,7 @@</span><br><span>  *</span><br><span>  * Copyright (C) 2013 Google Inc.</span><br><span>  * Copyright (C) 2015 Intel Corp.</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Eltan B.V.</span><br><span>  *</span><br><span>  * This program is free software; you can redistribute it and/or modify</span><br><span>  * it under the terms of the GNU General Public License as published by</span><br><span>@@ -35,7 +36,7 @@</span><br><span> </span><br><span> /* IO Memory */</span><br><span> #define IO_BASE_ADDRESS                       0xfed80000</span><br><span style="color: hsl(0, 100%, 40%);">-#define IO_BASE_SIZE                  0x4000</span><br><span style="color: hsl(120, 100%, 40%);">+#define IO_BASE_SIZE                    0x40000</span><br><span> #define COMMUNITY_OFFSET_GPSOUTHWEST            0x00000</span><br><span> #define COMMUNITY_OFFSET_GPNORTH                0x08000</span><br><span> #define COMMUNITY_OFFSET_GPEAST                 0x10000</span><br><span>@@ -43,7 +44,7 @@</span><br><span> </span><br><span> /* Intel Legacy Block */</span><br><span> #define ILB_BASE_ADDRESS                0xfed08000</span><br><span style="color: hsl(0, 100%, 40%);">-#define ILB_BASE_SIZE                 0x400</span><br><span style="color: hsl(120, 100%, 40%);">+#define ILB_BASE_SIZE                    0x2000</span><br><span> </span><br><span> /* SPI Bus */</span><br><span> #define SPI_BASE_ADDRESS         0xfed01000</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29392">change 29392</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/29392"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I23c3fd608598c5ec2271d393168ac4bf406772b4 </div>
<div style="display:none"> Gerrit-Change-Number: 29392 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Frans Hendriks <fhendriks@eltan.com> </div>