<p>Aamir Bohra has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29316">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/intel/icelake_rvp: Update ICL flash layout to support IFWI 1.6<br><br>Change-Id: I462a384739b5972d9a59569ffdcadba7cdef6a81<br>Signed-off-by: Aamir Bohra <aamir.bohra@intel.com><br>---<br>M src/mainboard/intel/icelake_rvp/chromeos.fmd<br>1 file changed, 17 insertions(+), 18 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/29316/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/intel/icelake_rvp/chromeos.fmd b/src/mainboard/intel/icelake_rvp/chromeos.fmd</span><br><span>index 65d22c3..b4dd69b 100644</span><br><span>--- a/src/mainboard/intel/icelake_rvp/chromeos.fmd</span><br><span>+++ b/src/mainboard/intel/icelake_rvp/chromeos.fmd</span><br><span>@@ -1,21 +1,21 @@</span><br><span> FLASH@0xff000000 0x1000000 {</span><br><span style="color: hsl(0, 100%, 40%);">- SI_ALL@0x0 0x380000 {</span><br><span style="color: hsl(120, 100%, 40%);">+ SI_ALL@0x0 0x3F0000 {</span><br><span> SI_DESC@0x0 0x1000</span><br><span style="color: hsl(0, 100%, 40%);">- SI_EC@0x01000 0x80000</span><br><span style="color: hsl(0, 100%, 40%);">- SI_ME@0x81000 0x2ff000</span><br><span style="color: hsl(120, 100%, 40%);">+ SI_EC@0x1000 0x80000</span><br><span style="color: hsl(120, 100%, 40%);">+ SI_ME@0x81000 0x36F000</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">- SI_BIOS@0x380000 0xc80000 {</span><br><span style="color: hsl(0, 100%, 40%);">- RW_SECTION_A@0x0 0x368000 {</span><br><span style="color: hsl(120, 100%, 40%);">+ SI_BIOS@0x400000 0xC00000 {</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_SECTION_A@0x0 0x2d0000 {</span><br><span> VBLOCK_A@0x0 0x10000</span><br><span style="color: hsl(0, 100%, 40%);">- FW_MAIN_A(CBFS)@0x10000 0x357fc0</span><br><span style="color: hsl(0, 100%, 40%);">- RW_FWID_A@0x367fc0 0x40</span><br><span style="color: hsl(120, 100%, 40%);">+ FW_MAIN_A(CBFS)@0x10000 0x2bffc0</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_FWID_A@0x2cffc0 0x40</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">- RW_SECTION_B@0x368000 0x368000 {</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_SECTION_B@0x2d0000 0x2d0000 {</span><br><span> VBLOCK_B@0x0 0x10000</span><br><span style="color: hsl(0, 100%, 40%);">- FW_MAIN_B(CBFS)@0x10000 0x357fc0</span><br><span style="color: hsl(0, 100%, 40%);">- RW_FWID_B@0x367fc0 0x40</span><br><span style="color: hsl(120, 100%, 40%);">+ FW_MAIN_B(CBFS)@0x10000 0x2bffc0</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_FWID_B@0x2cffc0 0x40</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">- RW_MISC@0x6d0000 0x30000 {</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_MISC@0x5a0000 0x30000 {</span><br><span> UNIFIED_MRC_CACHE@0x0 0x20000 {</span><br><span> RECOVERY_MRC_CACHE@0x0 0x10000</span><br><span> RW_MRC_CACHE@0x10000 0x10000</span><br><span>@@ -28,18 +28,17 @@</span><br><span> RW_VPD@0x28000 0x2000</span><br><span> RW_NVRAM@0x2a000 0x6000</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">- SMMSTORE@0x700000 0x40000</span><br><span style="color: hsl(0, 100%, 40%);">- RW_LEGACY(CBFS)@0x740000 0x1c0000</span><br><span style="color: hsl(0, 100%, 40%);">- WP_RO@0x900000 0x380000 {</span><br><span style="color: hsl(120, 100%, 40%);">+ SMMSTORE@0x5d0000 0x40000</span><br><span style="color: hsl(120, 100%, 40%);">+ RW_LEGACY(CBFS)@0x610000 0x1c0000</span><br><span style="color: hsl(120, 100%, 40%);">+ WP_RO@0x7d0000 0x430000 {</span><br><span> RO_VPD@0x0 0x4000</span><br><span style="color: hsl(0, 100%, 40%);">- RO_UNUSED@0x4000 0xc000</span><br><span style="color: hsl(0, 100%, 40%);">- RO_SECTION@0x10000 0x370000 {</span><br><span style="color: hsl(120, 100%, 40%);">+ RO_SECTION@0x4000 0x42c000 {</span><br><span> FMAP@0x0 0x800</span><br><span> RO_FRID@0x800 0x40</span><br><span> RO_FRID_PAD@0x840 0x7c0</span><br><span> GBB@0x1000 0xef000</span><br><span style="color: hsl(0, 100%, 40%);">- COREBOOT(CBFS)@0xf0000 0x280000</span><br><span style="color: hsl(120, 100%, 40%);">+ COREBOOT(CBFS)@0xf0000 0x33c000</span><br><span> }</span><br><span> }</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>\ No newline at end of file</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29316">change 29316</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/29316"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I462a384739b5972d9a59569ffdcadba7cdef6a81 </div>
<div style="display:none"> Gerrit-Change-Number: 29316 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Aamir Bohra <aamir.bohra@intel.com> </div>