<p>Patrick Georgi has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29223">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/apollolake: postcar stage potentially needs the reset code, too<br><br>Also add a test case for that, a config taken from chromiumos with some<br>references to binaries dropped that aren't in our blobs repo (eg audio<br>firmware).<br><br>Change-Id: I411c0bacefd9345326f26db4909921dddba28237<br>Signed-off-by: Patrick Georgi <pgeorgi@google.com><br>---<br>A configs/config.google_reef_cros<br>M src/soc/intel/apollolake/Makefile.inc<br>2 files changed, 17 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/29223/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/configs/config.google_reef_cros b/configs/config.google_reef_cros</span><br><span>new file mode 100644</span><br><span>index 0000000..82b9b52</span><br><span>--- /dev/null</span><br><span>+++ b/configs/config.google_reef_cros</span><br><span>@@ -0,0 +1,15 @@</span><br><span style="color: hsl(120, 100%, 40%);">+CONFIG_USE_BLOBS=y</span><br><span style="color: hsl(120, 100%, 40%);">+CONFIG_VENDOR_GOOGLE=y</span><br><span style="color: hsl(120, 100%, 40%);">+CONFIG_BOARD_GOOGLE_REEF=y</span><br><span style="color: hsl(120, 100%, 40%);">+CONFIG_CHROMEOS=y</span><br><span style="color: hsl(120, 100%, 40%);">+CONFIG_ADD_FSP_BINARIES=y</span><br><span style="color: hsl(120, 100%, 40%);">+CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE=y</span><br><span style="color: hsl(120, 100%, 40%);">+CONFIG_ELOG_GSMI=y</span><br><span style="color: hsl(120, 100%, 40%);">+CONFIG_ELOG_BOOT_COUNT=y</span><br><span style="color: hsl(120, 100%, 40%);">+CONFIG_ELOG_BOOT_COUNT_CMOS_OFFSET=144</span><br><span style="color: hsl(120, 100%, 40%);">+CONFIG_SPI_FLASH_SMM=y</span><br><span style="color: hsl(120, 100%, 40%);">+# CONFIG_CONSOLE_SERIAL is not set</span><br><span style="color: hsl(120, 100%, 40%);">+CONFIG_CMOS_POST=y</span><br><span style="color: hsl(120, 100%, 40%);">+CONFIG_CMOS_POST_OFFSET=0x70</span><br><span style="color: hsl(120, 100%, 40%);">+CONFIG_CMOS_POST_EXTRA=y</span><br><span style="color: hsl(120, 100%, 40%);">+CONFIG_PAYLOAD_NONE=y</span><br><span>diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc</span><br><span>index 632cb99..ede565a 100644</span><br><span>--- a/src/soc/intel/apollolake/Makefile.inc</span><br><span>+++ b/src/soc/intel/apollolake/Makefile.inc</span><br><span>@@ -72,6 +72,8 @@</span><br><span> postcar-y += mmap_boot.c</span><br><span> postcar-y += spi.c</span><br><span> postcar-y += i2c.c</span><br><span style="color: hsl(120, 100%, 40%);">+postcar-$(CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE) += heci.c</span><br><span style="color: hsl(120, 100%, 40%);">+postcar-$(CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE) += reset.c</span><br><span> postcar-$(CONFIG_UART_DEBUG) += uart.c</span><br><span> </span><br><span> postcar-$(CONFIG_FSP_CAR) += exit_car_fsp.S</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29223">change 29223</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/29223"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I411c0bacefd9345326f26db4909921dddba28237 </div>
<div style="display:none"> Gerrit-Change-Number: 29223 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Patrick Georgi <pgeorgi@google.com> </div>