<p>Richard Spiegel has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29156">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">amd/stoneyridge/include/soc: GPIO control a mux base addresses double defined<br><br>GPIO control a mux base addresses are defined within MMIO definitions<br>and again bellow as GPIO specific base addresses. Eliminate those within<br>MMIO bases.<br><br>BUG=b:117754420<br>TEST=Build grunt.<br><br>Change-Id: I53f7cf17d6267e6f8daa650b5f864bab688dc3f0<br>Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com><br>---<br>M src/soc/amd/stoneyridge/acpi/gpio_lib.asl<br>M src/soc/amd/stoneyridge/include/soc/iomap.h<br>2 files changed, 1 insertion(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/29156/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/amd/stoneyridge/acpi/gpio_lib.asl b/src/soc/amd/stoneyridge/acpi/gpio_lib.asl</span><br><span>index fbd6525..a2ea1ac 100644</span><br><span>--- a/src/soc/amd/stoneyridge/acpi/gpio_lib.asl</span><br><span>+++ b/src/soc/amd/stoneyridge/acpi/gpio_lib.asl</span><br><span>@@ -19,7 +19,7 @@</span><br><span> Method (GPAD, 0x1)</span><br><span> {</span><br><span>      /* Arg0 - GPIO pin number */</span><br><span style="color: hsl(0, 100%, 40%);">-    Return (Add(Multiply(Arg0, 4), GPIO_CONTROL_BASE))</span><br><span style="color: hsl(120, 100%, 40%);">+    Return (Add(Multiply(Arg0, 4), AMD_GPIO_CONTROL))</span><br><span> }</span><br><span> </span><br><span> /* Read pin control dword */</span><br><span>diff --git a/src/soc/amd/stoneyridge/include/soc/iomap.h b/src/soc/amd/stoneyridge/include/soc/iomap.h</span><br><span>index beb2bc8..128318c 100644</span><br><span>--- a/src/soc/amd/stoneyridge/include/soc/iomap.h</span><br><span>+++ b/src/soc/amd/stoneyridge/include/soc/iomap.h</span><br><span>@@ -37,9 +37,7 @@</span><br><span> #define APU_SMI_BASE                 0xfed80200</span><br><span> #define PM_MMIO_BASE                      0xfed80300</span><br><span> #define BIOSRAM_MMIO_BASE         0xfed80500</span><br><span style="color: hsl(0, 100%, 40%);">-#define IOMUX_MMIO_BASE                       0xfed80d00</span><br><span> #define MISC_MMIO_BASE                    0xfed80e00</span><br><span style="color: hsl(0, 100%, 40%);">-#define GPIO_CONTROL_BASE             0xfed81500</span><br><span> #define XHCI_ACPI_PM_MMIO_BASE            0xfed81c00</span><br><span> #define AOAC_MMIO_BASE                    0xfed81e00</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29156">change 29156</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/29156"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I53f7cf17d6267e6f8daa650b5f864bab688dc3f0 </div>
<div style="display:none"> Gerrit-Change-Number: 29156 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Richard Spiegel <richard.spiegel@silverbackltd.com> </div>