<p>Duncan Laurie has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29111">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">ec/google/common: Add a common MEC interface<br><br>In order to re-use the MEC interface code in the Chrome EC driver<br>move it to a common directory within the ec/google directory.<br><br>The Chrome EC driver itself is changed to use this interface in the<br>next commit, and future commits will introduce a new EC that also<br>uses this interface.<br><br>Change-Id: I13516b5e4c4c49f53bb998366284a26703142e2a<br>Signed-off-by: Duncan Laurie <dlaurie@google.com><br>---<br>A src/ec/google/common/Kconfig<br>A src/ec/google/common/Makefile.inc<br>A src/ec/google/common/mec.c<br>A src/ec/google/common/mec.h<br>4 files changed, 174 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/29111/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/ec/google/common/Kconfig b/src/ec/google/common/Kconfig</span><br><span>new file mode 100644</span><br><span>index 0000000..2e138a5</span><br><span>--- /dev/null</span><br><span>+++ b/src/ec/google/common/Kconfig</span><br><span>@@ -0,0 +1,4 @@</span><br><span style="color: hsl(120, 100%, 40%);">+config EC_GOOGLE_COMMON_MEC</span><br><span style="color: hsl(120, 100%, 40%);">+ bool</span><br><span style="color: hsl(120, 100%, 40%);">+ help</span><br><span style="color: hsl(120, 100%, 40%);">+ Google common EC functions for Microchip EMI region.</span><br><span>diff --git a/src/ec/google/common/Makefile.inc b/src/ec/google/common/Makefile.inc</span><br><span>new file mode 100644</span><br><span>index 0000000..e8f511f</span><br><span>--- /dev/null</span><br><span>+++ b/src/ec/google/common/Makefile.inc</span><br><span>@@ -0,0 +1,5 @@</span><br><span style="color: hsl(120, 100%, 40%);">+bootblock-$(CONFIG_EC_GOOGLE_COMMON_MEC) += mec.c</span><br><span style="color: hsl(120, 100%, 40%);">+verstage-$(CONFIG_EC_GOOGLE_COMMON_MEC) += mec.c</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-$(CONFIG_EC_GOOGLE_COMMON_MEC) += mec.c</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-$(CONFIG_EC_GOOGLE_COMMON_MEC) += mec.c</span><br><span style="color: hsl(120, 100%, 40%);">+smm-$(CONFIG_EC_GOOGLE_COMMON_MEC) += mec.c</span><br><span>\ No newline at end of file</span><br><span>diff --git a/src/ec/google/common/mec.c b/src/ec/google/common/mec.c</span><br><span>new file mode 100644</span><br><span>index 0000000..06a6bca</span><br><span>--- /dev/null</span><br><span>+++ b/src/ec/google/common/mec.c</span><br><span>@@ -0,0 +1,122 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright 2018 Google LLC</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <stddef.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <stdint.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/io.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include "mec.h"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+enum mec_access_mode {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* 8-bit access */</span><br><span style="color: hsl(120, 100%, 40%);">+ ACCESS_TYPE_BYTE = 0x0,</span><br><span style="color: hsl(120, 100%, 40%);">+ /* 16-bit access */</span><br><span style="color: hsl(120, 100%, 40%);">+ ACCESS_TYPE_WORD = 0x1,</span><br><span style="color: hsl(120, 100%, 40%);">+ /* 32-bit access */</span><br><span style="color: hsl(120, 100%, 40%);">+ ACCESS_TYPE_LONG = 0x2,</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * 32-bit access, read or write of MEC_EMI_EC_DATA_B3 causes the</span><br><span style="color: hsl(120, 100%, 40%);">+ * EC data register to be incremented.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ ACCESS_TYPE_LONG_AUTO_INCREMENT = 0x3,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* EMI registers are relative to base */</span><br><span style="color: hsl(120, 100%, 40%);">+#define MEC_EMI_HOST_TO_EC(base) ((base) + 0)</span><br><span style="color: hsl(120, 100%, 40%);">+#define MEC_EMI_EC_TO_HOST(base) ((base) + 1)</span><br><span style="color: hsl(120, 100%, 40%);">+#define MEC_EMI_EC_ADDRESS_B0(base) ((base) + 2)</span><br><span style="color: hsl(120, 100%, 40%);">+#define MEC_EMI_EC_ADDRESS_B1(base) ((base) + 3)</span><br><span style="color: hsl(120, 100%, 40%);">+#define MEC_EMI_EC_DATA_B0(base) ((base) + 4)</span><br><span style="color: hsl(120, 100%, 40%);">+#define MEC_EMI_EC_DATA_B1(base) ((base) + 5)</span><br><span style="color: hsl(120, 100%, 40%);">+#define MEC_EMI_EC_DATA_B2(base) ((base) + 6)</span><br><span style="color: hsl(120, 100%, 40%);">+#define MEC_EMI_EC_DATA_B3(base) ((base) + 7)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * cros_ec_lpc_mec_emi_write_address</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Initialize EMI read / write at a given address.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * @base: Starting read / write address</span><br><span style="color: hsl(120, 100%, 40%);">+ * @offset: Offset applied to base address</span><br><span style="color: hsl(120, 100%, 40%);">+ * @access_mode: Type of access, typically 32-bit auto-increment</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+static void mec_emi_write_address(uint16_t base, uint16_t offset,</span><br><span style="color: hsl(120, 100%, 40%);">+ enum mec_access_mode access_mode)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ outb((offset & 0xfc) | access_mode, MEC_EMI_EC_ADDRESS_B0(base));</span><br><span style="color: hsl(120, 100%, 40%);">+ outb((offset >> 8) & 0x7f, MEC_EMI_EC_ADDRESS_B1(base));</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+uint8_t mec_io_bytes(enum mec_io_type type, uint16_t base,</span><br><span style="color: hsl(120, 100%, 40%);">+ uint16_t offset, void *buffer, size_t size)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ enum mec_access_mode access_mode, new_access_mode;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint8_t *buf = buffer;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint8_t checksum = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ int io_addr;</span><br><span style="color: hsl(120, 100%, 40%);">+ int i = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (size == 0 || base == 0)</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Long access cannot be used on misaligned data since reading B0 loads</span><br><span style="color: hsl(120, 100%, 40%);">+ * the data register and writing B3 flushes it.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ if ((offset & 0x3) || (size < 4))</span><br><span style="color: hsl(120, 100%, 40%);">+ access_mode = ACCESS_TYPE_BYTE;</span><br><span style="color: hsl(120, 100%, 40%);">+ else</span><br><span style="color: hsl(120, 100%, 40%);">+ access_mode = ACCESS_TYPE_LONG_AUTO_INCREMENT;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Initialize I/O at desired address */</span><br><span style="color: hsl(120, 100%, 40%);">+ mec_emi_write_address(base, offset, access_mode);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Skip bytes in case of misaligned offset */</span><br><span style="color: hsl(120, 100%, 40%);">+ io_addr = MEC_EMI_EC_DATA_B0(base) + (offset & 0x3);</span><br><span style="color: hsl(120, 100%, 40%);">+ while (i < size) {</span><br><span style="color: hsl(120, 100%, 40%);">+ while (io_addr <= MEC_EMI_EC_DATA_B3(base)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (type == MEC_IO_WRITE)</span><br><span style="color: hsl(120, 100%, 40%);">+ outb(buf[i], io_addr++);</span><br><span style="color: hsl(120, 100%, 40%);">+ else</span><br><span style="color: hsl(120, 100%, 40%);">+ buf[i] = inb(io_addr++);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ checksum += buf[i++];</span><br><span style="color: hsl(120, 100%, 40%);">+ offset++;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Extra bounds check in case of misaligned size */</span><br><span style="color: hsl(120, 100%, 40%);">+ if (i == size)</span><br><span style="color: hsl(120, 100%, 40%);">+ return checksum;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Use long auto-increment access except for misaligned write,</span><br><span style="color: hsl(120, 100%, 40%);">+ * since writing B3 triggers the flush.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ if ((size - i) < 4 && type == MEC_IO_WRITE)</span><br><span style="color: hsl(120, 100%, 40%);">+ new_access_mode = ACCESS_TYPE_BYTE;</span><br><span style="color: hsl(120, 100%, 40%);">+ else</span><br><span style="color: hsl(120, 100%, 40%);">+ new_access_mode = ACCESS_TYPE_LONG_AUTO_INCREMENT;</span><br><span style="color: hsl(120, 100%, 40%);">+ if (new_access_mode != access_mode ||</span><br><span style="color: hsl(120, 100%, 40%);">+ access_mode != ACCESS_TYPE_LONG_AUTO_INCREMENT) {</span><br><span style="color: hsl(120, 100%, 40%);">+ access_mode = new_access_mode;</span><br><span style="color: hsl(120, 100%, 40%);">+ mec_emi_write_address(base, offset, access_mode);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Access [B0, B3] on each loop pass */</span><br><span style="color: hsl(120, 100%, 40%);">+ io_addr = MEC_EMI_EC_DATA_B0(base);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return checksum;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/ec/google/common/mec.h b/src/ec/google/common/mec.h</span><br><span>new file mode 100644</span><br><span>index 0000000..3452bad</span><br><span>--- /dev/null</span><br><span>+++ b/src/ec/google/common/mec.h</span><br><span>@@ -0,0 +1,43 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright 2018 Google LLC</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef EC_GOOGLE_COMMON_MEC_H</span><br><span style="color: hsl(120, 100%, 40%);">+#define EC_GOOGLE_COMMON_MEC_H</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <stddef.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <stdint.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* Indicate read or write from MEC IO region */</span><br><span style="color: hsl(120, 100%, 40%);">+enum mec_io_type {</span><br><span style="color: hsl(120, 100%, 40%);">+ MEC_IO_READ,</span><br><span style="color: hsl(120, 100%, 40%);">+ MEC_IO_WRITE</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * mec_io_bytes - Read / write bytes to MEC EMI port</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * @type: Indicate read or write operation</span><br><span style="color: hsl(120, 100%, 40%);">+ * @base: Base address for MEC EMI region</span><br><span style="color: hsl(120, 100%, 40%);">+ * @offset: Base read / write address</span><br><span style="color: hsl(120, 100%, 40%);">+ * @buffer: Destination / source buffer</span><br><span style="color: hsl(120, 100%, 40%);">+ * @size: Number of bytes to read / write</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * @returns 8-bit checksum of all bytes read or written</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+uint8_t mec_io_bytes(enum mec_io_type type, uint16_t base,</span><br><span style="color: hsl(120, 100%, 40%);">+ uint16_t offset, void *buffer, size_t size);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#endif /* EC_GOOGLE_COMMON_MEC_H */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29111">change 29111</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/29111"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I13516b5e4c4c49f53bb998366284a26703142e2a </div>
<div style="display:none"> Gerrit-Change-Number: 29111 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Duncan Laurie <dlaurie@chromium.org> </div>