<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29065">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">cpu/amd{family15}: Use common SMM_BASE_MSR<br><br>Change-Id: I0236e0960cd1e79558ea50c814e1de2830aa0550<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/cpu/amd/agesa/family15tn/model_15_init.c<br>M src/cpu/amd/pi/00630F01/model_15_init.c<br>M src/include/cpu/amd/amdfam15.h<br>3 files changed, 9 insertions(+), 8 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/29065/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c</span><br><span>index fdcb9a2..ce0a257 100644</span><br><span>--- a/src/cpu/amd/agesa/family15tn/model_15_init.c</span><br><span>+++ b/src/cpu/amd/agesa/family15tn/model_15_init.c</span><br><span>@@ -15,7 +15,9 @@</span><br><span> </span><br><span> #include <console/console.h></span><br><span> #include <cpu/x86/msr.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/amd/msr.h></span><br><span> #include <cpu/x86/smm.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/x86/mtrr.h></span><br><span> #include <cpu/amd/mtrr.h></span><br><span> #include <device/device.h></span><br><span> #include <string.h></span><br><span>@@ -24,7 +26,6 @@</span><br><span> #include <cpu/x86/lapic.h></span><br><span> #include <cpu/cpu.h></span><br><span> #include <cpu/x86/cache.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/mtrr.h></span><br><span> #include <cpu/amd/amdfam15.h></span><br><span> #include <arch/acpi.h></span><br><span> #include <northbridge/amd/agesa/agesa_helper.h></span><br><span>@@ -108,9 +109,9 @@</span><br><span> printk(BIOS_INFO, "Initializing SMM for CPU %u\n", cpu_idx);</span><br><span> </span><br><span> /* Set SMM base address for this CPU */</span><br><span style="color: hsl(0, 100%, 40%);">- msr = rdmsr(MSR_SMM_BASE);</span><br><span style="color: hsl(120, 100%, 40%);">+ msr = rdmsr(SMM_BASE_MSR);</span><br><span> msr.lo = SMM_BASE - (cpu_idx * 0x400);</span><br><span style="color: hsl(0, 100%, 40%);">- wrmsr(MSR_SMM_BASE, msr);</span><br><span style="color: hsl(120, 100%, 40%);">+ wrmsr(SMM_BASE_MSR, msr);</span><br><span> </span><br><span> /* Enable the SMM memory window */</span><br><span> msr = rdmsr(MSR_SMM_MASK);</span><br><span>diff --git a/src/cpu/amd/pi/00630F01/model_15_init.c b/src/cpu/amd/pi/00630F01/model_15_init.c</span><br><span>index 0269a1e..803919a 100644</span><br><span>--- a/src/cpu/amd/pi/00630F01/model_15_init.c</span><br><span>+++ b/src/cpu/amd/pi/00630F01/model_15_init.c</span><br><span>@@ -15,8 +15,10 @@</span><br><span> </span><br><span> #include <console/console.h></span><br><span> #include <cpu/x86/msr.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/smm.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/amd/msr.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/x86/mtrr.h></span><br><span> #include <cpu/amd/mtrr.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/x86/smm.h></span><br><span> #include <device/device.h></span><br><span> #include <device/pci.h></span><br><span> #include <string.h></span><br><span>@@ -25,7 +27,6 @@</span><br><span> #include <cpu/x86/lapic.h></span><br><span> #include <cpu/cpu.h></span><br><span> #include <cpu/x86/cache.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cpu/x86/mtrr.h></span><br><span> #include <cpu/amd/amdfam15.h></span><br><span> #include <arch/acpi.h></span><br><span> </span><br><span>@@ -105,9 +106,9 @@</span><br><span> printk(BIOS_INFO, "Initializing SMM for CPU %u\n", cpu_idx);</span><br><span> </span><br><span> /* Set SMM base address for this CPU */</span><br><span style="color: hsl(0, 100%, 40%);">- msr = rdmsr(MSR_SMM_BASE);</span><br><span style="color: hsl(120, 100%, 40%);">+ msr = rdmsr(SMM_BASE_MSR);</span><br><span> msr.lo = SMM_BASE - (cpu_idx * 0x400);</span><br><span style="color: hsl(0, 100%, 40%);">- wrmsr(MSR_SMM_BASE, msr);</span><br><span style="color: hsl(120, 100%, 40%);">+ wrmsr(SMM_BASE_MSR, msr);</span><br><span> </span><br><span> /* Enable the SMM memory window */</span><br><span> msr = rdmsr(MSR_SMM_MASK);</span><br><span>diff --git a/src/include/cpu/amd/amdfam15.h b/src/include/cpu/amd/amdfam15.h</span><br><span>index 271af8a..164ca22 100644</span><br><span>--- a/src/include/cpu/amd/amdfam15.h</span><br><span>+++ b/src/include/cpu/amd/amdfam15.h</span><br><span>@@ -189,7 +189,6 @@</span><br><span> return MCA_ERRTYPE_UNKNOWN;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#define MSR_SMM_BASE 0xC0010111</span><br><span> #define MSR_TSEG_BASE 0xC0010112</span><br><span> #define MSR_SMM_MASK 0xC0010113</span><br><span> # define SMM_TSEG_VALID (1 << 1)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29065">change 29065</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I0236e0960cd1e79558ea50c814e1de2830aa0550 </div>
<div style="display:none"> Gerrit-Change-Number: 29065 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>