<p>Richard Spiegel has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/29035">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">amd/stoneyridge: Indicate STAPM units in their name<br><br>STAPM devicetree registers do not indicate the unit, which causes confusion.<br>More importantly, the time was assumed to be in seconds when it's actually<br>milliseconds. This caused early STAPM configurations to fail.<br><br>BUG=b:117590953<br>TEST=Build grunt<br><br>Change-Id: I2a7e3d43601992d1f7b02456913c763d940fe9ee<br>Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com><br>---<br>M src/mainboard/google/kahlee/variants/careena/devicetree.cb<br>M src/mainboard/google/kahlee/variants/grunt/devicetree.cb<br>M src/soc/amd/stoneyridge/chip.h<br>M src/soc/amd/stoneyridge/romstage.c<br>4 files changed, 10 insertions(+), 10 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/29035/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/kahlee/variants/careena/devicetree.cb b/src/mainboard/google/kahlee/variants/careena/devicetree.cb</span><br><span>index ad760b5..b541c03 100644</span><br><span>--- a/src/mainboard/google/kahlee/variants/careena/devicetree.cb</span><br><span>+++ b/src/mainboard/google/kahlee/variants/careena/devicetree.cb</span><br><span>@@ -21,8 +21,8 @@</span><br><span>        register "uma_mode" = "UMAMODE_SPECIFIED_SIZE"</span><br><span>   register "uma_size" = "32 * MiB"</span><br><span>         register "stapm_percent" = "68"</span><br><span style="color: hsl(0, 100%, 40%);">-     register "stapm_time" = "2500000"</span><br><span style="color: hsl(0, 100%, 40%);">-   register "stapm_power" = "7800"</span><br><span style="color: hsl(120, 100%, 40%);">+   register "stapm_time_ms" = "2500000"</span><br><span style="color: hsl(120, 100%, 40%);">+      register "stapm_power_mw" = "7800"</span><br><span> </span><br><span>   # Enable I2C0 for audio, USB3 hub at 400kHz</span><br><span>  register "i2c[0]" = "{</span><br><span>diff --git a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb</span><br><span>index 8af3f9c..5a8906b 100644</span><br><span>--- a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb</span><br><span>+++ b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb</span><br><span>@@ -21,8 +21,8 @@</span><br><span>       register "uma_mode" = "UMAMODE_SPECIFIED_SIZE"</span><br><span>   register "uma_size" = "32 * MiB"</span><br><span>         register "stapm_percent" = "80"</span><br><span style="color: hsl(0, 100%, 40%);">-     register "stapm_time" = "2500000"</span><br><span style="color: hsl(0, 100%, 40%);">-   register "stapm_power" = "7800"</span><br><span style="color: hsl(120, 100%, 40%);">+   register "stapm_time_ms" = "2500000"</span><br><span style="color: hsl(120, 100%, 40%);">+      register "stapm_power_mw" = "7800"</span><br><span> </span><br><span>   # Enable I2C0 for audio, USB3 hub at 400kHz</span><br><span>  register "i2c[0]" = "{</span><br><span>diff --git a/src/soc/amd/stoneyridge/chip.h b/src/soc/amd/stoneyridge/chip.h</span><br><span>index 8ed8e4d..320bef0 100644</span><br><span>--- a/src/soc/amd/stoneyridge/chip.h</span><br><span>+++ b/src/soc/amd/stoneyridge/chip.h</span><br><span>@@ -61,8 +61,8 @@</span><br><span>       u8 i2c_scl_reset;</span><br><span>    struct dw_i2c_bus_config i2c[STONEY_I2C_DEV_MAX];</span><br><span>    u8 stapm_percent;</span><br><span style="color: hsl(0, 100%, 40%);">-       u32 stapm_time;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 stapm_power;</span><br><span style="color: hsl(120, 100%, 40%);">+      u32 stapm_time_ms;</span><br><span style="color: hsl(120, 100%, 40%);">+    u32 stapm_power_mw;</span><br><span> };</span><br><span> </span><br><span> typedef struct soc_amd_stoneyridge_config config_t;</span><br><span>diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c</span><br><span>index 555e901..3fae6c4 100644</span><br><span>--- a/src/soc/amd/stoneyridge/romstage.c</span><br><span>+++ b/src/soc/amd/stoneyridge/romstage.c</span><br><span>@@ -235,12 +235,12 @@</span><br><span>    }</span><br><span>    cfg = dev->chip_info;</span><br><span>     platform = &InitEarly->PlatformConfig;</span><br><span style="color: hsl(0, 100%, 40%);">-   if ((cfg->stapm_percent) && (cfg->stapm_time) && (cfg->stapm_power)) {</span><br><span style="color: hsl(120, 100%, 40%);">+       if ((cfg->stapm_percent) && (cfg->stapm_time_ms) && (cfg->stapm_power_mw)) {</span><br><span>                platform->PlatStapmConfig.CfgStapmScalar = cfg->stapm_percent;</span><br><span>                 platform->PlatStapmConfig.CfgStapmTimeConstant =</span><br><span style="color: hsl(0, 100%, 40%);">-                                                     cfg->stapm_time;</span><br><span style="color: hsl(0, 100%, 40%);">-             platform->PkgPwrLimitDC = cfg->stapm_power;</span><br><span style="color: hsl(0, 100%, 40%);">-               platform->PkgPwrLimitAC = cfg->stapm_power;</span><br><span style="color: hsl(120, 100%, 40%);">+                                                     cfg->stapm_time_ms;</span><br><span style="color: hsl(120, 100%, 40%);">+                platform->PkgPwrLimitDC = cfg->stapm_power_mw;</span><br><span style="color: hsl(120, 100%, 40%);">+          platform->PkgPwrLimitAC = cfg->stapm_power_mw;</span><br><span>                 platform->PlatStapmConfig.CfgStapmBoost = StapmBoostEnabled;</span><br><span>      }</span><br><span> }</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/29035">change 29035</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/29035"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I2a7e3d43601992d1f7b02456913c763d940fe9ee </div>
<div style="display:none"> Gerrit-Change-Number: 29035 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Richard Spiegel <richard.spiegel@silverbackltd.com> </div>